armbian-build/patch/atf/atf-sunxi64/enable-additional-regulators.patch
2017-10-14 21:49:08 +03:00

42 lines
1.3 KiB
Diff

diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c
index 0c2487e..db79047 100644
--- a/plat/sun50iw1p1/sunxi_power.c
+++ b/plat/sun50iw1p1/sunxi_power.c
@@ -217,6 +217,9 @@ static int pmic_setup(void)
{
int ret;
+ /* Set DCDC2/CPU voltage to 1.1V */
+ sunxi_pmic_write(0x21, 60);
+
ret = sunxi_pmic_read(0x20);
if (ret != 0x0e && ret != 0x11) {
int voltage = (ret & 0x1f) * 10 + 16;
@@ -242,9 +245,9 @@ static int pmic_setup(void)
return -3;
}
- if ((ret & 0xc9) != 0xc9) {
+ if ((ret & 0xd9) != 0xd9) {
/* Enable DC1SW to power PHY, DLDO4 for WiFi and DLDO1 for HDMI */
- ret = sunxi_pmic_write(0x12, ret | 0xc8);
+ ret = sunxi_pmic_write(0x12, ret | 0xd8);
if (ret < 0) {
NOTICE("PMIC: error %d enabling DC1SW/DLDO4/DLDO1\n", ret);
return -4;
@@ -266,6 +269,14 @@ static int pmic_setup(void)
sunxi_pmic_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */
+ sunxi_pmic_write(0x16, 0x12); /* DLDO2 = VCC2V5_EDP voltage = 2.5V */
+ sunxi_pmic_write(0x1c, 0xa); /* FLDO1 = VCC1V2_EDP voltage = 1.2V */
+ sunxi_pmic_write(0x91, 0x1a); /* GPIO0LDO voltage = 3.3V */
+ sunxi_pmic_write(0x90, 0x3); /* Enable GPIO0LDO */
+ ret = sunxi_pmic_read(0x13);
+ /* Enable FLDO1 to power up eDP bridge */
+ ret = sunxi_pmic_write(0x13, ret | 0x4);
+
return 0;
}