77f7231226
new values are based on stabilityTester results when using 930mV for 1.6GHz and 980mV for 1.8GHz, xhpl failed randomly. So 930/980mV are the critical operation voltage.Then increase 10mV and run 100 times test, result shows that xhpl (not always) failed 1~2 times. It seems +10mV is still not enough to ensure dc-dc output voltage always above operation voltage, that means the design of dc-dc converter is not good enough that results in large ripple. The testing script is "github.com/mzhboy/StabilityTester" The following configuration have been tested. 1.08-1.32-1.48-1.64-1.8 GHz 900-910-920-930-990 *ok, 930 failed 2/100 900-900-910-940-990 *ok, 990 failed 1/100 890-900-910-940-990 *ok, 990 failed 1/100 880-880-910-940-1000 *ok, 940 failed 2/100 880-880-910-950-1000 *ok, 1000 failed 1/100 880-880-910-950-1010 *ok
77 lines
2.3 KiB
Diff
77 lines
2.3 KiB
Diff
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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index 141fd186b..4d4dcf8eb 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@@ -67,61 +67,62 @@
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};
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};
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+ /* axp80,DCDC-A: 0.6~1.1V, 10mV/Step, 51 steps; 1.12~1.52V, 20mV/Step, 21 Steps */
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cpu_opp_table: opp_table {
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compatible = "operating-points-v2";
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opp-shared;
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opp@480000000 {
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opp-hz = /bits/ 64 <480000000>;
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- opp-microvolt = <880000 880000 880000>;
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+ opp-microvolt = <880000 870000 900000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@720000000 {
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opp-hz = /bits/ 64 <720000000>;
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- opp-microvolt = <880000 880000 880000>;
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+ opp-microvolt = <880000 870000 900000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@816000000 {
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opp-hz = /bits/ 64 <816000000>;
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- opp-microvolt = <880000 880000 880000>;
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+ opp-microvolt = <880000 870000 900000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@888000000 {
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opp-hz = /bits/ 64 <888000000>;
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- opp-microvolt = <880000 880000 880000>;
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+ opp-microvolt = <880000 870000 900000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@1080000000 {
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opp-hz = /bits/ 64 <1080000000>;
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- opp-microvolt = <940000 940000 940000>;
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+ opp-microvolt = <880000 880000 940000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@1320000000 {
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opp-hz = /bits/ 64 <1320000000>;
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- opp-microvolt = <1000000 1000000 1000000>;
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+ opp-microvolt = <880000 880000 960000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@1488000000 {
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opp-hz = /bits/ 64 <1488000000>;
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- opp-microvolt = <1060000 1060000 1060000>;
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+ opp-microvolt = <910000 900000 980000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@1640000000 {
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opp-hz = /bits/ 64 <1640000000>;
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- opp-microvolt = <1160000 1160000 1160000>;
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+ opp-microvolt = <950000 910000 1100000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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opp@1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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- opp-microvolt = <1160000 1160000 1160000>;
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+ opp-microvolt = <1010000 930000 1160000>;
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clock-latency-ns = <244144>; /* 8 32k periods */
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};
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};
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