fix orangepi4-lts rk808 interrupt line, sdcard detection and wifi freq (#4278)
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@ -3,7 +3,7 @@ new file mode 100644
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index 00000000000..e0490aaa7ba
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
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@@ -0,0 +1,1257 @@
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@@ -0,0 +1,1258 @@
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+/*
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+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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@ -528,8 +528,8 @@ index 00000000000..e0490aaa7ba
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+ rk808: pmic@1b {
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+ compatible = "rockchip,rk808";
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+ reg = <0x1b>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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+ interrupt-parent = <&gpio2>;
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+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk808-clkout2";
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+ pinctrl-names = "default";
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@ -875,6 +875,7 @@ index 00000000000..e0490aaa7ba
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+};
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+
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+&i2s0 {
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+ rockchip,i2s-broken-burst-len;
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+ assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
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+ assigned-clock-parents = <&cru SCLK_I2S0_8CH>;
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+ resets = <&cru SRST_I2S0_8CH>, <&cru SRST_H_I2S0_8CH>;
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@ -956,8 +957,8 @@ index 00000000000..e0490aaa7ba
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+};
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+
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+&sdio0 {
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+ clock-frequency = <50000000>;
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+ clock-freq-min-max = <200000 50000000>;
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+ clock-frequency = <150000000>;
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+ max-frequency = <150000000>;
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+ supports-sdio;
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+ bus-width = <4>;
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+ disable-wp;
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@ -1128,7 +1129,7 @@ index 00000000000..e0490aaa7ba
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+
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
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+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+
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+ vsel1_gpio: vsel1-gpio {
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@ -3,7 +3,7 @@ new file mode 100644
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index 00000000000..e0490aaa7ba
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
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@@ -0,0 +1,1257 @@
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@@ -0,0 +1,1258 @@
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+/*
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+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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@ -528,8 +528,8 @@ index 00000000000..e0490aaa7ba
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+ rk808: pmic@1b {
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+ compatible = "rockchip,rk808";
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+ reg = <0x1b>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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+ interrupt-parent = <&gpio2>;
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+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk808-clkout2";
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+ pinctrl-names = "default";
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@ -875,6 +875,7 @@ index 00000000000..e0490aaa7ba
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+};
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+
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+&i2s0 {
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+ rockchip,i2s-broken-burst-len;
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+ assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
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+ assigned-clock-parents = <&cru SCLK_I2S0_8CH>;
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+ resets = <&cru SRST_I2S0_8CH>, <&cru SRST_H_I2S0_8CH>;
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@ -956,8 +957,8 @@ index 00000000000..e0490aaa7ba
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+};
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+
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+&sdio0 {
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+ clock-frequency = <50000000>;
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+ clock-freq-min-max = <200000 50000000>;
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+ clock-frequency = <150000000>;
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+ max-frequency = <150000000>;
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+ supports-sdio;
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+ bus-width = <4>;
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+ disable-wp;
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@ -1128,7 +1129,7 @@ index 00000000000..e0490aaa7ba
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+
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
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+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+
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+ vsel1_gpio: vsel1-gpio {
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