rockchip64-6.12: add dt overlay of lcd panel on hinlink-h88k
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@ -1,5 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
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hinlink-h88k-240x135-lcd.dtbo \
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rk3308-s0-ext-antenna.dtbo \
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rk3308-b@1.3ghz.dtbo \
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rk3308-bs.dtbo rk3308-bs@1.3ghz.dtbo \
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@ -0,0 +1,64 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/rockchip,rk3588-cru.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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fragment@0 {
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target = <&spi4>;
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__overlay__ {
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#address-cells = <1>;
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#size-cells = <0>;
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assigned-clocks = <&cru CLK_SPI4>;
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assigned-clock-rates = <200000000>;
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num-cs = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi4_custom_pins &spi4m2_cs0>;
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status = "okay";
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panel: panel@0 {
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compatible = "hinlink-h88k-240x135-lcd", "panel-mipi-dbi-spi";
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reg = <0>;
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spi-max-frequency = <2000000>;
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width-mm = <25>;
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height-mm = <15>;
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dc-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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write-only;
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timing: panel-timing {
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hactive = <240>;
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vactive = <135>;
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hback-porch = <40>;
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vback-porch = <52>;
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clock-frequency = <0>;
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hfront-porch = <0>;
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hsync-len = <0>;
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vfront-porch = <0>;
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vsync-len = <0>;
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};
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};
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};
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};
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fragment@1 {
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target = <&pinctrl>;
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__overlay__ {
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lcd {
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spi4_custom_pins: spi4-custom-pins {
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rockchip,pins =
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/* spi4_clk_m2 */
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<1 RK_PA2 8 &pcfg_pull_up_drv_level_6>,
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/* spi4_mosi_m2 */
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<1 RK_PA1 8 &pcfg_pull_up_drv_level_6>,
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/* spi4_miso_m0 */
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<1 RK_PC0 8 &pcfg_pull_up_drv_level_6>;
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};
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};
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};
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};
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};
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