From d6400cc883bba2f4ad4c81ecc002be41b530a72c Mon Sep 17 00:00:00 2001
From: amazingfate <liujianfeng1994@gmail.com>
Date: Mon, 3 Mar 2025 00:47:15 +0800
Subject: [PATCH] rockchip64-6.12: add dt overlay of lcd panel on hinlink-h88k

---
 .../archive/rockchip64-6.12/overlay/Makefile  |  1 +
 .../overlay/hinlink-h88k-240x135-lcd.dtso     | 64 +++++++++++++++++++
 2 files changed, 65 insertions(+)
 create mode 100644 patch/kernel/archive/rockchip64-6.12/overlay/hinlink-h88k-240x135-lcd.dtso

diff --git a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile
index 22f66c2788..59a0114ec2 100644
--- a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile
+++ b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+	hinlink-h88k-240x135-lcd.dtbo \
 	rk3308-s0-ext-antenna.dtbo \
 	rk3308-b@1.3ghz.dtbo \
 	rk3308-bs.dtbo rk3308-bs@1.3ghz.dtbo \
diff --git a/patch/kernel/archive/rockchip64-6.12/overlay/hinlink-h88k-240x135-lcd.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/hinlink-h88k-240x135-lcd.dtso
new file mode 100644
index 0000000000..011962e9a0
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-6.12/overlay/hinlink-h88k-240x135-lcd.dtso
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/clock/rockchip,rk3588-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target = <&spi4>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			assigned-clocks = <&cru CLK_SPI4>;
+			assigned-clock-rates = <200000000>;
+			num-cs = <1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi4_custom_pins &spi4m2_cs0>;
+			status = "okay";
+
+			panel: panel@0 {
+				compatible = "hinlink-h88k-240x135-lcd", "panel-mipi-dbi-spi";
+				reg = <0>;
+
+				spi-max-frequency = <2000000>;
+
+				width-mm = <25>;
+				height-mm = <15>;
+
+				dc-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+
+				write-only;
+
+				timing: panel-timing {
+					hactive = <240>;
+					vactive = <135>;
+					hback-porch = <40>;
+					vback-porch = <52>;
+
+					clock-frequency = <0>;
+					hfront-porch = <0>;
+					hsync-len = <0>;
+					vfront-porch = <0>;
+					vsync-len = <0>;
+				};
+			};
+		};
+	};
+	fragment@1 {
+		target = <&pinctrl>;
+		__overlay__ {
+			lcd {
+				spi4_custom_pins: spi4-custom-pins {
+					rockchip,pins =
+					/* spi4_clk_m2 */
+					<1 RK_PA2 8 &pcfg_pull_up_drv_level_6>,
+					/* spi4_mosi_m2 */
+					<1 RK_PA1 8 &pcfg_pull_up_drv_level_6>,
+					/* spi4_miso_m0 */
+					<1 RK_PC0 8 &pcfg_pull_up_drv_level_6>;
+				};
+			};
+		};
+	};
+};