rockchip64: orangepi4 LTS sdmmc bus pins strength increased for better stability with UHS modes

This commit is contained in:
Paolo Sabatino 2022-06-16 19:56:52 +00:00 committed by Paolo
parent ae5664a66d
commit b88a8a7dce
2 changed files with 43 additions and 5 deletions

View File

@ -1,9 +1,9 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
new file mode 100644
index 00000000000..925cc1aa4f1
index 00000000000..4adb1534ea5
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
@@ -0,0 +1,1164 @@
@@ -0,0 +1,1183 @@
+/*
+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@ -1015,7 +1015,26 @@ index 00000000000..925cc1aa4f1
+ status = "okay";
+};
+
+&sdmmc_bus4 {
+ rockchip,pins =
+ <4 RK_PB0 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB1 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB2 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB3 1 &pcfg_pull_up_12ma>;
+};
+
+&sdmmc_cmd {
+ rockchip,pins =
+ <4 RK_PB5 1 &pcfg_pull_up_12ma>;
+};
+
+&pinctrl {
+
+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <12>;
+ };
+
+ pcie {
+ pcie_drv: pcie-drv {
+ rockchip,pins =

View File

@ -1,9 +1,9 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
new file mode 100644
index 00000000000..925cc1aa4f1
index 00000000000..4adb1534ea5
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
@@ -0,0 +1,1164 @@
@@ -0,0 +1,1183 @@
+/*
+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@ -364,7 +364,7 @@ index 00000000000..925cc1aa4f1
+ wl-wake-host-gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ bt-wake-host-gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ sdio-ext-int-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+ unisoc,btwf-file-name = "/lib/firmware/wcnmodem.bin";
+ unisoc,btwf-file-name = "/lib/firmware/uwe5622/wcnmodem-38222.bin";
+ data-irq;
+ blksz-512;
+ keep-power-on;
@ -1015,7 +1015,26 @@ index 00000000000..925cc1aa4f1
+ status = "okay";
+};
+
+&sdmmc_bus4 {
+ rockchip,pins =
+ <4 RK_PB0 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB1 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB2 1 &pcfg_pull_up_12ma>,
+ <4 RK_PB3 1 &pcfg_pull_up_12ma>;
+};
+
+&sdmmc_cmd {
+ rockchip,pins =
+ <4 RK_PB5 1 &pcfg_pull_up_12ma>;
+};
+
+&pinctrl {
+
+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <12>;
+ };
+
+ pcie {
+ pcie_drv: pcie-drv {
+ rockchip,pins =