diff --git a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-4-lts.patch b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-4-lts.patch
index 1ef6693158..8b23b4aaa0 100644
--- a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-4-lts.patch
+++ b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-4-lts.patch
@@ -1,9 +1,9 @@
 diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
 new file mode 100644
-index 00000000000..925cc1aa4f1
+index 00000000000..4adb1534ea5
 --- /dev/null
 +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
-@@ -0,0 +1,1164 @@
+@@ -0,0 +1,1183 @@
 +/*
 + * SPDX-License-Identifier: (GPL-2.0+ or MIT)
 + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@@ -1015,7 +1015,26 @@ index 00000000000..925cc1aa4f1
 +	status = "okay";
 +};
 +
++&sdmmc_bus4 {
++	rockchip,pins =
++		<4 RK_PB0 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB1 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB2 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB3 1 &pcfg_pull_up_12ma>;
++};
++
++&sdmmc_cmd {
++	rockchip,pins =
++		<4 RK_PB5 1 &pcfg_pull_up_12ma>;
++};
++
 +&pinctrl {
++
++	pcfg_pull_up_12ma: pcfg-pull-up-12ma {
++		bias-pull-up;
++		drive-strength = <12>;
++	};
++
 +	pcie {
 +		pcie_drv: pcie-drv {
 +			rockchip,pins =
diff --git a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-4-lts.patch b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-4-lts.patch
index 99b89ae5a4..8b23b4aaa0 100644
--- a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-4-lts.patch
+++ b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-4-lts.patch
@@ -1,9 +1,9 @@
 diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
 new file mode 100644
-index 00000000000..925cc1aa4f1
+index 00000000000..4adb1534ea5
 --- /dev/null
 +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
-@@ -0,0 +1,1164 @@
+@@ -0,0 +1,1183 @@
 +/*
 + * SPDX-License-Identifier: (GPL-2.0+ or MIT)
 + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@@ -364,7 +364,7 @@ index 00000000000..925cc1aa4f1
 +		wl-wake-host-gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 +		bt-wake-host-gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 +		sdio-ext-int-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
-+		unisoc,btwf-file-name = "/lib/firmware/wcnmodem.bin";
++		unisoc,btwf-file-name = "/lib/firmware/uwe5622/wcnmodem-38222.bin";
 +		data-irq;
 +		blksz-512;
 +		keep-power-on;
@@ -1015,7 +1015,26 @@ index 00000000000..925cc1aa4f1
 +	status = "okay";
 +};
 +
++&sdmmc_bus4 {
++	rockchip,pins =
++		<4 RK_PB0 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB1 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB2 1 &pcfg_pull_up_12ma>,
++		<4 RK_PB3 1 &pcfg_pull_up_12ma>;
++};
++
++&sdmmc_cmd {
++	rockchip,pins =
++		<4 RK_PB5 1 &pcfg_pull_up_12ma>;
++};
++
 +&pinctrl {
++
++	pcfg_pull_up_12ma: pcfg-pull-up-12ma {
++		bias-pull-up;
++		drive-strength = <12>;
++	};
++
 +	pcie {
 +		pcie_drv: pcie-drv {
 +			rockchip,pins =