mixtile-core3588e: add board with vendor and edge branches (Joshua Riek + fixes)
- vendor: - kernel: armbian/linux-rockchip already had a DTS from jriek - u-boot: taken from jriek (reorg'ed the defconfig) - edge: - kernel: taken from jriek's 6.11 wip branch - u-boot: generic (can only boot SD/eMMC)
This commit is contained in:
Ricardo Pardini
Igor
parent
4d4390541e
commit
42a0055940
68
config/boards/mixtile-core3588e.csc
Normal file
68
config/boards/mixtile-core3588e.csc
Normal file
@ -0,0 +1,68 @@
|
||||
# Rockchip RK3588 SoC octa core Jetson SoM
|
||||
declare -g BOARD_NAME="Mixtile Core3588E"
|
||||
declare -g BOARD_VENDOR="mixtile"
|
||||
declare -g BOARDFAMILY="rockchip-rk3588"
|
||||
declare -g BOARD_MAINTAINER="rpardini"
|
||||
declare -g KERNEL_TARGET="edge,vendor"
|
||||
declare -g BOOT_FDT_FILE="rockchip/rk3588-mixtile-core3588e.dtb" # same name vendor and edge
|
||||
declare -g BOOT_SCENARIO="spl-blobs"
|
||||
declare -g BOOT_SOC="rk3588"
|
||||
declare -g BOOTCONFIG="mixtile-core3588e-rk3588_defconfig" # vendor name
|
||||
declare -g IMAGE_PARTITION_TABLE="gpt"
|
||||
# Does NOT have a UEFI_EDK2_BOARD_ID
|
||||
|
||||
# Vendor kernel:
|
||||
# - https://github.com/armbian/linux-rockchip/blob/rk-6.1-rkr5.1/arch/arm64/boot/dts/rockchip/rk3588-mixtile-core3588e.dts
|
||||
# - mostly works, still sucks as it's vendor kernel
|
||||
# - mainline u-boot can boot the vendor kernel just fine
|
||||
# Mainline kernel:
|
||||
# - https://github.com/Joshua-Riek/linux/blob/v6.7-rk3588/arch/arm64/boot/dts/rockchip/rk3588-mixtile-core3588e.dts
|
||||
# - a _lot_ of fixes and additions done on top; gpu/npu/i2c/thermals/etc
|
||||
|
||||
# Hardware notes:
|
||||
# - With the LEETOP carrier board (as shipped by Mixtile)
|
||||
# - Recovery "button" (NOT real "Maskrom"): "jumper cap to connect the FCREC and GND pins"; this depends on u-boot actually working (not bricked)
|
||||
# - OTG/Maskrom port is micro-USB port
|
||||
# - The "real" maskrom is to short two tiny solder-joints near the SoC on the SoM; see https://dh19rycdk230a.cloudfront.net/app/uploads/2023/11/solder-joints.png
|
||||
|
||||
# Vendor u-boot; use the default family (rockchip-rk3588) u-boot. See config/sources/families/rockchip-rk3588.conf
|
||||
function post_family_config__vendor_uboot_core3588e() {
|
||||
if [[ "${BRANCH}" == "vendor" || "${BRANCH}" == "legacy" ]]; then
|
||||
display_alert "$BOARD" "Using vendor u-boot for $BOARD on branch $BRANCH" "info"
|
||||
else
|
||||
return 0
|
||||
fi
|
||||
|
||||
display_alert "$BOARD" "Configuring $BOARD vendor u-boot (using Radxa's older next-dev-v2024.03)" "info"
|
||||
declare -g BOOTDELAY=1 # build injects this into u-boot config. we can then get into UMS mode and avoid the whole rockusb/rkdeveloptool thing
|
||||
|
||||
# Override the stuff from rockchip-rk3588 family; a patch for stable MAC address that breaks with Radxa's next-dev-v2024.10+
|
||||
declare -g BOOTSOURCE='https://github.com/radxa/u-boot.git'
|
||||
declare -g BOOTBRANCH='branch:next-dev-v2024.03' # NOT next-dev-v2024.10
|
||||
declare -g BOOTPATCHDIR="legacy/u-boot-radxa-rk35xx" # Patches from https://github.com/Joshua-Riek/ubuntu-rockchip/blob/main/packages/u-boot-radxa-rk3588/debian/patches/0002-board-rockchip-Add-the-Mixtile-Core-3588E.patch
|
||||
}
|
||||
|
||||
function post_family_config__core3588e_use_mainline_uboot() {
|
||||
if [[ "${BRANCH}" != "edge" ]]; then
|
||||
return 0
|
||||
fi
|
||||
|
||||
display_alert "$BOARD" "mainline (generic) u-boot overrides for $BOARD / $BRANCH" "info"
|
||||
|
||||
declare -g BOOTCONFIG="generic-rk3588_defconfig"
|
||||
declare -g BOOTDELAY=1
|
||||
declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git"
|
||||
declare -g BOOTBRANCH="tag:v2026.01-rc4"
|
||||
declare -g BOOTPATCHDIR="v2026.01"
|
||||
declare -g BOOTDIR="u-boot-${BOARD}"
|
||||
|
||||
UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin" # NOT u-boot-rockchip-spi.bin
|
||||
unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already
|
||||
|
||||
# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
|
||||
function write_uboot_platform() {
|
||||
dd "if=$1/u-boot-rockchip.bin" "of=$2" bs=32k seek=1 conv=notrunc status=none
|
||||
}
|
||||
|
||||
declare -g PLYMOUTH="no" # Disable plymouth as that only causes more confusion
|
||||
}
|
||||
@ -0,0 +1,681 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Joshua Riek <jjriek@verizon.net>
|
||||
*/
|
||||
|
||||
// From https://github.com/Joshua-Riek/linux/blob/v6.7-rk3588/arch/arm64/boot/dts/rockchip/rk3588-mixtile-core3588e.dts
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include "rk3588.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Mixtile Core 3588E";
|
||||
compatible = "mixtile,core3588e", "rockchip,rk3588";
|
||||
|
||||
aliases {
|
||||
mmc0 = &sdhci;
|
||||
serial2 = &uart2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
|
||||
fan: pwm-fan {
|
||||
compatible = "pwm-fan";
|
||||
cooling-levels = <0 25 95 145 195 255>;
|
||||
fan-supply = <&vcc5v0_sys>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
|
||||
pwms = <&pwm2 0 50000 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie30: vcc3v3-pcie30-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie30";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc3v3_pcie30_en>;
|
||||
startup-delay-us = <5000>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v1_nldo_s3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
};
|
||||
|
||||
&combphy2_psu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu_b0 {
|
||||
cpu-supply = <&vdd_cpu_big0_s0>;
|
||||
mem-supply = <&vdd_cpu_big0_s0>;
|
||||
};
|
||||
|
||||
&cpu_b1 {
|
||||
cpu-supply = <&vdd_cpu_big0_s0>;
|
||||
mem-supply = <&vdd_cpu_big0_s0>;
|
||||
};
|
||||
|
||||
&cpu_b2 {
|
||||
cpu-supply = <&vdd_cpu_big1_s0>;
|
||||
mem-supply = <&vdd_cpu_big1_s0>;
|
||||
};
|
||||
|
||||
&cpu_b3 {
|
||||
cpu-supply = <&vdd_cpu_big1_s0>;
|
||||
mem-supply = <&vdd_cpu_big1_s0>;
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||||
};
|
||||
|
||||
&cpu_l1 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||||
};
|
||||
|
||||
&cpu_l2 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||||
};
|
||||
|
||||
&cpu_l3 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
clock_in_out = "output";
|
||||
phy-handle = <&rgmii_phy>;
|
||||
phy-mode = "rgmii-rxid";
|
||||
pinctrl-0 = <&gmac0_miim
|
||||
&gmac0_tx_bus2
|
||||
&gmac0_rx_bus2
|
||||
&gmac0_rgmii_clk
|
||||
&gmac0_rgmii_bus>;
|
||||
pinctrl-names = "default";
|
||||
rx_delay = <0x00>;
|
||||
tx_delay = <0x43>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0m2_xfer>;
|
||||
status = "okay";
|
||||
|
||||
vdd_cpu_big0_s0: regulator@42 {
|
||||
compatible = "rockchip,rk8602";
|
||||
reg = <0x42>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
regulator-name = "vdd_cpu_big0_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_big1_s0: regulator@43 {
|
||||
compatible = "rockchip,rk8603", "rockchip,rk8602";
|
||||
reg = <0x43>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
regulator-name = "vdd_cpu_big1_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1m2_xfer>;
|
||||
status = "okay";
|
||||
|
||||
vdd_npu_s0: regulator@42 {
|
||||
compatible = "rockchip,rk8602";
|
||||
reg = <0x42>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
regulator-name = "vdd_npu_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2c4m3_xfer>;
|
||||
|
||||
hym8563: rtc@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "hym8563";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hym8563_int>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
rgmii_phy: ethernet-phy@1 {
|
||||
/* RTL8211F */
|
||||
compatible = "ethernet-phy-id001c.c916",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rtl8211f_rst>;
|
||||
reset-assert-us = <15000>;
|
||||
reset-deassert-us = <50000>;
|
||||
reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2x1l1 {
|
||||
linux,pci-domain = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie2_reset>;
|
||||
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x4 {
|
||||
linux,pci-domain = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie3_reset>, <&pcie3_clkreqn_m1>;
|
||||
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
hym8563 {
|
||||
hym8563_int: hym8563-int {
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie2 {
|
||||
pcie2_reset: pcie2-reset {
|
||||
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie3 {
|
||||
pcie3_reset: pcie3-reset {
|
||||
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pcie3_clkreqn_m1: pcie3-clkreqn-m1 {
|
||||
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie30_en: pcie3-reg {
|
||||
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
emmc {
|
||||
emmc_data_strobe: emmc-data-strobe {
|
||||
rockchip,pins = <2 RK_PA2 1 &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
rtl8211f {
|
||||
rtl8211f_rst: rtl8211f-rst {
|
||||
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm2m1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
non-removable;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_data_strobe>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Temperature sensor near the center of the SoC */
|
||||
&package_thermal {
|
||||
polling-delay = <1000>;
|
||||
|
||||
trips {
|
||||
soc_active1: trip-active1 {
|
||||
temperature = <37500>;
|
||||
hysteresis = <1000>;
|
||||
type = "active";
|
||||
};
|
||||
soc_active2: trip-active2 {
|
||||
temperature = <42500>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
soc_active3: trip-active3 {
|
||||
temperature = <47500>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
soc_active4: trip-active4 {
|
||||
temperature = <55000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
soc_active5: trip-active5 {
|
||||
temperature = <65000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map1 {
|
||||
trip = <&soc_active1>;
|
||||
cooling-device = <&fan 1 1>;
|
||||
};
|
||||
map2 {
|
||||
trip = <&soc_active2>;
|
||||
cooling-device = <&fan 2 2>;
|
||||
};
|
||||
map3 {
|
||||
trip = <&soc_active3>;
|
||||
cooling-device = <&fan 3 3>;
|
||||
};
|
||||
map4 {
|
||||
trip = <&soc_active4>;
|
||||
cooling-device = <&fan 4 4>;
|
||||
};
|
||||
map5 {
|
||||
trip = <&soc_active5>;
|
||||
cooling-device = <&fan 5 5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
|
||||
num-cs = <1>;
|
||||
|
||||
pmic@0 {
|
||||
compatible = "rockchip,rk806";
|
||||
spi-max-frequency = <1000000>;
|
||||
reg = <0x0>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
vcc3-supply = <&vcc5v0_sys>;
|
||||
vcc4-supply = <&vcc5v0_sys>;
|
||||
vcc5-supply = <&vcc5v0_sys>;
|
||||
vcc6-supply = <&vcc5v0_sys>;
|
||||
vcc7-supply = <&vcc5v0_sys>;
|
||||
vcc8-supply = <&vcc5v0_sys>;
|
||||
vcc9-supply = <&vcc5v0_sys>;
|
||||
vcc10-supply = <&vcc5v0_sys>;
|
||||
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
vcc12-supply = <&vcc5v0_sys>;
|
||||
vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcca-supply = <&vcc5v0_sys>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
rk806_dvs1_null: dvs1-null-pins {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs2_null: dvs2-null-pins {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs3_null: dvs3-null-pins {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_gpu_s0";
|
||||
regulator-enable-ramp-delay = <400>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_lit_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_log_s0: dcdc-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_log_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <750000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_vdenc_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_ddr_s0: dcdc-reg5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_ddr_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <850000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd2_ddr_s3: dcdc-reg6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vdd2_ddr_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_2v0_pldo_s3: dcdc-reg7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2000000>;
|
||||
regulator-max-microvolt = <2000000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_2v0_pldo_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <2000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_s3: dcdc-reg8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc_3v3_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vddq_ddr_s0: dcdc-reg9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vddq_ddr_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8_s3: dcdc-reg10 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
avcc_1v8_s0: pldo-reg1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "avcc_1v8_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8_s0: pldo-reg2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
avdd_1v2_s0: pldo-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-name = "avdd_1v2_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_s0: pldo-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_3v3_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd_s0: pldo-reg5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vccio_sd_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
pldo6_s3: pldo-reg6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "pldo6_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_s3: nldo-reg1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdd_0v75_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <750000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_ddr_pll_s0: nldo-reg2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdd_ddr_pll_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <850000>;
|
||||
};
|
||||
};
|
||||
|
||||
avdd_0v75_s0: nldo-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "avdd_0v75_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v85_s0: nldo-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdd_0v85_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_s0: nldo-reg5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdd_0v75_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-0 = <&uart2m0_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -0,0 +1,235 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
|
||||
CONFIG_ROCKCHIP_RK3588=y
|
||||
CONFIG_ROCKCHIP_BOOTDEV="mmc 0"
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_ROCKCHIP_HWID_DTB=y
|
||||
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_ROCKCHIP_NEW_IDB=y
|
||||
CONFIG_ROCKCHIP_EMMC_IOMUX=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RK3588=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3588-mixtile-core3588e"
|
||||
CONFIG_DEBUG_UART=y
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_AVB=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x04000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_DTIMG=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_LZMADEC is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_MTD_BLK=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
# CONFIG_NET_TFTP_VARS is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_SCMI=y
|
||||
CONFIG_SPL_CLK_SCMI=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_SCMI_FIRMWARE=y
|
||||
CONFIG_SPL_SCMI_FIRMWARE=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_ROCKCHIP_GPIO_V2=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_RK8XX_PWRKEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_MISC_DECOMPRESS=y
|
||||
CONFIG_SPL_MISC_DECOMPRESS=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=80000000
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_SPI_FLASH_XTX=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_RGMII=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
CONFIG_PCIE_DW_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
|
||||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
|
||||
CONFIG_PHY_ROCKCHIP_USBDP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_FUEL_GAUGE=y
|
||||
CONFIG_POWER_FG_CW201X=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_SPI_RK8XX=y
|
||||
CONFIG_DM_POWER_DELIVERY=y
|
||||
CONFIG_TYPEC_TCPM=y
|
||||
CONFIG_TYPEC_TCPCI=y
|
||||
CONFIG_TYPEC_HUSB311=y
|
||||
CONFIG_TYPEC_FUSB302=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_RK860X=y
|
||||
CONFIG_CHARGER_BQ25700=y
|
||||
CONFIG_CHARGER_BQ25890=y
|
||||
CONFIG_DM_CHARGE_DISPLAY=y
|
||||
CONFIG_CHARGE_ANIMATION=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_DM_RAMDISK=y
|
||||
CONFIG_RAMDISK_RO=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_BASE=0xFEB50000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_LIB_RAND=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_XBC=y
|
||||
CONFIG_LZ4=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_AVB_LIBAVB=y
|
||||
CONFIG_AVB_LIBAVB_AB=y
|
||||
CONFIG_AVB_LIBAVB_ATX=y
|
||||
CONFIG_AVB_LIBAVB_USER=y
|
||||
CONFIG_RK_AVB_LIBAVB_USER=y
|
||||
@ -0,0 +1,60 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rk3588.dtsi"
|
||||
#include "rk3588-u-boot.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Mixtile Core 3588E";
|
||||
compatible = "mixtile,core3588e", "rockchip,rk3588";
|
||||
|
||||
vcc12v_dcin: vcc12v-dcin {
|
||||
u-boot,dm-pre-reloc;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc12v_dcin";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
u-boot,dm-pre-reloc;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
|
||||
adc-keys {
|
||||
compatible = "adc-keys";
|
||||
io-channels = <&saradc 1>;
|
||||
io-channel-names = "buttons";
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
u-boot,dm-pre-reloc;
|
||||
status = "okay";
|
||||
|
||||
volumeup-key {
|
||||
u-boot,dm-pre-reloc;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
label = "volume up";
|
||||
press-threshold-microvolt = <1750>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0_otg {
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user