181 lines
6.4 KiB
Diff
181 lines
6.4 KiB
Diff
From 7b87d738d2882cac85478fc637d573b8d99ad1da Mon Sep 17 00:00:00 2001
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From: Icenowy Zheng <icenowy@aosc.io>
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Date: Sat, 23 Dec 2017 00:18:22 +0800
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Subject: [PATCH 12/35] pinctrl: sunxi: add support for H6 R_PIO pin controller
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Allwinner H6 SoC has a R_PIO pin controller like other Allwinner SoCs,
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which controls the PL and PM pin banks.
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Add support for it.
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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---
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drivers/pinctrl/sunxi/Kconfig | 4 +
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drivers/pinctrl/sunxi/Makefile | 1 +
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drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 129 ++++++++++++++++++++++++++++
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3 files changed, 134 insertions(+)
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create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
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diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
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index 5de1f63..95282cd 100644
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--- a/drivers/pinctrl/sunxi/Kconfig
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+++ b/drivers/pinctrl/sunxi/Kconfig
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@@ -81,4 +81,8 @@ config PINCTRL_SUN50I_H6
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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+config PINCTRL_SUN50I_H6_R
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+ def_bool ARM64 && ARCH_SUNXI
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+ select PINCTRL_SUNXI
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+
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endif
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diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
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index 3c4aec6..adb8443 100644
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--- a/drivers/pinctrl/sunxi/Makefile
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+++ b/drivers/pinctrl/sunxi/Makefile
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@@ -19,5 +19,6 @@ obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o
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obj-$(CONFIG_PINCTRL_SUN8I_V3S) += pinctrl-sun8i-v3s.o
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obj-$(CONFIG_PINCTRL_SUN50I_H5) += pinctrl-sun50i-h5.o
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obj-$(CONFIG_PINCTRL_SUN50I_H6) += pinctrl-sun50i-h6.o
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+obj-$(CONFIG_PINCTRL_SUN50I_H6_R) += pinctrl-sun50i-h6-r.o
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obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o
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obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o
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diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
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new file mode 100644
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index 0000000..3015a341
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--- /dev/null
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+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
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@@ -0,0 +1,129 @@
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+/*
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+ * Allwinner H6 R_PIO pin controller driver
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+ *
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+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
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+ *
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+ * Based on pinctrl-sun6i-a31-r.c, which is:
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+ * Copyright (C) 2014 Boris Brezillon
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+ * Boris Brezillon <boris.brezillon@free-electrons.com>
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+ * Copyright (C) 2014 Maxime Ripard
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+ * Maxime Ripard <maxime.ripard@free-electrons.com>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/of.h>
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+#include <linux/of_device.h>
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+#include <linux/pinctrl/pinctrl.h>
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+#include <linux/reset.h>
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+
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+#include "pinctrl-sunxi.h"
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+
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+static const struct sunxi_desc_pin sun50i_h6_r_pins[] = {
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_uart"), /* TX */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_uart"), /* RX */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_pwm"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_cir_rx"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION(0x2, "s_w1"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
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+ /* Hole */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2), /* PM_EINT2 */
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+ SUNXI_FUNCTION(0x3, "1wire")),
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */
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+ SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
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+ SUNXI_FUNCTION(0x0, "gpio_in"),
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+ SUNXI_FUNCTION(0x1, "gpio_out"),
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+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */
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+};
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+
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+static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_data = {
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+ .pins = sun50i_h6_r_pins,
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+ .npins = ARRAY_SIZE(sun50i_h6_r_pins),
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+ .pin_base = PL_BASE,
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+ .irq_banks = 2,
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+};
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+
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+static int sun50i_h6_r_pinctrl_probe(struct platform_device *pdev)
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+{
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+ return sunxi_pinctrl_init(pdev,
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+ &sun50i_h6_r_pinctrl_data);
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+}
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+
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+static const struct of_device_id sun50i_h6_r_pinctrl_match[] = {
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+ { .compatible = "allwinner,sun50i-h6-r-pinctrl", },
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+ {}
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+};
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+
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+static struct platform_driver sun50i_h6_r_pinctrl_driver = {
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+ .probe = sun50i_h6_r_pinctrl_probe,
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+ .driver = {
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+ .name = "sun50i-h6-r-pinctrl",
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+ .of_match_table = sun50i_h6_r_pinctrl_match,
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+ },
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+};
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+builtin_platform_driver(sun50i_h6_r_pinctrl_driver);
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--
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2.7.4
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