2231 lines
58 KiB
Diff
2231 lines
58 KiB
Diff
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
|
|
index 6bdbf7d..ccab786 100644
|
|
--- a/arch/arm64/boot/dts/Makefile
|
|
+++ b/arch/arm64/boot/dts/Makefile
|
|
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARM64) += gxbb_p200.dtb gxbb_p200_2G.dtb \
|
|
gxbb_p201.dtb odroidc2.dtb i7_pro.dtb \
|
|
gxbb_p200_1G_wetek_hub.dtb gxbb_p200_2G_wetek_play_2.dtb \
|
|
gxl_p230_2g.dtb meson64_odroidc2.dtb \
|
|
+ meson-gxl-s905x-libretech-cc.dtb \
|
|
gxl_p231_1g.dtb gxl_p231_2g.dtb \
|
|
gxbb_p200_2G_vegas95.dtb kvim.dtb \
|
|
gxm_q200_2g.dtb gxm_q200_3g.dtb \
|
|
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
|
|
new file mode 100644
|
|
index 0000000..196eeeb
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
|
|
@@ -0,0 +1,1147 @@
|
|
+/*
|
|
+ * arch/arm64/boot/dts/amlogic/gxl_p212.dts
|
|
+ *
|
|
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License as published by
|
|
+ * the Free Software Foundation; either version 2 of the License, or
|
|
+ * (at your option) any later version.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful, but WITHOUT
|
|
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
+ * more details.
|
|
+ *
|
|
+*/
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+#include <dt-bindings/clock/gxl.h>
|
|
+#include <dt-bindings/gpio/gxl.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/reset/aml_gxl.h>
|
|
+#include "mesongxl.dtsi"
|
|
+/ {
|
|
+ model = "Amlogic";
|
|
+ amlogic-dt-id = "gxl_p212_2g";
|
|
+ compatible = "amlogic, Gxbb";
|
|
+ interrupt-parent = <&gic>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart_AO;
|
|
+ serial1 = &uart_A;
|
|
+ serial2 = &uart_B;
|
|
+ serial3 = &uart_C;
|
|
+ serial4 = &uart_AO_B;
|
|
+ };
|
|
+
|
|
+ memory@00000000 {
|
|
+ device_type = "memory";
|
|
+ linux,usable-memory = <0x0 0x100000 0x0 0x7ff00000>;
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+ /* global autoconfigured region for contiguous allocations */
|
|
+ secmon_reserved:linux,secmon {
|
|
+ compatible = "amlogic, aml_secmon_memory";
|
|
+ reg = <0x0 0x10000000 0x0 0x200000>;
|
|
+ no-map;
|
|
+ };
|
|
+ secos_reserved:linux,secos {
|
|
+ status = "disable";
|
|
+ compatible = "amlogic, aml_secos_memory";
|
|
+ reg = <0x0 0x05300000 0x0 0x2000000>;
|
|
+ no-map;
|
|
+ };
|
|
+ pstore:aml_pstore {
|
|
+ compatible = "amlogic, pstore";
|
|
+ reg = <0x0 0x07300000 0x0 0x100000>;
|
|
+ no-map;
|
|
+ };
|
|
+ fb_reserved:linux,meson-fb {
|
|
+ compatible = "amlogic, fb-memory";
|
|
+ size = <0x0 0x2000000>;
|
|
+ no-map;
|
|
+ };
|
|
+
|
|
+ di_reserved:linux,di {
|
|
+ compatible = "amlogic, di-mem";
|
|
+ size = <0x0 0x1e00000>; //10x1920x1088x3/2=30M
|
|
+ //no-map;
|
|
+ };
|
|
+
|
|
+ ion_reserved:linux,ion-dev {
|
|
+ compatible = "amlogic, idev-mem";
|
|
+ size = <0x0 0x3000000>;
|
|
+ };
|
|
+
|
|
+ /* vdin0 */
|
|
+// vdin0_reserved:linux,vdin0 {
|
|
+// compatible = "amlogic, vdin_memory";
|
|
+ /* 1920x1080x2x4 =17M */
|
|
+// size = <0x0 0x01000000>;
|
|
+// };
|
|
+ /* vdin1 */
|
|
+// vdin1_reserved:linux,vdin1 {
|
|
+// compatible = "amlogic, vdin_memory";
|
|
+ /* 1920x1080x2x4 =17M */
|
|
+// size = <0x0 0x01000000>;
|
|
+// };
|
|
+ /* POST PROCESS MANAGER */
|
|
+ ppmgr_reserved:linux,ppmgr {
|
|
+ compatible = "shared-dma-pool";
|
|
+ size = <0x0 0x0>;
|
|
+ };
|
|
+
|
|
+ codec_mm_cma:linux,codec_mm_cma {
|
|
+ compatible = "shared-dma-pool";
|
|
+ reusable;
|
|
+ size = <0x0 0xc000000>;
|
|
+ alignment = <0x0 0x400000>;
|
|
+ linux,contiguous-region;
|
|
+ };
|
|
+ picdec_cma_reserved:linux,picdec {
|
|
+ compatible = "shared-dma-pool";
|
|
+ reusable;
|
|
+ size = <0x0 0x0>;
|
|
+ alignment = <0x0 0x0>;
|
|
+ linux,contiguous-region;
|
|
+ };
|
|
+ /* codec shared reserved */
|
|
+ codec_mm_reserved:linux,codec_mm_reserved {
|
|
+ compatible = "amlogic, codec-mm-reserved";
|
|
+ size = <0x0 0x4100000>;
|
|
+ alignment = <0x0 0x100000>;
|
|
+ //no-map;
|
|
+ };
|
|
+ /*vm_reserved:linux,vm {
|
|
+ compatible = "amlogic, vm_memory";
|
|
+ size = <0x0 0x2000000>;
|
|
+ };*/
|
|
+
|
|
+ };
|
|
+
|
|
+ sysled {
|
|
+ compatible = "amlogic, sysled";
|
|
+ dev_name = "sysled";
|
|
+ status = "okay";
|
|
+ led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
|
|
+ led_active_low = <1>;
|
|
+ };
|
|
+
|
|
+ meson-vout {
|
|
+ compatible = "amlogic, meson-vout";
|
|
+ dev_name = "meson-vout";
|
|
+ status = "okay";
|
|
+ };
|
|
+ meson-fb {
|
|
+ compatible = "amlogic, meson-fb";
|
|
+ memory-region = <&fb_reserved>;
|
|
+ dev_name = "meson-fb";
|
|
+ status = "okay";
|
|
+ interrupts = <0 3 1
|
|
+ 0 89 1>;
|
|
+ interrupt-names = "viu-vsync", "rdma";
|
|
+ mem_size = <0x01800000 0x00100000>; /* fb0/fb1 memory size */
|
|
+ display_mode_default = "1080p60hz";
|
|
+ scale_mode = <1>; /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
|
|
+ display_size_default = <1920 1080 1920 3240 32>; //1920*1080*4*3 = 0x17BB000
|
|
+ };
|
|
+ ge2d {
|
|
+ compatible = "amlogic, ge2d";
|
|
+ dev_name = "ge2d";
|
|
+ status = "okay";
|
|
+ interrupts = <0 150 1>;
|
|
+ interrupt-names = "ge2d";
|
|
+ clocks = <&clock CLK_VAPB_0>,
|
|
+ <&clock CLK_GE2D>;
|
|
+ clock-names = "clk_vapb_0",
|
|
+ "clk_ge2d";
|
|
+ resets = <&clock GCLK_IDX_GE2D>;
|
|
+ reset-names = "ge2d";
|
|
+ };
|
|
+ codec_io {
|
|
+ compatible = "amlogic, codec_io";
|
|
+ #address-cells=<2>;
|
|
+ #size-cells=<2>;
|
|
+ ranges;
|
|
+ io_cbus_base{
|
|
+ reg = <0x0 0xC1100000 0x0 0x100000>;
|
|
+ };
|
|
+ io_dos_base{
|
|
+ reg = <0x0 0xc8820000 0x0 0x10000>;
|
|
+ };
|
|
+ io_hiubus_base{
|
|
+ reg = <0x0 0xc883c000 0x0 0x2000>;
|
|
+ };
|
|
+ io_aobus_base{
|
|
+ reg = <0x0 0xc8100000 0x0 0x100000>;
|
|
+ };
|
|
+ io_vcbus_base{
|
|
+ reg = <0x0 0xd0100000 0x0 0x40000>;
|
|
+ };
|
|
+ io_dmc_base{
|
|
+ reg = <0x0 0xc8838000 0x0 0x400>;
|
|
+ };
|
|
+ };
|
|
+ codec_mm {
|
|
+ compatible = "amlogic, codec, mm";
|
|
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
|
|
+ dev_name = "codec_mm";
|
|
+ status = "okay";
|
|
+ };
|
|
+ ethmac: ethernet@0xc9410000 {
|
|
+ compatible = "amlogic, gxbb-rmii-dwmac";
|
|
+ reg = <0x0 0xc9410000 0x0 0x10000
|
|
+ 0x0 0xc8834540 0x0 0x8
|
|
+ 0x0 0xc8834558 0x0 0xc>;
|
|
+ interrupts = <0 8 1>;
|
|
+ phy-mode= "rmii";
|
|
+ pinctrl-names = "internal_eth_pins";
|
|
+ pinctrl-0 = <&internal_eth_pins>;
|
|
+ mc_val = <0x1800>;
|
|
+ resets = <&clock GCLK_IDX_ETHERNET>;
|
|
+ reset-names = "ethpower";
|
|
+ interrupt-names = "macirq";
|
|
+ clocks = <&clock CLK_81>;
|
|
+ clock-names = "ethclk81";
|
|
+ internal_phy=<1>;
|
|
+ };
|
|
+ mesonstream {
|
|
+ compatible = "amlogic, codec, streambuf";
|
|
+ dev_name = "mesonstream";
|
|
+ status = "okay";
|
|
+ resets = <&clock GCLK_IDX_HIU_PARSER_TOP
|
|
+ &clock GCLK_IDX_VPU_INTR
|
|
+ &clock GCLK_IDX_DEMUX
|
|
+ &clock GCLK_IDX_DOS>;
|
|
+ reset-names = "parser_top",
|
|
+ "vpu_intr",
|
|
+ "demux",
|
|
+ "vdec";
|
|
+ };
|
|
+
|
|
+ amvideocap {
|
|
+ compatible = "amlogic, amvideocap";
|
|
+ dev_name = "amvideocap.0";
|
|
+ status = "okay";
|
|
+ max_size = <8>;//8M
|
|
+ };
|
|
+
|
|
+ ion_dev {
|
|
+ compatible = "amlogic, ion_dev";
|
|
+ memory-region = <&ion_reserved>;
|
|
+ };
|
|
+
|
|
+ vdec {
|
|
+ compatible = "amlogic, vdec";
|
|
+ dev_name = "vdec.0";
|
|
+ status = "okay";
|
|
+ interrupts = <0 3 1
|
|
+ 0 23 1
|
|
+ 0 32 1
|
|
+ 0 43 1
|
|
+ 0 44 1
|
|
+ 0 45 1>;
|
|
+ interrupt-names = "vsync",
|
|
+ "demux",
|
|
+ "parser",
|
|
+ "mailbox_0",
|
|
+ "mailbox_1",
|
|
+ "mailbox_2";
|
|
+ };
|
|
+ picdec {
|
|
+ compatible = "amlogic, picdec";
|
|
+ memory-region = <&picdec_cma_reserved>;
|
|
+ dev_name = "picdec";
|
|
+ status = "okay";
|
|
+ };
|
|
+ ppmgr {
|
|
+ compatible = "amlogic, ppmgr";//to match of_device_id's compatible member
|
|
+ memory-region = <&ppmgr_reserved>;
|
|
+ dev_name = "ppmgr";
|
|
+ status = "okay";
|
|
+ };
|
|
+ deinterlace {
|
|
+ compatible = "amlogic, deinterlace";
|
|
+ status = "okay";
|
|
+ memory-region = <&di_reserved>;
|
|
+ interrupts = <0 46 1
|
|
+ 0 6 1>;
|
|
+ interrupt-names = "de_irq",
|
|
+ "timerc";
|
|
+ buffer-size = <3133440>; //1920x1088x3/2
|
|
+ hw-version = <2>;
|
|
+ };
|
|
+/* vdin0 {
|
|
+ compatible = "amlogic, vdin";
|
|
+ memory-region = <&vdin0_reserved>;
|
|
+ dev_name = "vdin0";
|
|
+ status = "ok";
|
|
+ reserve-iomap = "true";
|
|
+ interrupts = <0 83 1>;
|
|
+ rdma-irq = <2>;
|
|
+ clocks = <&clock CLK_XTAL>,
|
|
+ <&clock CLK_VID_LOCK_CLK>;
|
|
+ clock-names = "xtal", "cts_vid_lock_clk";
|
|
+ vdin_id = <0>;
|
|
+ };
|
|
+ vdin {
|
|
+ compatible = "amlogic, vdin";
|
|
+ memory-region = <&vdin1_reserved>;
|
|
+ dev_name = "vdin1";
|
|
+ status = "ok";
|
|
+ reserve-iomap = "true";
|
|
+ interrupts = <0 85 1>;
|
|
+ rdma-irq = <4>;
|
|
+ clocks = <&clock CLK_XTAL>,
|
|
+ <&clock CLK_VID_LOCK_CLK>;
|
|
+ clock-names = "xtal", "cts_vid_lock_clk";
|
|
+ vdin_id = <1>;
|
|
+ };*/
|
|
+ amvdec_656in0 {
|
|
+ compatible = "amlogic, amvdec_656in";
|
|
+ dev_name = "amvdec_656in0";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xd0048000 0x0 0x7c>;
|
|
+ clocks = <&clock CLK_FPLL_DIV2>,
|
|
+ <&clock CLK_BT656_CLK0>;
|
|
+ clock-names = "fclk_div2", "cts_bt656_clk0";
|
|
+ bt656_id = <0>;
|
|
+ };
|
|
+ amvdec_656in1 {
|
|
+ compatible = "amlogic, amvdec_656in";
|
|
+ dev_name = "amvdec_656in1";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xd0050000 0x0 0x7c>;
|
|
+ clocks = <&clock CLK_FPLL_DIV2>,
|
|
+ <&clock CLK_BT656_CLK1>;
|
|
+ clock-names = "fclk_div2", "cts_bt656_clk1";
|
|
+ bt656_id = <1>;
|
|
+ };
|
|
+ amlvecm {
|
|
+ compatible = "amlogic, vecm";
|
|
+ dev_name = "aml_vecm";
|
|
+ status = "okay";
|
|
+ gamma_en = <0>;/*1:enabel ;0:disable*/
|
|
+ wb_en = <0>;/*1:enabel ;0:disable*/
|
|
+ cm_en = <0>;/*1:enabel ;0:disable*/
|
|
+ };
|
|
+ amvenc_avc{
|
|
+ compatible = "amlogic, amvenc_avc";
|
|
+ //memory-region = <&amvenc_avc_reserved>;
|
|
+ //memory-region = <&avc_cma_reserved>;
|
|
+ dev_name = "amvenc_avc";
|
|
+ status = "okay";
|
|
+ interrupts = <0 45 1>;
|
|
+ interrupt-names = "mailbox_2";
|
|
+ };
|
|
+
|
|
+
|
|
+ /*vm {
|
|
+ compatible = "amlogic, vm";
|
|
+ memory-region = <&vm_reserved>;
|
|
+ dev_name = "vm";
|
|
+ status = "okay";
|
|
+ };*/
|
|
+
|
|
+ vpu {
|
|
+ compatible = "amlogic, vpu";
|
|
+ dev_name = "vpu";
|
|
+ status = "ok";
|
|
+ clk_level = <7>;
|
|
+ /** 0: 100.0M 1: 166.7M 2: 200.0M
|
|
+ 3: 250.0M 4: 333.3M 5: 400.0M
|
|
+ 6: 500.0M 7: 666.7M */
|
|
+ };
|
|
+ //if use bt, open it
|
|
+ bt-dev{
|
|
+ compatible = "amlogic, bt-dev";
|
|
+ dev_name = "bt-dev";
|
|
+ status = "okay";
|
|
+ gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ rtc{
|
|
+ compatible = "amlogic, aml_vrtc";
|
|
+ alarm_reg_addr = <0xc81000a8>;
|
|
+ timer_e_addr = <0xc1109988>;
|
|
+ init_date = "2015/01/01";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ wifi{
|
|
+ compatible = "amlogic, aml_wifi";
|
|
+ dev_name = "aml_wifi";
|
|
+ status = "okay";
|
|
+ interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
|
|
+ interrupts = < 0 68 4>;
|
|
+ irq_trigger_type = "GPIO_IRQ_LOW";
|
|
+ power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
|
|
+ dhd_static_buf; //if use bcm wifi, config dhd_static_buf and 32k as bellow
|
|
+ pinctrl-names = "wifi_32k_pins";
|
|
+ pinctrl-0 = <&wifi_32k_pins>;
|
|
+ };
|
|
+ emmc{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0074000 0x0 0x2000>;
|
|
+ interrupts = < 0 218 1>;
|
|
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
|
|
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done &emmc_all_pins>;
|
|
+ emmc{
|
|
+ status = "disabled";
|
|
+ pinname = "emmc";
|
|
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
|
|
+ caps = "MMC_CAP_8_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE","MMC_CAP_1_8V_DDR",
|
|
+ "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23";
|
|
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
|
|
+ f_min = <300000>;
|
|
+ f_max = <100000000>;
|
|
+ max_req_size = <0x20000>; /**256KB*/
|
|
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
|
|
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
|
|
+ card_type = <1>; /* 1:mmc card(include eMMC), 2:sd card(include tSD), */
|
|
+ };
|
|
+ };
|
|
+ sd{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0072000 0x0 0x2000>;
|
|
+ interrupts = < 0 217 1
|
|
+ 0 67 1
|
|
+ 0 69 1>;
|
|
+ pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins", "sd_1bit_pins","sd_clk_cmd_uart_pins","sd_1bit_uart_pins", "sd_to_ao_uart_pins", "ao_to_sd_uart_pins","ao_to_sd_jtag_pins","sd_to_ao_jtag_pins";
|
|
+ pinctrl-0 = <&sd_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&sd_all_pins>;
|
|
+ pinctrl-2 = <&sd_1bit_pins>;
|
|
+ pinctrl-3 = <&sd_clk_cmd_uart_pins>;
|
|
+ pinctrl-4 = <&sd_1bit_uart_pins>;
|
|
+ pinctrl-5 = <&sd_to_ao_uart_pins>;
|
|
+ pinctrl-6 = <&ao_to_sd_uart_pins>;
|
|
+ pinctrl-7 = <&ao_to_sd_jtag_pins>;
|
|
+ pinctrl-8 = <&sd_to_ao_jtag_pins>;
|
|
+ sd{
|
|
+ status = "okay";
|
|
+ pinname = "sd";
|
|
+ ocr_avail = <0x00200080>; // 3.3:0x200000, 1.8+3.3:0x00200080
|
|
+ caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED";
|
|
+ //"MMC_CAP_UHS_SDR12",
|
|
+ //"MMC_CAP_UHS_SDR25","MMC_CAP_UHS_SDR50",
|
|
+ //"MMC_CAP_UHS_SDR104";
|
|
+ f_min = <400000>;
|
|
+ f_max = <100000000>;
|
|
+ max_req_size = <0x20000>; /**128KB*/
|
|
+ gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
|
|
+ jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
|
|
+ gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
|
|
+ irq_in = <3>;
|
|
+ irq_out = <5>;
|
|
+ card_type = <5>; /* 0:unknown, 1:mmc card(include eMMC), 2:sd card(include tSD), 3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, 5:NON sdio device(means sd/mmc card), other:reserved */
|
|
+ };
|
|
+ };
|
|
+ sdio{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0070000 0x0 0x2000>;
|
|
+ interrupts = < 0 216 4>;
|
|
+ pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
|
|
+ pinctrl-0 = <&sdio_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&sdio_all_pins>;
|
|
+ sdio{
|
|
+ status = "okay";
|
|
+ pinname = "sdio";
|
|
+ ocr_avail = <0x00200080>; /*3.3:0x200000, 1.8+3.3:0x00200080 */
|
|
+ caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE",
|
|
+ "MMC_CAP_UHS_SDR12","MMC_CAP_UHS_SDR25",
|
|
+ "MMC_CAP_UHS_SDR50","MMC_CAP_UHS_SDR104",
|
|
+ "MMC_PM_KEEP_POWER","MMC_CAP_SDIO_IRQ";
|
|
+ f_min = <400000>;
|
|
+ f_max = <200000000>;
|
|
+ max_req_size = <0x20000>; /**128KB*/
|
|
+ card_type = <3>; /*3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, */
|
|
+ };
|
|
+ };
|
|
+ nand{
|
|
+ compatible = "amlogic, aml_nand";
|
|
+ dev_name = "nand";
|
|
+ status = "disabled";
|
|
+ reg = <0x0 0xd0074800 0x0 0x200>;
|
|
+ interrupts = < 0 34 1 >;
|
|
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_pins_only";
|
|
+ pinctrl-0 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
|
|
+ pinctrl-1 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
|
|
+ pinctrl-2 = <&nand_cs_pins>;
|
|
+ device_id = <0>;
|
|
+ plat-names = "nandnormal";
|
|
+ plat-num = <1>;
|
|
+ plat-part-0 = <&normal>;
|
|
+ normal: normal{
|
|
+ enable_pad ="ce0","ce1","ce2","ce3";
|
|
+ busy_pad = "rb0";
|
|
+ };
|
|
+ };
|
|
+ aml_nftl{
|
|
+ compatible = "amlogic, nftl";
|
|
+ /* config nftl here */
|
|
+
|
|
+ };
|
|
+ /*aml_cams{
|
|
+ compatible = "amlogic, cams_prober";
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_CAMERA_24M>;
|
|
+ clock-names = "clk_camera_24";
|
|
+ pinctrl-names = "gpio";
|
|
+ pinctrl-0 = <&aml_cam_gpio_pins> ;
|
|
+ cam_0{
|
|
+ cam_name = "sp2518";
|
|
+ front_back = <0>;
|
|
+ i2c_bus = "i2c_bus_a";
|
|
+ gpio_pwdn-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_HIGH>;
|
|
+ gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>;
|
|
+ mirror_flip = <1>;
|
|
+ vertical_flip = <1>;
|
|
+ spread_spectrum = <0>; //0:none; 1:0.3%; 2:0.6%; 3:1.25%; 4:2.5%; 5:5%
|
|
+ bt_path = "gpio";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };*/
|
|
+ partitions: partitions{
|
|
+ parts = <11>;
|
|
+ part-0 = <&logo>;
|
|
+ part-1 = <&recovery>;
|
|
+ part-2 = <&rsv>;
|
|
+ part-3 = <&tee>;
|
|
+ part-4 = <&crypt>;
|
|
+ part-5 = <&misc>;
|
|
+ part-6 = <&instaboot>;
|
|
+ part-7 = <&boot>;
|
|
+ part-8 = <&system>;
|
|
+ part-9 = <&cache>;
|
|
+ part-10 = <&data>;
|
|
+
|
|
+ logo:logo{
|
|
+ pname = "logo";
|
|
+ size = <0x0 0x2000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ recovery:recovery{
|
|
+ pname = "recovery";
|
|
+ size = <0x0 0x2000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ rsv:rsv{
|
|
+ pname = "rsv";
|
|
+ size = <0x0 0x800000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ tee:tee{
|
|
+ pname = "tee";
|
|
+ size = <0x0 0x800000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ crypt:crypt{
|
|
+ pname = "crypt";
|
|
+ size = <0x0 0x2000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ misc:misc{
|
|
+ pname = "misc";
|
|
+ size = <0x0 0x2000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ instaboot:instaboot{
|
|
+ pname = "instaboot";
|
|
+ size = <0x0 0x20000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ boot:boot
|
|
+ {
|
|
+ pname = "boot";
|
|
+ size = <0x0 0x2000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ system:system
|
|
+ {
|
|
+ pname = "system";
|
|
+ size = <0x0 0x40000000>;
|
|
+ mask = <1>;
|
|
+ };
|
|
+ cache:cache
|
|
+ {
|
|
+ pname = "cache";
|
|
+ size = <0x0 0x20000000>;
|
|
+ mask = <2>;
|
|
+ };
|
|
+ data:data
|
|
+ {
|
|
+ pname = "data";
|
|
+ size = <0xffffffff 0xffffffff>;
|
|
+ mask = <4>;
|
|
+ };
|
|
+ };
|
|
+ unifykey{
|
|
+ compatible = "amlogic, unifykey";
|
|
+ status = "ok";
|
|
+
|
|
+ unifykey-num = <14>;
|
|
+ unifykey-index-0 = <&keysn_0>;
|
|
+ unifykey-index-1 = <&keysn_1>;
|
|
+ unifykey-index-2 = <&keysn_2>;
|
|
+ unifykey-index-3 = <&keysn_3>;
|
|
+ unifykey-index-4 = <&keysn_4>;
|
|
+ unifykey-index-5 = <&keysn_5>;
|
|
+ unifykey-index-6 = <&keysn_6>;
|
|
+ unifykey-index-7 = <&keysn_7>;
|
|
+ unifykey-index-8 = <&keysn_8>;
|
|
+ unifykey-index-9 = <&keysn_9>;
|
|
+ unifykey-index-10= <&keysn_10>;
|
|
+ unifykey-index-11= <&keysn_11>;
|
|
+ unifykey-index-12= <&keysn_12>;
|
|
+ unifykey-index-13= <&keysn_13>;
|
|
+
|
|
+ keysn_0: key_0{
|
|
+ key-name = "usid";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_1:key_1{
|
|
+ key-name = "mac";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_2:key_2{
|
|
+ key-name = "hdcp";
|
|
+ key-device = "secure";
|
|
+ key-type = "sha1";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_3:key_3{
|
|
+ key-name = "secure_boot_set";
|
|
+ key-device = "efuse";
|
|
+ key-permit = "write";
|
|
+ };
|
|
+ keysn_4:key_4{
|
|
+ key-name = "mac_bt";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ key-type = "mac";
|
|
+ };
|
|
+ keysn_5:key_5{
|
|
+ key-name = "mac_wifi";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ key-type = "mac";
|
|
+ };
|
|
+ keysn_6:key_6{
|
|
+ key-name = "hdcp2_tx";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_7:key_7{
|
|
+ key-name = "hdcp2_rx";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_8:key_8{
|
|
+ key-name = "widevinekeybox";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_9:key_9{
|
|
+ key-name = "deviceid";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_10:key_10{
|
|
+ key-name = "hdcp22_fw_private";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_11:key_11{
|
|
+ key-name = "PlayReadykeybox25";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_12:key_12{
|
|
+ key-name = "prpubkeybox";// PlayReady
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_13:key_13{
|
|
+ key-name = "prprivkeybox";// PlayReady
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ };//End unifykey
|
|
+ amhdmitx: amhdmitx{
|
|
+ compatible = "amlogic, amhdmitx";
|
|
+ dev_name = "amhdmitx";
|
|
+ status = "okay";
|
|
+ pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
|
|
+ pinctrl-0=<&hdmitx_hpd>;
|
|
+ pinctrl-1=<&hdmitx_ddc>;
|
|
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
|
|
+ interrupts = <0 57 1>;
|
|
+ interrupt-names = "hdmitx_hpd";
|
|
+ clocks = <&clock CLK_HDMITX_SYS &clock CLK_HDMITX_ENCP
|
|
+ &clock CLK_HDMITX_ENCI &clock CLK_HDMITX_PIXEL
|
|
+ &clock CLK_HDMITX_PHY &clock CLK_VID>;
|
|
+ clock-names = "hdmitx_clk_sys", "hdmitx_clk_encp", "hdmitx_clk_enci",
|
|
+ "hdmitx_clk_pixel", "hdmitx_clk_phy", "hdmitx_clk_vid";
|
|
+ gpio_i2c_en = <0x1>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+ };
|
|
+
|
|
+ aocec: aocec{
|
|
+ compatible = "amlogic, amlogic-aocec";
|
|
+ device_name = "aocec";
|
|
+ status = "okay";
|
|
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
|
|
+ vendor_id = <0x000000>; /* Refer to http://standards.ieee.org/develop/regauth/oui/oui.txt */
|
|
+ product_desc = "GXBB Mbox"; /* Max Chars: 16 */
|
|
+ cec_osd_string = "MBox"; /* Max Chars: 14 */
|
|
+ port_num = <1>;
|
|
+ arc_port_mask = <0x0>;
|
|
+ interrupts = <0 199 1>;
|
|
+ interrupt-names = "hdmi_aocec";
|
|
+ pinctrl-names = "hdmitx_aocec";
|
|
+ pinctrl-0=<&hdmitx_aocec>;
|
|
+ reg = <0x0 0xc810023c 0x0 0x4
|
|
+ 0x0 0xc8100000 0x0 0x200>;
|
|
+ };
|
|
+
|
|
+ tvout {
|
|
+ compatible = "amlogic, tvout";
|
|
+ dev_name = "tvout";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ i2c_gpio: i2c_gpio {
|
|
+ compatible = "i2c-gpio";
|
|
+ status = "okay";
|
|
+ dev_name = "i2c-gpio";
|
|
+ i2c-gpio,delay-us = <10>; /* 50 kHz */
|
|
+ gpios = <&gpio GPIOH_1 0
|
|
+ &gpio GPIOH_2 0>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ i2c-gpio,timeout-ms = <10>;
|
|
+ i2c_gpio_edid: i2c_gpio_edid {
|
|
+ compatible = "i2c-gpio-edid";
|
|
+ reg = <0x50 0x0 0x0 0x0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart_AO: serial@c81004c0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc81004c0 0x0 0x18>;
|
|
+ interrupts = <0 193 1>;
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ xtal_tick_en = <1>;
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ //pinctrl-0 = <&ao_uart_pins>;
|
|
+ support-sysrq = <0>; /* 0 not support , 1 support */
|
|
+ };
|
|
+ uart_A: serial@c11084c0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc11084c0 0x0 0x18>;
|
|
+ interrupts = <0 26 1>;
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 128 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&a_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART0>;
|
|
+ };
|
|
+ uart_B: serial@c11084dc {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc11084dc 0x0 0x18>;
|
|
+ interrupts = <0 75 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&b_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART1>;
|
|
+ };
|
|
+ uart_C: serial@c1108700 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc1108700 0x0 0x18>;
|
|
+ interrupts = <0 93 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&c_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART2>;
|
|
+ };
|
|
+ uart_AO_B: serial@c81004e0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc81004e0 0x0 0x18>;
|
|
+ interrupts = <0 197 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ao_b_uart_pins>;
|
|
+ };
|
|
+
|
|
+
|
|
+ canvas{
|
|
+ compatible = "amlogic, meson, canvas";
|
|
+ dev_name = "amlogic-canvas";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xc8838000 0x0 0x400>;
|
|
+ };
|
|
+
|
|
+ rdma{
|
|
+ compatible = "amlogic, meson, rdma";
|
|
+ dev_name = "amlogic-rdma";
|
|
+ status = "ok";
|
|
+ interrupts = <0 89 1>;
|
|
+ interrupt-names = "rdma";
|
|
+ };
|
|
+
|
|
+ dwc3: dwc3@c9000000 {
|
|
+ compatible = "synopsys, dwc3";
|
|
+ reg = <0x0 0xc9000000 0x0 0x100000>;
|
|
+ interrupts = <0 30 4>;
|
|
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
|
|
+ cpu-type = "gxl";
|
|
+ clock-src = "usb3.0";
|
|
+ };
|
|
+
|
|
+ usb2_phy: usb2phy@d0078000 {
|
|
+ compatible = "amlogic, amlogic-new-usb2";
|
|
+ portnum = <2>;
|
|
+ reg = <0x0 0xd0078000 0x0 0x80>;
|
|
+ };
|
|
+
|
|
+ usb3_phy: usb3phy@d0078080 {
|
|
+ compatible = "amlogic, amlogic-new-usb3";
|
|
+ portnum = <0>;
|
|
+ reg = <0x0 0xd0078080 0x0 0x20>;
|
|
+ };
|
|
+
|
|
+ dwc2_a {
|
|
+ compatible = "amlogic,dwc2";
|
|
+ device_name = "dwc2_a";
|
|
+ reg = <0x0 0xc9100000 0x0 0x40000>;
|
|
+ status = "okay";
|
|
+ interrupts = <0 31 4>;
|
|
+ pl-periph-id = <0>; /** lm name */
|
|
+ clock-src = "usb0"; /** clock src */
|
|
+ port-id = <0>; /** ref to mach/usb.h */
|
|
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
|
|
+ port-speed = <0>; /** 0: default, high, 1: full */
|
|
+ port-config = <0>; /** 0: default */
|
|
+ port-dma = <0>; /** 0: default, 1: single, 2: incr, 3: incr4, 4: incr8, 5: incr16, 6: disable*/
|
|
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
|
|
+ usb-fifo = <728>;
|
|
+ cpu-type = "gxl";
|
|
+ controller-type = <1>; /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
|
|
+ phy-reg = <0xd0078000>;
|
|
+ phy-reg-size = <0xa0>;
|
|
+ resets = <&clock GCLK_IDX_USB_GENERAL
|
|
+ &clock GCLK_IDX_MISC_USB1_TO_DDR
|
|
+ &clock GCLK_IDX_USB1>;
|
|
+ reset-names = "usb_general",
|
|
+ "usb1",
|
|
+ "usb1_to_ddr";
|
|
+ };
|
|
+
|
|
+
|
|
+ /* AUDIO MESON8 DEVICES */
|
|
+ i2s_dai: I2S {
|
|
+ #sound-dai-cells = <0>;
|
|
+ resets = <
|
|
+ &clock GCLK_IDX_AIU_AI_TOP_GLUE
|
|
+ &clock GCLK_IDX_AUD_BUF_ABD
|
|
+ &clock GCLK_IDX_AIU_I2S_OUT
|
|
+ &clock GCLK_IDX_AIU_AMCLK_MEASURE
|
|
+ &clock GCLK_IDX_AIU_AIFIFO2
|
|
+ &clock GCLK_IDX_AIU_AUD_MIXER
|
|
+ &clock GCLK_IDX_AIU_MIXER_REG
|
|
+ &clock GCLK_IDX_AIU_ADC
|
|
+ &clock GCLK_IDX_AIU_TOP_LEVEL
|
|
+ &clock GCLK_IDX_AIU_AOCLK
|
|
+ &clock GCLK_IDX_AUD_IN
|
|
+ >;
|
|
+ reset-names =
|
|
+ "top_glue",
|
|
+ "aud_buf",
|
|
+ "i2s_out",
|
|
+ "amclk_measure",
|
|
+ "aififo2",
|
|
+ "aud_mixer",
|
|
+ "mixer_reg",
|
|
+ "adc",
|
|
+ "top_level",
|
|
+ "aoclk",
|
|
+ "aud_in";
|
|
+ clocks = <&clock CLK_MPLL2>,
|
|
+ <&clock CLK_AMCLK>;
|
|
+ clock-names = "mpll2", "mclk";
|
|
+ compatible = "amlogic, aml-i2s-dai";
|
|
+ };
|
|
+ spdif_dai: SPDIF {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-spdif-dai";
|
|
+ resets = <
|
|
+ &clock GCLK_IDX_AIU_IEC958
|
|
+ &clock GCLK_IDX_AIU_ICE958_AMCLK
|
|
+ >;
|
|
+ reset-names =
|
|
+ "iec958",
|
|
+ "iec958_amclk";
|
|
+ clocks = <&clock CLK_MPLL1>,
|
|
+ <&clock CLK_I958>,
|
|
+ <&clock CLK_AMCLK>,
|
|
+ <&clock CLK_SPDIF>,
|
|
+ <&clock CLK_81>;
|
|
+ clock-names = "mpll1", "i958", "mclk", "spdif", "clk_81";
|
|
+ };
|
|
+ pcm_dai: PCM {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-pcm-dai";
|
|
+ pinctrl-names = "aml_audio_btpcm";
|
|
+ pinctrl-0 = <&audio_btpcm_pins>;
|
|
+ clocks = <&clock CLK_MPLL0>,
|
|
+ <&clock CLK_PCM_MCLK>,
|
|
+ <&clock CLK_PCM_SCLK>;
|
|
+ clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
|
|
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
|
|
+ };
|
|
+ i2s_plat: i2s_platform {
|
|
+ compatible = "amlogic, aml-i2s";
|
|
+ interrupts = <0 29 1>;
|
|
+ };
|
|
+ pcm_plat: pcm_platform {
|
|
+ compatible = "amlogic, aml-pcm";
|
|
+ };
|
|
+ spdif_codec: spdif_codec{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-spdif-codec";
|
|
+ pinctrl-names = "aml_audio_spdif";
|
|
+ pinctrl-0 = <&audio_spdif_pins>;
|
|
+ };
|
|
+ pcm_codec: pcm_codec{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, pcm2BT-codec";
|
|
+ };
|
|
+ /* endof AUDIO MESON8 DEVICES */
|
|
+
|
|
+ /* AUDIO board specific */
|
|
+ dummy_codec:dummy{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml_dummy_codec";
|
|
+ status = "disable";
|
|
+ };
|
|
+ amlogic_codec:t9015{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml_codec_T9015";
|
|
+ reg = <0x0 0xc8832000 0x0 0x14>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ aml_m8_snd {
|
|
+ compatible = "aml, aml_snd_m8";
|
|
+ status = "okay";
|
|
+ aml-sound-card,format = "i2s";
|
|
+ aml_sound_card,name = "AML-M8AUDIO";
|
|
+ aml,audio-routing =
|
|
+ "Ext Spk","LOUTL",
|
|
+ "Ext Spk","LOUTR";
|
|
+
|
|
+ mute_gpio-gpios = <&gpio GPIOH_5 0>;
|
|
+ mute_inv;
|
|
+ sleep_time = <100>;
|
|
+ hp_disable;
|
|
+ hp_paraments = <800 300 0 5 1>;
|
|
+ pinctrl-names = "aml_snd_m8";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
|
|
+ codec_list = <&codec0 &codec1 &codec2>;
|
|
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
|
|
+ cpudai0: cpudai0 {
|
|
+ sound-dai = <&i2s_dai>;
|
|
+ };
|
|
+ cpudai1: cpudai1 {
|
|
+ sound-dai = <&spdif_dai>;
|
|
+ };
|
|
+ cpudai2: cpudai2 {
|
|
+ sound-dai = <&pcm_dai>;
|
|
+ };
|
|
+ codec0: codec0 {
|
|
+ sound-dai = <&amlogic_codec>;
|
|
+ };
|
|
+ codec1: codec1 {
|
|
+ sound-dai = <&spdif_codec>;
|
|
+ };
|
|
+ codec2: codec2 {
|
|
+ sound-dai = <&pcm_codec>;
|
|
+ };
|
|
+ };
|
|
+ /* END OF AUDIO board specific */
|
|
+
|
|
+ gpio_keypad{
|
|
+ compatible = "amlogic, gpio_keypad";
|
|
+ status = "okay";
|
|
+ scan_period = <20>;
|
|
+ key_num = <1>;
|
|
+ key_name = "power";
|
|
+ key_code = <116>;
|
|
+ key_pin = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; /*"GPIOAO_2";*/
|
|
+ irq_keyup = <6>;
|
|
+ irq_keydown = <7>;
|
|
+ };
|
|
+ aml_sensor0: aml-sensor@0 {
|
|
+ compatible = "amlogic, aml-thermal";
|
|
+ device_name = "thermal";
|
|
+ #thermal-sensor-cells = <1>;
|
|
+ cooling_devices {
|
|
+ cpufreq_cool_cluster0 {
|
|
+ min_state = <1000000>;
|
|
+ dyn_coeff = <140>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "cpus";
|
|
+ device_type = "cpufreq";
|
|
+ };
|
|
+ cpucore_cool_cluster0 {
|
|
+ min_state = <1>;
|
|
+ dyn_coeff = <0>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "cpu_core_cluster0";
|
|
+ device_type = "cpucore";
|
|
+ };
|
|
+ gpufreq_cool {
|
|
+ min_state = <400>;
|
|
+ dyn_coeff = <437>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "mali";
|
|
+ device_type = "gpufreq";
|
|
+ };
|
|
+ gpucore_cool {
|
|
+ min_state = <1>;
|
|
+ dyn_coeff = <0>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "thermal_gpu_cores";
|
|
+ device_type = "gpucore";
|
|
+ };
|
|
+ };
|
|
+ cpu_cluster0:cpu_core_cluster0 {
|
|
+ #cooling-cells = <2>; /* min followed by max */
|
|
+ };
|
|
+ gpucore:thermal_gpu_cores {
|
|
+ #cooling-cells = <2>; /* min followed by max */
|
|
+ };
|
|
+ };
|
|
+ thermal-zones {
|
|
+ soc_thermal {
|
|
+ polling-delay = <1000>;
|
|
+ polling-delay-passive = <100>;
|
|
+ sustainable-power = <2150>;
|
|
+
|
|
+ thermal-sensors = <&aml_sensor0 3>;
|
|
+
|
|
+ trips {
|
|
+ switch_on: trip-point@0 {
|
|
+ temperature = <70000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ control: trip-point@1 {
|
|
+ temperature = <80000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ hot: trip-point@2 {
|
|
+ temperature = <85000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "hot";
|
|
+ };
|
|
+ critical: trip-point@3 {
|
|
+ temperature = <260000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cooling-maps {
|
|
+ cpufreq_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&cpus 0 4>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ cpucore_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&cpu_cluster0 0 3>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ gpufreq_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&gpu 0 4>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ gpucore_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&gpucore 0 2>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinmux {
|
|
+ audio_pins:audio_pin{
|
|
+ amlogic,setmask=<6 0x7800000>;
|
|
+ amlogic,clrmask=<6 0x07e0000>;
|
|
+ amlogic,pins = "GPIOH_6","GPIOH_7","GPIOH_8","GPIOH_9";
|
|
+ };
|
|
+
|
|
+ audio_spdif_pins:audio_pin1{
|
|
+ amlogic,setmask=<6 0x10000000>; /*spdif_out*/
|
|
+ amlogic,clrmask=<6 0x8000000>;
|
|
+ amlogic,pins ="GPIOH_4"; /*spdif_out*/
|
|
+ };
|
|
+
|
|
+ audio_btpcm_pins:audio_btpcm_pins{
|
|
+ /* BT PCM PINMUX SETTING*/
|
|
+ amlogic,setmask=<5 0xf00000>;
|
|
+ amlogic,clrmask=<5 0x3c33>;
|
|
+ amlogic,pins ="GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11";
|
|
+ };
|
|
+};
|
|
+&efuse {
|
|
+ status = "okay";
|
|
+};
|
|
+&audio_data{
|
|
+ status = "okay";
|
|
+};
|
|
+&defendkey {
|
|
+ status = "okay";
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/meson-gxl-s905x-libretech-cc.dts
|
|
new file mode 100644
|
|
index 0000000..511a267
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/meson-gxl-s905x-libretech-cc.dts
|
|
@@ -0,0 +1,1059 @@
|
|
+/*
|
|
+ * arch/arm64/boot/dts/amlogic/gxl_p212.dts
|
|
+ *
|
|
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License as published by
|
|
+ * the Free Software Foundation; either version 2 of the License, or
|
|
+ * (at your option) any later version.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful, but WITHOUT
|
|
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
+ * more details.
|
|
+ *
|
|
+*/
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+#include <dt-bindings/clock/gxl.h>
|
|
+#include <dt-bindings/gpio/gxl.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/reset/aml_gxl.h>
|
|
+#include "mesongxl.dtsi"
|
|
+/ {
|
|
+ model = "Amlogic";
|
|
+ amlogic-dt-id = "gxl_p212_2g";
|
|
+ compatible = "amlogic, Gxbb";
|
|
+ interrupt-parent = <&gic>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart_AO;
|
|
+ serial1 = &uart_A;
|
|
+ serial2 = &uart_B;
|
|
+ serial3 = &uart_C;
|
|
+ serial4 = &uart_AO_B;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ memory@00000000 {
|
|
+ device_type = "memory";
|
|
+ linux,usable-memory = <0x0 0x100000 0x0 0x7ff00000>;
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+ /* global autoconfigured region for contiguous allocations */
|
|
+ secmon_reserved:linux,secmon {
|
|
+ compatible = "amlogic, aml_secmon_memory";
|
|
+ reg = <0x0 0x10000000 0x0 0x200000>;
|
|
+ no-map;
|
|
+ };
|
|
+ secos_reserved:linux,secos {
|
|
+ status = "disable";
|
|
+ compatible = "amlogic, aml_secos_memory";
|
|
+ reg = <0x0 0x05300000 0x0 0x2000000>;
|
|
+ no-map;
|
|
+ };
|
|
+ pstore:aml_pstore {
|
|
+ compatible = "amlogic, pstore";
|
|
+ reg = <0x0 0x07300000 0x0 0x100000>;
|
|
+ no-map;
|
|
+ };
|
|
+ fb_reserved:linux,meson-fb {
|
|
+ compatible = "amlogic, fb-memory";
|
|
+ size = <0x0 0x2000000>;
|
|
+ no-map;
|
|
+ };
|
|
+
|
|
+ di_reserved:linux,di {
|
|
+ compatible = "amlogic, di-mem";
|
|
+ size = <0x0 0x1e00000>; //10x1920x1088x3/2=30M
|
|
+ //no-map;
|
|
+ };
|
|
+
|
|
+ ion_reserved:linux,ion-dev {
|
|
+ compatible = "amlogic, idev-mem";
|
|
+ size = <0x0 0x3000000>;
|
|
+ };
|
|
+
|
|
+ /* vdin0 */
|
|
+// vdin0_reserved:linux,vdin0 {
|
|
+// compatible = "amlogic, vdin_memory";
|
|
+ /* 1920x1080x2x4 =17M */
|
|
+// size = <0x0 0x01000000>;
|
|
+// };
|
|
+ /* vdin1 */
|
|
+// vdin1_reserved:linux,vdin1 {
|
|
+// compatible = "amlogic, vdin_memory";
|
|
+ /* 1920x1080x2x4 =17M */
|
|
+// size = <0x0 0x01000000>;
|
|
+// };
|
|
+ /* POST PROCESS MANAGER */
|
|
+ ppmgr_reserved:linux,ppmgr {
|
|
+ compatible = "shared-dma-pool";
|
|
+ size = <0x0 0x0>;
|
|
+ };
|
|
+
|
|
+ codec_mm_cma:linux,codec_mm_cma {
|
|
+ compatible = "shared-dma-pool";
|
|
+ reusable;
|
|
+ size = <0x0 0xc000000>;
|
|
+ alignment = <0x0 0x400000>;
|
|
+ linux,contiguous-region;
|
|
+ };
|
|
+ picdec_cma_reserved:linux,picdec {
|
|
+ compatible = "shared-dma-pool";
|
|
+ reusable;
|
|
+ size = <0x0 0x0>;
|
|
+ alignment = <0x0 0x0>;
|
|
+ linux,contiguous-region;
|
|
+ };
|
|
+ /* codec shared reserved */
|
|
+ codec_mm_reserved:linux,codec_mm_reserved {
|
|
+ compatible = "amlogic, codec-mm-reserved";
|
|
+ size = <0x0 0x4100000>;
|
|
+ alignment = <0x0 0x100000>;
|
|
+ //no-map;
|
|
+ };
|
|
+ /*vm_reserved:linux,vm {
|
|
+ compatible = "amlogic, vm_memory";
|
|
+ size = <0x0 0x2000000>;
|
|
+ };*/
|
|
+
|
|
+ };
|
|
+
|
|
+ sysled {
|
|
+ compatible = "amlogic, sysled";
|
|
+ dev_name = "sysled";
|
|
+ status = "okay";
|
|
+ led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
|
|
+ led_active_low = <1>;
|
|
+ };
|
|
+
|
|
+ meson-vout {
|
|
+ compatible = "amlogic, meson-vout";
|
|
+ dev_name = "meson-vout";
|
|
+ status = "okay";
|
|
+ };
|
|
+ meson-fb {
|
|
+ compatible = "amlogic, meson-fb";
|
|
+ memory-region = <&fb_reserved>;
|
|
+ dev_name = "meson-fb";
|
|
+ status = "okay";
|
|
+ interrupts = <0 3 1
|
|
+ 0 89 1>;
|
|
+ interrupt-names = "viu-vsync", "rdma";
|
|
+ mem_size = <0x01800000 0x00100000>; /* fb0/fb1 memory size */
|
|
+ display_mode_default = "1080p60hz";
|
|
+ scale_mode = <1>; /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
|
|
+ display_size_default = <1920 1080 1920 3240 32>; //1920*1080*4*3 = 0x17BB000
|
|
+ };
|
|
+ ge2d {
|
|
+ compatible = "amlogic, ge2d";
|
|
+ dev_name = "ge2d";
|
|
+ status = "okay";
|
|
+ interrupts = <0 150 1>;
|
|
+ interrupt-names = "ge2d";
|
|
+ clocks = <&clock CLK_VAPB_0>,
|
|
+ <&clock CLK_GE2D>;
|
|
+ clock-names = "clk_vapb_0",
|
|
+ "clk_ge2d";
|
|
+ resets = <&clock GCLK_IDX_GE2D>;
|
|
+ reset-names = "ge2d";
|
|
+ };
|
|
+ codec_io {
|
|
+ compatible = "amlogic, codec_io";
|
|
+ #address-cells=<2>;
|
|
+ #size-cells=<2>;
|
|
+ ranges;
|
|
+ io_cbus_base{
|
|
+ reg = <0x0 0xC1100000 0x0 0x100000>;
|
|
+ };
|
|
+ io_dos_base{
|
|
+ reg = <0x0 0xc8820000 0x0 0x10000>;
|
|
+ };
|
|
+ io_hiubus_base{
|
|
+ reg = <0x0 0xc883c000 0x0 0x2000>;
|
|
+ };
|
|
+ io_aobus_base{
|
|
+ reg = <0x0 0xc8100000 0x0 0x100000>;
|
|
+ };
|
|
+ io_vcbus_base{
|
|
+ reg = <0x0 0xd0100000 0x0 0x40000>;
|
|
+ };
|
|
+ io_dmc_base{
|
|
+ reg = <0x0 0xc8838000 0x0 0x400>;
|
|
+ };
|
|
+ };
|
|
+ codec_mm {
|
|
+ compatible = "amlogic, codec, mm";
|
|
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
|
|
+ dev_name = "codec_mm";
|
|
+ status = "okay";
|
|
+ };
|
|
+ ethmac: ethernet@0xc9410000 {
|
|
+ compatible = "amlogic, gxbb-rmii-dwmac";
|
|
+ reg = <0x0 0xc9410000 0x0 0x10000
|
|
+ 0x0 0xc8834540 0x0 0x8
|
|
+ 0x0 0xc8834558 0x0 0xc>;
|
|
+ interrupts = <0 8 1>;
|
|
+ phy-mode= "rmii";
|
|
+ pinctrl-names = "internal_eth_pins";
|
|
+ pinctrl-0 = <&internal_eth_pins>;
|
|
+ mc_val = <0x1800>;
|
|
+ resets = <&clock GCLK_IDX_ETHERNET>;
|
|
+ reset-names = "ethpower";
|
|
+ interrupt-names = "macirq";
|
|
+ clocks = <&clock CLK_81>;
|
|
+ clock-names = "ethclk81";
|
|
+ internal_phy=<1>;
|
|
+ };
|
|
+ mesonstream {
|
|
+ compatible = "amlogic, codec, streambuf";
|
|
+ dev_name = "mesonstream";
|
|
+ status = "okay";
|
|
+ resets = <&clock GCLK_IDX_HIU_PARSER_TOP
|
|
+ &clock GCLK_IDX_VPU_INTR
|
|
+ &clock GCLK_IDX_DEMUX
|
|
+ &clock GCLK_IDX_DOS>;
|
|
+ reset-names = "parser_top",
|
|
+ "vpu_intr",
|
|
+ "demux",
|
|
+ "vdec";
|
|
+ };
|
|
+
|
|
+ amvideocap {
|
|
+ compatible = "amlogic, amvideocap";
|
|
+ dev_name = "amvideocap.0";
|
|
+ status = "okay";
|
|
+ max_size = <8>;//8M
|
|
+ };
|
|
+
|
|
+ ion_dev {
|
|
+ compatible = "amlogic, ion_dev";
|
|
+ memory-region = <&ion_reserved>;
|
|
+ };
|
|
+
|
|
+ vdec {
|
|
+ compatible = "amlogic, vdec";
|
|
+ dev_name = "vdec.0";
|
|
+ status = "okay";
|
|
+ interrupts = <0 3 1
|
|
+ 0 23 1
|
|
+ 0 32 1
|
|
+ 0 43 1
|
|
+ 0 44 1
|
|
+ 0 45 1>;
|
|
+ interrupt-names = "vsync",
|
|
+ "demux",
|
|
+ "parser",
|
|
+ "mailbox_0",
|
|
+ "mailbox_1",
|
|
+ "mailbox_2";
|
|
+ };
|
|
+ picdec {
|
|
+ compatible = "amlogic, picdec";
|
|
+ memory-region = <&picdec_cma_reserved>;
|
|
+ dev_name = "picdec";
|
|
+ status = "okay";
|
|
+ };
|
|
+ ppmgr {
|
|
+ compatible = "amlogic, ppmgr";//to match of_device_id's compatible member
|
|
+ memory-region = <&ppmgr_reserved>;
|
|
+ dev_name = "ppmgr";
|
|
+ status = "okay";
|
|
+ };
|
|
+ deinterlace {
|
|
+ compatible = "amlogic, deinterlace";
|
|
+ status = "okay";
|
|
+ memory-region = <&di_reserved>;
|
|
+ interrupts = <0 46 1
|
|
+ 0 6 1>;
|
|
+ interrupt-names = "de_irq",
|
|
+ "timerc";
|
|
+ buffer-size = <3133440>; //1920x1088x3/2
|
|
+ hw-version = <2>;
|
|
+ };
|
|
+/* vdin0 {
|
|
+ compatible = "amlogic, vdin";
|
|
+ memory-region = <&vdin0_reserved>;
|
|
+ dev_name = "vdin0";
|
|
+ status = "ok";
|
|
+ reserve-iomap = "true";
|
|
+ interrupts = <0 83 1>;
|
|
+ rdma-irq = <2>;
|
|
+ clocks = <&clock CLK_XTAL>,
|
|
+ <&clock CLK_VID_LOCK_CLK>;
|
|
+ clock-names = "xtal", "cts_vid_lock_clk";
|
|
+ vdin_id = <0>;
|
|
+ };
|
|
+ vdin {
|
|
+ compatible = "amlogic, vdin";
|
|
+ memory-region = <&vdin1_reserved>;
|
|
+ dev_name = "vdin1";
|
|
+ status = "ok";
|
|
+ reserve-iomap = "true";
|
|
+ interrupts = <0 85 1>;
|
|
+ rdma-irq = <4>;
|
|
+ clocks = <&clock CLK_XTAL>,
|
|
+ <&clock CLK_VID_LOCK_CLK>;
|
|
+ clock-names = "xtal", "cts_vid_lock_clk";
|
|
+ vdin_id = <1>;
|
|
+ };*/
|
|
+ amvdec_656in0 {
|
|
+ compatible = "amlogic, amvdec_656in";
|
|
+ dev_name = "amvdec_656in0";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xd0048000 0x0 0x7c>;
|
|
+ clocks = <&clock CLK_FPLL_DIV2>,
|
|
+ <&clock CLK_BT656_CLK0>;
|
|
+ clock-names = "fclk_div2", "cts_bt656_clk0";
|
|
+ bt656_id = <0>;
|
|
+ };
|
|
+ amvdec_656in1 {
|
|
+ compatible = "amlogic, amvdec_656in";
|
|
+ dev_name = "amvdec_656in1";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xd0050000 0x0 0x7c>;
|
|
+ clocks = <&clock CLK_FPLL_DIV2>,
|
|
+ <&clock CLK_BT656_CLK1>;
|
|
+ clock-names = "fclk_div2", "cts_bt656_clk1";
|
|
+ bt656_id = <1>;
|
|
+ };
|
|
+ amlvecm {
|
|
+ compatible = "amlogic, vecm";
|
|
+ dev_name = "aml_vecm";
|
|
+ status = "okay";
|
|
+ gamma_en = <0>;/*1:enabel ;0:disable*/
|
|
+ wb_en = <0>;/*1:enabel ;0:disable*/
|
|
+ cm_en = <0>;/*1:enabel ;0:disable*/
|
|
+ };
|
|
+ amvenc_avc{
|
|
+ compatible = "amlogic, amvenc_avc";
|
|
+ //memory-region = <&amvenc_avc_reserved>;
|
|
+ //memory-region = <&avc_cma_reserved>;
|
|
+ dev_name = "amvenc_avc";
|
|
+ status = "okay";
|
|
+ interrupts = <0 45 1>;
|
|
+ interrupt-names = "mailbox_2";
|
|
+ };
|
|
+
|
|
+
|
|
+ /*vm {
|
|
+ compatible = "amlogic, vm";
|
|
+ memory-region = <&vm_reserved>;
|
|
+ dev_name = "vm";
|
|
+ status = "okay";
|
|
+ };*/
|
|
+
|
|
+ vpu {
|
|
+ compatible = "amlogic, vpu";
|
|
+ dev_name = "vpu";
|
|
+ status = "ok";
|
|
+ clk_level = <7>;
|
|
+ /** 0: 100.0M 1: 166.7M 2: 200.0M
|
|
+ 3: 250.0M 4: 333.3M 5: 400.0M
|
|
+ 6: 500.0M 7: 666.7M */
|
|
+ };
|
|
+
|
|
+ rtc{
|
|
+ compatible = "amlogic, aml_vrtc";
|
|
+ alarm_reg_addr = <0xc81000a8>;
|
|
+ timer_e_addr = <0xc1109988>;
|
|
+ init_date = "2015/01/01";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ emmc{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0074000 0x0 0x2000>;
|
|
+ interrupts = < 0 218 1>;
|
|
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
|
|
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done &emmc_all_pins>;
|
|
+ emmc{
|
|
+ status = "disabled";
|
|
+ pinname = "emmc";
|
|
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
|
|
+ caps = "MMC_CAP_8_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE","MMC_CAP_1_8V_DDR",
|
|
+ "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23";
|
|
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
|
|
+ f_min = <300000>;
|
|
+ f_max = <100000000>;
|
|
+ max_req_size = <0x20000>; /**256KB*/
|
|
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
|
|
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
|
|
+ card_type = <1>; /* 1:mmc card(include eMMC), 2:sd card(include tSD), */
|
|
+ };
|
|
+ };
|
|
+ sd{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0072000 0x0 0x2000>;
|
|
+ interrupts = < 0 217 1
|
|
+ 0 67 1
|
|
+ 0 69 1>;
|
|
+ pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins", "sd_1bit_pins","sd_clk_cmd_uart_pins","sd_1bit_uart_pins", "sd_to_ao_uart_pins", "ao_to_sd_uart_pins","ao_to_sd_jtag_pins","sd_to_ao_jtag_pins";
|
|
+ pinctrl-0 = <&sd_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&sd_all_pins>;
|
|
+ pinctrl-2 = <&sd_1bit_pins>;
|
|
+ pinctrl-3 = <&sd_clk_cmd_uart_pins>;
|
|
+ pinctrl-4 = <&sd_1bit_uart_pins>;
|
|
+ pinctrl-5 = <&sd_to_ao_uart_pins>;
|
|
+ pinctrl-6 = <&ao_to_sd_uart_pins>;
|
|
+ pinctrl-7 = <&ao_to_sd_jtag_pins>;
|
|
+ pinctrl-8 = <&sd_to_ao_jtag_pins>;
|
|
+ sd{
|
|
+ status = "okay";
|
|
+ pinname = "sd";
|
|
+ ocr_avail = <0x00200080>; // 3.3:0x200000, 1.8+3.3:0x00200080
|
|
+ caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED";
|
|
+ //"MMC_CAP_UHS_SDR12",
|
|
+ //"MMC_CAP_UHS_SDR25","MMC_CAP_UHS_SDR50",
|
|
+ //"MMC_CAP_UHS_SDR104";
|
|
+ f_min = <400000>;
|
|
+ f_max = <100000000>;
|
|
+ max_req_size = <0x20000>; /**128KB*/
|
|
+ gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
|
|
+ jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
|
|
+ gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
|
|
+ irq_in = <3>;
|
|
+ irq_out = <5>;
|
|
+ card_type = <5>; /* 0:unknown, 1:mmc card(include eMMC), 2:sd card(include tSD), 3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, 5:NON sdio device(means sd/mmc card), other:reserved */
|
|
+ };
|
|
+ };
|
|
+ sdio{
|
|
+ compatible = "amlogic, aml_sd_emmc";
|
|
+ dev_name = "aml_newsd.0";
|
|
+ status = "okay";
|
|
+ reg = <0x0 0xd0070000 0x0 0x2000>;
|
|
+ interrupts = < 0 216 4>;
|
|
+ pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
|
|
+ pinctrl-0 = <&sdio_clk_cmd_pins>;
|
|
+ pinctrl-1 = <&sdio_all_pins>;
|
|
+ sdio{
|
|
+ status = "okay";
|
|
+ pinname = "sdio";
|
|
+ ocr_avail = <0x00200080>; /*3.3:0x200000, 1.8+3.3:0x00200080 */
|
|
+ caps = "MMC_CAP_4_BIT_DATA","MMC_CAP_MMC_HIGHSPEED",
|
|
+ "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE",
|
|
+ "MMC_CAP_UHS_SDR12","MMC_CAP_UHS_SDR25",
|
|
+ "MMC_CAP_UHS_SDR50","MMC_CAP_UHS_SDR104",
|
|
+ "MMC_PM_KEEP_POWER","MMC_CAP_SDIO_IRQ";
|
|
+ f_min = <400000>;
|
|
+ f_max = <200000000>;
|
|
+ max_req_size = <0x20000>; /**128KB*/
|
|
+ card_type = <3>; /*3:sdio device(ie:sdio-wifi), 4:SD combo (IO+mem) card, */
|
|
+ };
|
|
+ };
|
|
+ nand{
|
|
+ compatible = "amlogic, aml_nand";
|
|
+ dev_name = "nand";
|
|
+ status = "disabled";
|
|
+ reg = <0x0 0xd0074800 0x0 0x200>;
|
|
+ interrupts = < 0 34 1 >;
|
|
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_pins_only";
|
|
+ pinctrl-0 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
|
|
+ pinctrl-1 = <&conf_nand_pulldown &conf_nand_pullup &all_nand_pins>;
|
|
+ pinctrl-2 = <&nand_cs_pins>;
|
|
+ device_id = <0>;
|
|
+ plat-names = "nandnormal";
|
|
+ plat-num = <1>;
|
|
+ plat-part-0 = <&normal>;
|
|
+ normal: normal{
|
|
+ enable_pad ="ce0","ce1","ce2","ce3";
|
|
+ busy_pad = "rb0";
|
|
+ };
|
|
+ };
|
|
+ aml_nftl{
|
|
+ compatible = "amlogic, nftl";
|
|
+ /* config nftl here */
|
|
+
|
|
+ };
|
|
+ /*aml_cams{
|
|
+ compatible = "amlogic, cams_prober";
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_CAMERA_24M>;
|
|
+ clock-names = "clk_camera_24";
|
|
+ pinctrl-names = "gpio";
|
|
+ pinctrl-0 = <&aml_cam_gpio_pins> ;
|
|
+ cam_0{
|
|
+ cam_name = "sp2518";
|
|
+ front_back = <0>;
|
|
+ i2c_bus = "i2c_bus_a";
|
|
+ gpio_pwdn-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_HIGH>;
|
|
+ gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>;
|
|
+ mirror_flip = <1>;
|
|
+ vertical_flip = <1>;
|
|
+ spread_spectrum = <0>; //0:none; 1:0.3%; 2:0.6%; 3:1.25%; 4:2.5%; 5:5%
|
|
+ bt_path = "gpio";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };*/
|
|
+
|
|
+ unifykey{
|
|
+ compatible = "amlogic, unifykey";
|
|
+ status = "ok";
|
|
+
|
|
+ unifykey-num = <14>;
|
|
+ unifykey-index-0 = <&keysn_0>;
|
|
+ unifykey-index-1 = <&keysn_1>;
|
|
+ unifykey-index-2 = <&keysn_2>;
|
|
+ unifykey-index-3 = <&keysn_3>;
|
|
+ unifykey-index-4 = <&keysn_4>;
|
|
+ unifykey-index-5 = <&keysn_5>;
|
|
+ unifykey-index-6 = <&keysn_6>;
|
|
+ unifykey-index-7 = <&keysn_7>;
|
|
+ unifykey-index-8 = <&keysn_8>;
|
|
+ unifykey-index-9 = <&keysn_9>;
|
|
+ unifykey-index-10= <&keysn_10>;
|
|
+ unifykey-index-11= <&keysn_11>;
|
|
+ unifykey-index-12= <&keysn_12>;
|
|
+ unifykey-index-13= <&keysn_13>;
|
|
+
|
|
+ keysn_0: key_0{
|
|
+ key-name = "usid";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_1:key_1{
|
|
+ key-name = "mac";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_2:key_2{
|
|
+ key-name = "hdcp";
|
|
+ key-device = "secure";
|
|
+ key-type = "sha1";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_3:key_3{
|
|
+ key-name = "secure_boot_set";
|
|
+ key-device = "efuse";
|
|
+ key-permit = "write";
|
|
+ };
|
|
+ keysn_4:key_4{
|
|
+ key-name = "mac_bt";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ key-type = "mac";
|
|
+ };
|
|
+ keysn_5:key_5{
|
|
+ key-name = "mac_wifi";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ key-type = "mac";
|
|
+ };
|
|
+ keysn_6:key_6{
|
|
+ key-name = "hdcp2_tx";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_7:key_7{
|
|
+ key-name = "hdcp2_rx";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_8:key_8{
|
|
+ key-name = "widevinekeybox";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_9:key_9{
|
|
+ key-name = "deviceid";
|
|
+ key-device = "normal";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_10:key_10{
|
|
+ key-name = "hdcp22_fw_private";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_11:key_11{
|
|
+ key-name = "PlayReadykeybox25";
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_12:key_12{
|
|
+ key-name = "prpubkeybox";// PlayReady
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ keysn_13:key_13{
|
|
+ key-name = "prprivkeybox";// PlayReady
|
|
+ key-device = "secure";
|
|
+ key-permit = "read","write","del";
|
|
+ };
|
|
+ };//End unifykey
|
|
+ amhdmitx: amhdmitx{
|
|
+ compatible = "amlogic, amhdmitx";
|
|
+ dev_name = "amhdmitx";
|
|
+ status = "okay";
|
|
+ pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
|
|
+ pinctrl-0=<&hdmitx_hpd>;
|
|
+ pinctrl-1=<&hdmitx_ddc>;
|
|
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
|
|
+ interrupts = <0 57 1>;
|
|
+ interrupt-names = "hdmitx_hpd";
|
|
+ clocks = <&clock CLK_HDMITX_SYS &clock CLK_HDMITX_ENCP
|
|
+ &clock CLK_HDMITX_ENCI &clock CLK_HDMITX_PIXEL
|
|
+ &clock CLK_HDMITX_PHY &clock CLK_VID>;
|
|
+ clock-names = "hdmitx_clk_sys", "hdmitx_clk_encp", "hdmitx_clk_enci",
|
|
+ "hdmitx_clk_pixel", "hdmitx_clk_phy", "hdmitx_clk_vid";
|
|
+ gpio_i2c_en = <0x1>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+ };
|
|
+
|
|
+ aocec: aocec{
|
|
+ compatible = "amlogic, amlogic-aocec";
|
|
+ device_name = "aocec";
|
|
+ status = "okay";
|
|
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
|
|
+ vendor_id = <0x000000>; /* Refer to http://standards.ieee.org/develop/regauth/oui/oui.txt */
|
|
+ product_desc = "GXBB Mbox"; /* Max Chars: 16 */
|
|
+ cec_osd_string = "MBox"; /* Max Chars: 14 */
|
|
+ port_num = <1>;
|
|
+ arc_port_mask = <0x0>;
|
|
+ interrupts = <0 199 1>;
|
|
+ interrupt-names = "hdmi_aocec";
|
|
+ pinctrl-names = "hdmitx_aocec";
|
|
+ pinctrl-0=<&hdmitx_aocec>;
|
|
+ reg = <0x0 0xc810023c 0x0 0x4
|
|
+ 0x0 0xc8100000 0x0 0x200>;
|
|
+ };
|
|
+
|
|
+ tvout {
|
|
+ compatible = "amlogic, tvout";
|
|
+ dev_name = "tvout";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ i2c_gpio: i2c_gpio {
|
|
+ compatible = "i2c-gpio";
|
|
+ status = "okay";
|
|
+ dev_name = "i2c-gpio";
|
|
+ i2c-gpio,delay-us = <10>; /* 50 kHz */
|
|
+ gpios = <&gpio GPIOH_1 0
|
|
+ &gpio GPIOH_2 0>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ i2c-gpio,timeout-ms = <10>;
|
|
+ i2c_gpio_edid: i2c_gpio_edid {
|
|
+ compatible = "i2c-gpio-edid";
|
|
+ reg = <0x50 0x0 0x0 0x0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart_AO: serial@c81004c0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc81004c0 0x0 0x18>;
|
|
+ interrupts = <0 193 1>;
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ xtal_tick_en = <1>;
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ //pinctrl-0 = <&ao_uart_pins>;
|
|
+ support-sysrq = <0>; /* 0 not support , 1 support */
|
|
+ };
|
|
+ uart_A: serial@c11084c0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc11084c0 0x0 0x18>;
|
|
+ interrupts = <0 26 1>;
|
|
+ status = "okay";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 128 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&a_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART0>;
|
|
+ };
|
|
+ uart_B: serial@c11084dc {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc11084dc 0x0 0x18>;
|
|
+ interrupts = <0 75 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&b_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART1>;
|
|
+ };
|
|
+ uart_C: serial@c1108700 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc1108700 0x0 0x18>;
|
|
+ interrupts = <0 93 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&c_uart_pins>;
|
|
+ resets = <&clock GCLK_IDX_UART2>;
|
|
+ };
|
|
+ uart_AO_B: serial@c81004e0 {
|
|
+ compatible = "amlogic, meson-uart";
|
|
+ reg = <0x0 0xc81004e0 0x0 0x18>;
|
|
+ interrupts = <0 197 1>;
|
|
+ status = "disable";
|
|
+ clocks = <&clock CLK_XTAL>;
|
|
+ clock-names = "clk_uart";
|
|
+ fifosize = < 64 >;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ao_b_uart_pins>;
|
|
+ };
|
|
+
|
|
+
|
|
+ canvas{
|
|
+ compatible = "amlogic, meson, canvas";
|
|
+ dev_name = "amlogic-canvas";
|
|
+ status = "ok";
|
|
+ reg = <0x0 0xc8838000 0x0 0x400>;
|
|
+ };
|
|
+
|
|
+ rdma{
|
|
+ compatible = "amlogic, meson, rdma";
|
|
+ dev_name = "amlogic-rdma";
|
|
+ status = "ok";
|
|
+ interrupts = <0 89 1>;
|
|
+ interrupt-names = "rdma";
|
|
+ };
|
|
+
|
|
+ dwc3: dwc3@c9000000 {
|
|
+ compatible = "synopsys, dwc3";
|
|
+ reg = <0x0 0xc9000000 0x0 0x100000>;
|
|
+ interrupts = <0 30 4>;
|
|
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
|
|
+ cpu-type = "gxl";
|
|
+ clock-src = "usb3.0";
|
|
+ };
|
|
+
|
|
+ usb2_phy: usb2phy@d0078000 {
|
|
+ compatible = "amlogic, amlogic-new-usb2";
|
|
+ portnum = <2>;
|
|
+ reg = <0x0 0xd0078000 0x0 0x80>;
|
|
+ };
|
|
+
|
|
+ usb3_phy: usb3phy@d0078080 {
|
|
+ compatible = "amlogic, amlogic-new-usb3";
|
|
+ portnum = <0>;
|
|
+ reg = <0x0 0xd0078080 0x0 0x20>;
|
|
+ };
|
|
+
|
|
+ dwc2_a {
|
|
+ compatible = "amlogic,dwc2";
|
|
+ device_name = "dwc2_a";
|
|
+ reg = <0x0 0xc9100000 0x0 0x40000>;
|
|
+ status = "okay";
|
|
+ interrupts = <0 31 4>;
|
|
+ pl-periph-id = <0>; /** lm name */
|
|
+ clock-src = "usb0"; /** clock src */
|
|
+ port-id = <0>; /** ref to mach/usb.h */
|
|
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
|
|
+ port-speed = <0>; /** 0: default, high, 1: full */
|
|
+ port-config = <0>; /** 0: default */
|
|
+ port-dma = <0>; /** 0: default, 1: single, 2: incr, 3: incr4, 4: incr8, 5: incr16, 6: disable*/
|
|
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
|
|
+ usb-fifo = <728>;
|
|
+ cpu-type = "gxl";
|
|
+ controller-type = <1>; /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
|
|
+ phy-reg = <0xd0078000>;
|
|
+ phy-reg-size = <0xa0>;
|
|
+ resets = <&clock GCLK_IDX_USB_GENERAL
|
|
+ &clock GCLK_IDX_MISC_USB1_TO_DDR
|
|
+ &clock GCLK_IDX_USB1>;
|
|
+ reset-names = "usb_general",
|
|
+ "usb1",
|
|
+ "usb1_to_ddr";
|
|
+ };
|
|
+
|
|
+
|
|
+ /* AUDIO MESON8 DEVICES */
|
|
+ i2s_dai: I2S {
|
|
+ #sound-dai-cells = <0>;
|
|
+ resets = <
|
|
+ &clock GCLK_IDX_AIU_AI_TOP_GLUE
|
|
+ &clock GCLK_IDX_AUD_BUF_ABD
|
|
+ &clock GCLK_IDX_AIU_I2S_OUT
|
|
+ &clock GCLK_IDX_AIU_AMCLK_MEASURE
|
|
+ &clock GCLK_IDX_AIU_AIFIFO2
|
|
+ &clock GCLK_IDX_AIU_AUD_MIXER
|
|
+ &clock GCLK_IDX_AIU_MIXER_REG
|
|
+ &clock GCLK_IDX_AIU_ADC
|
|
+ &clock GCLK_IDX_AIU_TOP_LEVEL
|
|
+ &clock GCLK_IDX_AIU_AOCLK
|
|
+ &clock GCLK_IDX_AUD_IN
|
|
+ >;
|
|
+ reset-names =
|
|
+ "top_glue",
|
|
+ "aud_buf",
|
|
+ "i2s_out",
|
|
+ "amclk_measure",
|
|
+ "aififo2",
|
|
+ "aud_mixer",
|
|
+ "mixer_reg",
|
|
+ "adc",
|
|
+ "top_level",
|
|
+ "aoclk",
|
|
+ "aud_in";
|
|
+ clocks = <&clock CLK_MPLL2>,
|
|
+ <&clock CLK_AMCLK>;
|
|
+ clock-names = "mpll2", "mclk";
|
|
+ compatible = "amlogic, aml-i2s-dai";
|
|
+ };
|
|
+ spdif_dai: SPDIF {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-spdif-dai";
|
|
+ resets = <
|
|
+ &clock GCLK_IDX_AIU_IEC958
|
|
+ &clock GCLK_IDX_AIU_ICE958_AMCLK
|
|
+ >;
|
|
+ reset-names =
|
|
+ "iec958",
|
|
+ "iec958_amclk";
|
|
+ clocks = <&clock CLK_MPLL1>,
|
|
+ <&clock CLK_I958>,
|
|
+ <&clock CLK_AMCLK>,
|
|
+ <&clock CLK_SPDIF>,
|
|
+ <&clock CLK_81>;
|
|
+ clock-names = "mpll1", "i958", "mclk", "spdif", "clk_81";
|
|
+ };
|
|
+ pcm_dai: PCM {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-pcm-dai";
|
|
+ pinctrl-names = "aml_audio_btpcm";
|
|
+ pinctrl-0 = <&audio_btpcm_pins>;
|
|
+ clocks = <&clock CLK_MPLL0>,
|
|
+ <&clock CLK_PCM_MCLK>,
|
|
+ <&clock CLK_PCM_SCLK>;
|
|
+ clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
|
|
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
|
|
+ };
|
|
+ i2s_plat: i2s_platform {
|
|
+ compatible = "amlogic, aml-i2s";
|
|
+ interrupts = <0 29 1>;
|
|
+ };
|
|
+ pcm_plat: pcm_platform {
|
|
+ compatible = "amlogic, aml-pcm";
|
|
+ };
|
|
+ spdif_codec: spdif_codec{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml-spdif-codec";
|
|
+ pinctrl-names = "aml_audio_spdif";
|
|
+ pinctrl-0 = <&audio_spdif_pins>;
|
|
+ };
|
|
+ pcm_codec: pcm_codec{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, pcm2BT-codec";
|
|
+ };
|
|
+ /* endof AUDIO MESON8 DEVICES */
|
|
+
|
|
+ /* AUDIO board specific */
|
|
+ dummy_codec:dummy{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml_dummy_codec";
|
|
+ status = "disable";
|
|
+ };
|
|
+ amlogic_codec:t9015{
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "amlogic, aml_codec_T9015";
|
|
+ reg = <0x0 0xc8832000 0x0 0x14>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ aml_m8_snd {
|
|
+ compatible = "aml, aml_snd_m8";
|
|
+ status = "okay";
|
|
+ aml-sound-card,format = "i2s";
|
|
+ aml_sound_card,name = "AML-M8AUDIO";
|
|
+ aml,audio-routing =
|
|
+ "Ext Spk","LOUTL",
|
|
+ "Ext Spk","LOUTR";
|
|
+
|
|
+ mute_gpio-gpios = <&gpio GPIOH_5 0>;
|
|
+ mute_inv;
|
|
+ sleep_time = <100>;
|
|
+ hp_disable;
|
|
+ hp_paraments = <800 300 0 5 1>;
|
|
+ pinctrl-names = "aml_snd_m8";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
|
|
+ codec_list = <&codec0 &codec1 &codec2>;
|
|
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
|
|
+ cpudai0: cpudai0 {
|
|
+ sound-dai = <&i2s_dai>;
|
|
+ };
|
|
+ cpudai1: cpudai1 {
|
|
+ sound-dai = <&spdif_dai>;
|
|
+ };
|
|
+ cpudai2: cpudai2 {
|
|
+ sound-dai = <&pcm_dai>;
|
|
+ };
|
|
+ codec0: codec0 {
|
|
+ sound-dai = <&amlogic_codec>;
|
|
+ };
|
|
+ codec1: codec1 {
|
|
+ sound-dai = <&spdif_codec>;
|
|
+ };
|
|
+ codec2: codec2 {
|
|
+ sound-dai = <&pcm_codec>;
|
|
+ };
|
|
+ };
|
|
+ /* END OF AUDIO board specific */
|
|
+
|
|
+ gpio_keypad{
|
|
+ compatible = "amlogic, gpio_keypad";
|
|
+ status = "okay";
|
|
+ scan_period = <20>;
|
|
+ key_num = <1>;
|
|
+ key_name = "power";
|
|
+ key_code = <116>;
|
|
+ key_pin = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; /*"GPIOAO_2";*/
|
|
+ irq_keyup = <6>;
|
|
+ irq_keydown = <7>;
|
|
+ };
|
|
+ aml_sensor0: aml-sensor@0 {
|
|
+ compatible = "amlogic, aml-thermal";
|
|
+ device_name = "thermal";
|
|
+ #thermal-sensor-cells = <1>;
|
|
+ cooling_devices {
|
|
+ cpufreq_cool_cluster0 {
|
|
+ min_state = <1000000>;
|
|
+ dyn_coeff = <140>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "cpus";
|
|
+ device_type = "cpufreq";
|
|
+ };
|
|
+ cpucore_cool_cluster0 {
|
|
+ min_state = <1>;
|
|
+ dyn_coeff = <0>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "cpu_core_cluster0";
|
|
+ device_type = "cpucore";
|
|
+ };
|
|
+ gpufreq_cool {
|
|
+ min_state = <400>;
|
|
+ dyn_coeff = <437>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "mali";
|
|
+ device_type = "gpufreq";
|
|
+ };
|
|
+ gpucore_cool {
|
|
+ min_state = <1>;
|
|
+ dyn_coeff = <0>;
|
|
+ cluster_id = <0>;
|
|
+ node_name = "thermal_gpu_cores";
|
|
+ device_type = "gpucore";
|
|
+ };
|
|
+ };
|
|
+ cpu_cluster0:cpu_core_cluster0 {
|
|
+ #cooling-cells = <2>; /* min followed by max */
|
|
+ };
|
|
+ gpucore:thermal_gpu_cores {
|
|
+ #cooling-cells = <2>; /* min followed by max */
|
|
+ };
|
|
+ };
|
|
+ thermal-zones {
|
|
+ soc_thermal {
|
|
+ polling-delay = <1000>;
|
|
+ polling-delay-passive = <100>;
|
|
+ sustainable-power = <2150>;
|
|
+
|
|
+ thermal-sensors = <&aml_sensor0 3>;
|
|
+
|
|
+ trips {
|
|
+ switch_on: trip-point@0 {
|
|
+ temperature = <70000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ control: trip-point@1 {
|
|
+ temperature = <80000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ hot: trip-point@2 {
|
|
+ temperature = <85000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "hot";
|
|
+ };
|
|
+ critical: trip-point@3 {
|
|
+ temperature = <260000>;
|
|
+ hysteresis = <1000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cooling-maps {
|
|
+ cpufreq_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&cpus 0 4>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ cpucore_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&cpu_cluster0 0 3>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ gpufreq_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&gpu 0 4>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ gpucore_cooling_map {
|
|
+ trip = <&control>;
|
|
+ cooling-device = <&gpucore 0 2>;
|
|
+ contribution = <1024>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinmux {
|
|
+ audio_pins:audio_pin{
|
|
+ amlogic,setmask=<6 0x7800000>;
|
|
+ amlogic,clrmask=<6 0x07e0000>;
|
|
+ amlogic,pins = "GPIOH_6","GPIOH_7","GPIOH_8","GPIOH_9";
|
|
+ };
|
|
+
|
|
+ audio_spdif_pins:audio_pin1{
|
|
+ amlogic,setmask=<6 0x10000000>; /*spdif_out*/
|
|
+ amlogic,clrmask=<6 0x8000000>;
|
|
+ amlogic,pins ="GPIOH_4"; /*spdif_out*/
|
|
+ };
|
|
+
|
|
+ audio_btpcm_pins:audio_btpcm_pins{
|
|
+ /* BT PCM PINMUX SETTING*/
|
|
+ amlogic,setmask=<5 0xf00000>;
|
|
+ amlogic,clrmask=<5 0x3c33>;
|
|
+ amlogic,pins ="GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11";
|
|
+ };
|
|
+};
|
|
+&efuse {
|
|
+ status = "okay";
|
|
+};
|
|
+&audio_data{
|
|
+ status = "okay";
|
|
+};
|
|
+&defendkey {
|
|
+ status = "okay";
|
|
+};
|