e72ddf2808
Adds preliminary patches for 4.19 Known Issues: - Does not like a lot of HDMI adapters Needs tested by anyone with a Le Potato, Odroid C2, or Nanopi K2
53 lines
2.1 KiB
Diff
53 lines
2.1 KiB
Diff
From 69d2f200d91fbd48e2388a8c5346f10d889a2928 Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Fri, 7 Jul 2017 17:39:21 +0200
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Subject: [PATCH] snd: meson: activate HDMI audio path
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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sound/soc/meson/i2s-dai.c | 22 ++++++++++++++++++++++
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1 file changed, 22 insertions(+)
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diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c
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index 1008af8..63fe098 100644
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--- a/sound/soc/meson/i2s-dai.c
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+++ b/sound/soc/meson/i2s-dai.c
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@@ -56,8 +56,19 @@ struct meson_i2s_dai {
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#define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8)
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#define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0)
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#define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0)
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+#define AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK BIT(6)
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+#define AIU_CLK_CTRL_MORE_HDMI_TX_I958_CLK (0 << 6)
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+#define AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK (1 << 6)
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#define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0)
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#define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0)
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+#define AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK GENMASK(1, 0)
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+#define AIU_HDMI_CLK_DATA_CTRL_CLK_DISABLE (0 << 0)
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+#define AIU_HDMI_CLK_DATA_CTRL_CLK_PCM (1 << 0)
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+#define AIU_HDMI_CLK_DATA_CTRL_CLK_I2S (2 << 0)
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+#define AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK GENMASK(5, 4)
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+#define AIU_HDMI_CLK_DATA_CTRL_DATA_MUTE (0 << 4)
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+#define AIU_HDMI_CLK_DATA_CTRL_DATA_PCM (1 << 4)
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+#define AIU_HDMI_CLK_DATA_CTRL_DATA_I2S (2 << 4)
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#define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0)
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#define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0)
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#define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0)
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@@ -221,6 +232,17 @@ static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream,
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return ret;
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}
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+ /* Quick and dirty hack for HDMI */
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+ regmap_update_bits(priv->core->aiu, AIU_HDMI_CLK_DATA_CTRL,
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+ AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK |
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+ AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK,
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+ AIU_HDMI_CLK_DATA_CTRL_CLK_I2S |
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+ AIU_HDMI_CLK_DATA_CTRL_DATA_I2S);
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+
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+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE,
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+ AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK,
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+ AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK);
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+
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return 0;
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}
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