armbian-build/patch/u-boot/v2026.01/arm64-dts-allwinner-sun55i-a523-add-pcie-spi-combophy.patch
2026-01-31 23:02:50 +01:00

104 lines
3.4 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Marvin Wewer <mwewer37@proton.me>
Date: Thu, 23 Oct 2025 09:10:08 +0000
Subject: arm64: dts: allwinner: sun55i-a523: Add SPI0, PCIe and Combophy nodes
Signed-off-by: Marvin Wewer <mwewer37@proton.me>
---
dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi | 65 ++++++++++
1 file changed, 65 insertions(+)
diff --git a/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi b/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
index 111111111111..222222222222 100644
--- a/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
+++ b/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
@@ -2,6 +2,7 @@
// Copyright (C) 2023-2024 Arm Ltd.
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun55i-a523-ccu.h>
#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
@@ -609,6 +610,34 @@
#power-domain-cells = <1>;
};
+ dma:dma-controller@3002000 {
+ compatible = "allwinner,sun50i-h6-dma";
+ reg = <0x03002000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
+ clock-names = "bus", "mbus";
+ dma-channels = <8>;
+ dma-requests = <54>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ status = "okay";
+ };
+
+ spi0: spi@4025000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "allwinner,sun55i-a523-spi";
+ device_type = "spi0";
+ reg = <0x04025000 0x1000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_SPI0>;
+ dmas = <&dma 22>, <&dma 22>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
r_ccu: clock-controller@7010000 {
compatible = "allwinner,sun55i-a523-r-ccu";
reg = <0x7010000 0x250>;
@@ -626,6 +655,42 @@
#reset-cells = <1>;
};
+ combophy: phy@4f00000 {
+ compatible = "allwinner,inno-combphy";
+ reg = <0x04f00000 0x80000>, /* Sub-System Application Registers */
+ <0x04f80000 0x80000>; /* Combo INNO PHY Registers */
+ reg-names = "phy-ctl", "phy-clk";
+ #phy-cells = <1>;
+ clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERIPH0_200M>;
+ clock-names = "phyclk_ref","refclk_par";
+ resets = <&ccu RST_BUS_PCIE_USB3>;
+ reset-names = "phy_rst";
+ };
+
+ pcie: pcie@4800000 {
+ compatible = "allwinner,sun55i-pcie-v210-rc";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xff>;
+ reg = <0x04800000 0x480000>;
+ reg-names = "dbi";
+ device_type = "pci";
+ ranges = <0x00000800 0 0x20000000 0x20000000 0 0x01000000
+ 0x81000000 0 0x21000000 0x21000000 0 0x01000000
+ 0x82000000 0 0x22000000 0x22000000 0 0x0e000000>;
+ phys = <&combophy PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy";
+ #interrupt-cells = <1>;
+ num-edma = <4>;
+ max-link-speed = <2>;
+ num-ib-windows = <8>;
+ num-ob-windows = <8>;
+ linux,pci-domain = <0>;
+ clocks = <&osc24M>, <&ccu CLK_PCIE_AUX>;
+ clock-names = "hosc", "pclk_aux";
+ power-domains = <&pck600 PD_PCIE>;
+ };
+
nmi_intc: interrupt-controller@7010320 {
compatible = "allwinner,sun55i-a523-nmi";
reg = <0x07010320 0xc>;
--
Armbian