152 lines
4.3 KiB
Diff
152 lines
4.3 KiB
Diff
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
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index 79cdede..348e9be 100644
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--- a/arch/arm/boot/dts/rk3288-miniarm.dts
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+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
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@@ -50,11 +50,23 @@
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model = "Rockchip RK3288 Tinker Board";
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compatible = "asus,rk3288-tinker", "rockchip,rk3288";
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- memory {
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+ memory@0 {
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reg = <0x0 0x80000000>;
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device_type = "memory";
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};
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+ wireless-bluetooth {
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+ compatible = "bluetooth-platdata";
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+ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default","rts_gpio";
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+ pinctrl-0 = <&uart0_rts>;
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+ pinctrl-1 = <&uart0_gpios>;
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+ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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+ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
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+ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+ };
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+
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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@@ -314,6 +326,8 @@
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};
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vccio_sd: LDO_REG5 {
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+ regulator-always-on;
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+ regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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@@ -385,6 +399,11 @@
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&i2c2 {
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status = "okay";
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+
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+ eeprom:m24c08@50 {
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+ compatible = "at,24c08";
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+ reg = <0x50>;
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+ };
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};
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&i2c3 {
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@@ -581,6 +600,8 @@
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};
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&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
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status = "okay";
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};
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index e1938d2..458d545 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -360,6 +360,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0xff0c0000 0x4000>;
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resets = <&cru SRST_MMC0>;
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reset-names = "reset";
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@@ -374,6 +376,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0xff0d0000 0x4000>;
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resets = <&cru SRST_SDIO0>;
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reset-names = "reset";
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@@ -388,6 +392,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0xff0e0000 0x4000>;
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resets = <&cru SRST_SDIO1>;
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reset-names = "reset";
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@@ -402,6 +408,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0xff0f0000 0x4000>;
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resets = <&cru SRST_EMMC>;
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reset-names = "reset";
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@@ -1038,7 +1046,7 @@
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status = "disabled";
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};
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- spdif: sound@ff88b0000 {
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+ spdif: sound@ff8b0000 {
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compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
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reg = <0xff8b0000 0x10000>;
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#sound-dai-cells = <0>;
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@@ -1082,9 +1090,24 @@
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status = "okay";
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};
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+ rga: rga@ff920000 {
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+ compatible = "rockchip,rk3288-rga";
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+ reg = <0xff920000 0x180>;
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+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "rga";
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+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
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+ clock-names = "aclk", "hclk", "sclk";
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+ power-domains = <&power RK3288_PD_VIO>;
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+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
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+
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+ reset-names = "core", "axi", "ahb";
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+ status = "disabled";
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+ };
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+
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+
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vopb: vop@ff930000 {
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compatible = "rockchip,rk3288-vop";
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- reg = <0xff930000 0x19c>;
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+ reg = <0xff930000 0x19c>, <0xff931000 0x1000>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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@@ -1127,7 +1150,7 @@
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vopl: vop@ff940000 {
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compatible = "rockchip,rk3288-vop";
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- reg = <0xff940000 0x19c>;
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+ reg = <0xff940000 0x19c>, <0xff941000 0x1000>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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@@ -1202,6 +1225,7 @@
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
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clock-names = "dp", "pclk";
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+ power-domains = <&power RK3288_PD_VIO>;
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phys = <&edp_phy>;
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phy-names = "dp";
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resets = <&cru SRST_EDP>;
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