60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From 3f82b8ac8519fae6e034140dcdb421ac9b2b1868 Mon Sep 17 00:00:00 2001
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From: LABBE Corentin <clabbe.montjoie@gmail.com>
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Date: Thu, 25 Feb 2016 14:43:41 +0100
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Subject: [PATCH 1/5] ARM: dts: sun8i: add sun8i-emac ethernet driver
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The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
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speed. TODO
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This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
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Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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---
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arch/arm/boot/dts/sun8i-h3.dtsi | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
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index 1524130e..7f119fc 100644
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--- a/arch/arm/boot/dts/sun8i-h3.dtsi
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+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
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@@ -361,6 +361,17 @@
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interrupt-controller;
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#interrupt-cells = <2>;
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+ emac_pins_a: emac0@0 {
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+ allwinner,pins = "PD0", "PD1", "PD2", "PD3",
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+ "PD4", "PD5", "PD6", "PD7",
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+ "PD8", "PD9", "PD10", "PD11",
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+ "PD12", "PD13", "PD14", "PD15",
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+ "PD16", "PD17";
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+ allwinner,function = "emac";
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+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
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+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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+ };
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+
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uart0_pins_a: uart0@0 {
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allwinner,pins = "PA4", "PA5";
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allwinner,function = "uart0";
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@@ -476,6 +487,18 @@
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status = "disabled";
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};
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+ emac: ethernet@1c30000 {
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+ compatible = "allwinner,sun8i-h3-emac";
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+ reg = <0x01c30000 0x1054>;
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+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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+ resets = <&ahb_rst 17>, <&ahb_rst 66>;
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+ reset-names = "ahb", "ephy";
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+ clocks = <&bus_gates 17>, <&bus_gates 128>;
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+ clock-names = "bus_gmac", "bus_ephy";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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gic: interrupt-controller@01c81000 {
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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reg = <0x01c81000 0x1000>,
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--
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2.4.10
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