* Attach Meson64 to mainline with a bunch of patches. Tested, but need further work. * Enable DVFS on N2 which sometimes works, sometime doesn't, cleanup * Enable beta targets for Meson64 kernel family * Bump with version
98 lines
2.6 KiB
Diff
98 lines
2.6 KiB
Diff
armbian
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---
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arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 24 +++++++++++++++++++++
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arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 6 ++++++
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2 files changed, 30 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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index 1e0e056c3d62e..b3ba2fda8af88 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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@@ -347,6 +347,29 @@
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compatible = "amlogic,g12b-clkc";
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};
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+&cpu_thermal {
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_passive>;
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+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ map1 {
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+ trip = <&cpu_hot>;
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+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+};
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+
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ðmac {
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power-domains = <&pwrc PWRC_G12A_ETH_ID>;
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};
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@@ -366,3 +389,4 @@
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&simplefb_hdmi {
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power-domains = <&pwrc PWRC_G12A_VPU_ID>;
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};
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+
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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index b3f9e3a029636..6dbc3968045b8 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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@@ -50,6 +50,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <592>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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@@ -59,6 +60,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <592>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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cpu100: cpu@100 {
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@@ -68,6 +70,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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cpu101: cpu@101 {
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@@ -77,6 +80,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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cpu102: cpu@102 {
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@@ -86,6 +90,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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cpu103: cpu@103 {
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@@ -95,6 +100,7 @@
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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+ #cooling-cells = <2>;
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};
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l2: l2-cache0 {
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