cc7ab6a6b1
* Attach Meson64 to mainline with a bunch of patches. Tested, but need further work. * Enable DVFS on N2 which sometimes works, sometime doesn't, cleanup * Enable beta targets for Meson64 kernel family * Bump with version
80 lines
2.6 KiB
Diff
80 lines
2.6 KiB
Diff
From 1f8607d597635c283e397e87575b49184874d507 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Mon, 16 Sep 2019 14:50:21 +0200
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Subject: [PATCH] arm64: dts: meson-g12a: Add PCIe node
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This adds the Amlogic G12A PCI Express controller node, also
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using the USB3+PCIe Combo PHY.
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The PHY mode selection is static, thus the USB3+PCIe Combo PHY
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phandle would need to be removed from the USB control node if the
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shared differential lines are used for PCIe instead of USB3.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Reviewed-by: Andrew Murray <andrew.murray@arm.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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.../boot/dts/amlogic/meson-g12-common.dtsi | 33 +++++++++++++++++++
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arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 +++
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2 files changed, 37 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index 0f6ec1704343f..f76773cabdb1a 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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@@ -60,6 +60,39 @@
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#size-cells = <2>;
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ranges;
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+ pcie: pcie@fc000000 {
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+ compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
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+ reg = <0x0 0xfc000000 0x0 0x400000
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+ 0x0 0xff648000 0x0 0x2000
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+ 0x0 0xfc400000 0x0 0x200000>;
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+ reg-names = "elbi", "cfg", "config";
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+ interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
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+ #interrupt-cells = <1>;
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+ interrupt-map-mask = <0 0 0 0>;
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+ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
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+ bus-range = <0x0 0xff>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ device_type = "pci";
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+ ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000
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+ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
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+
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+ clocks = <&clkc CLKID_PCIE_PHY
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+ &clkc CLKID_PCIE_COMB
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+ &clkc CLKID_PCIE_PLL>;
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+ clock-names = "general",
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+ "pclk",
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+ "port";
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+ resets = <&reset RESET_PCIE_CTRL_A>,
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+ <&reset RESET_PCIE_APB>;
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+ reset-names = "port",
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+ "apb";
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+ num-lanes = <1>;
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+ phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
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+ phy-names = "pcie";
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+ status = "disabled";
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+ };
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+
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ethmac: ethernet@ff3f0000 {
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compatible = "amlogic,meson-axg-dwmac",
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"snps,dwmac-3.70a",
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diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
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index 6152e928aef2f..1fdc5af5ae233 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
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@@ -139,6 +139,10 @@
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"amlogic,meson-gpio-intc";
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};
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+&pcie {
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+ power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
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+};
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+
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&pwrc {
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compatible = "amlogic,meson-sm1-pwrc";
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};
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