115 lines
3.7 KiB
Diff
115 lines
3.7 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Marvin Wewer <mwewer37@proton.me>
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Date: Thu, 23 Oct 2025 09:10:08 +0000
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Subject: arm64: dts: allwinner: sun55i-a523: Add SPI0, PCIe and Combophy nodes
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Signed-off-by: Marvin Wewer <mwewer37@proton.me>
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---
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dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi | 66 ++++++++++
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1 file changed, 66 insertions(+)
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diff --git a/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi b/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
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index 111111111111..222222222222 100644
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--- a/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
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+++ b/dts/upstream/src/arm64/allwinner/sun55i-a523.dtsi
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@@ -1,9 +1,10 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
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// Copyright (C) 2023-2024 Arm Ltd.
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/clock/sun6i-rtc.h>
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#include <dt-bindings/clock/sun55i-a523-ccu.h>
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#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
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#include <dt-bindings/reset/sun55i-a523-ccu.h>
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#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
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@@ -607,10 +608,38 @@
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clocks = <&r_ccu CLK_BUS_R_PPU1>;
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resets = <&r_ccu RST_BUS_R_PPU1>;
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#power-domain-cells = <1>;
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};
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+ dma:dma-controller@3002000 {
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+ compatible = "allwinner,sun50i-h6-dma";
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+ reg = <0x03002000 0x1000>;
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+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
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+ clock-names = "bus", "mbus";
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+ dma-channels = <8>;
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+ dma-requests = <54>;
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+ resets = <&ccu RST_BUS_DMA>;
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+ #dma-cells = <1>;
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+ status = "okay";
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+ };
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+
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+ spi0: spi@4025000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "allwinner,sun55i-a523-spi";
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+ device_type = "spi0";
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+ reg = <0x04025000 0x1000>;
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+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
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+ clock-names = "ahb", "mod";
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+ resets = <&ccu RST_BUS_SPI0>;
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+ dmas = <&dma 22>, <&dma 22>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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r_ccu: clock-controller@7010000 {
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compatible = "allwinner,sun55i-a523-r-ccu";
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reg = <0x7010000 0x250>;
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clocks = <&osc24M>,
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<&rtc CLK_OSC32K>,
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@@ -624,10 +653,46 @@
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"pll-audio";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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+ combophy: phy@4f00000 {
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+ compatible = "allwinner,inno-combphy";
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+ reg = <0x04f00000 0x80000>, /* Sub-System Application Registers */
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+ <0x04f80000 0x80000>; /* Combo INNO PHY Registers */
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+ reg-names = "phy-ctl", "phy-clk";
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+ #phy-cells = <1>;
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+ clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERIPH0_200M>;
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+ clock-names = "phyclk_ref","refclk_par";
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+ resets = <&ccu RST_BUS_PCIE_USB3>;
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+ reset-names = "phy_rst";
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+ };
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+
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+ pcie: pcie@4800000 {
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+ compatible = "allwinner,sun55i-pcie-v210-rc";
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ bus-range = <0x0 0xff>;
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+ reg = <0x04800000 0x480000>;
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+ reg-names = "dbi";
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+ device_type = "pci";
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+ ranges = <0x00000800 0 0x20000000 0x20000000 0 0x01000000
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+ 0x81000000 0 0x21000000 0x21000000 0 0x01000000
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+ 0x82000000 0 0x22000000 0x22000000 0 0x0e000000>;
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+ phys = <&combophy PHY_TYPE_PCIE>;
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+ phy-names = "pcie-phy";
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+ #interrupt-cells = <1>;
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+ num-edma = <4>;
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+ max-link-speed = <2>;
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+ num-ib-windows = <8>;
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+ num-ob-windows = <8>;
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+ linux,pci-domain = <0>;
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+ clocks = <&osc24M>, <&ccu CLK_PCIE_AUX>;
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+ clock-names = "hosc", "pclk_aux";
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+ power-domains = <&pck600 PD_PCIE>;
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+ };
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+
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nmi_intc: interrupt-controller@7010320 {
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compatible = "allwinner,sun55i-a523-nmi";
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reg = <0x07010320 0xc>;
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interrupt-controller;
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#interrupt-cells = <2>;
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--
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Armbian
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