142 lines
3.5 KiB
Diff
142 lines
3.5 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Marvin Wewer <mwewer37@proton.me>
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Date: Sat, 25 Oct 2025 16:50:43 +0000
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Subject: arm64: dts: allwinner: sun55i-a527-cubie-a5e: Enable SPI0 and PCIe with ComboPHY
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Signed-off-by: Marvin Wewer <mwewer37@proton.me>
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---
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dts/upstream/src/arm64/allwinner/sun55i-a527-cubie-a5e.dts | 84 ++++++++++
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1 file changed, 84 insertions(+)
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diff --git a/dts/upstream/src/arm64/allwinner/sun55i-a527-cubie-a5e.dts b/dts/upstream/src/arm64/allwinner/sun55i-a527-cubie-a5e.dts
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index 111111111111..222222222222 100644
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--- a/dts/upstream/src/arm64/allwinner/sun55i-a527-cubie-a5e.dts
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+++ b/dts/upstream/src/arm64/allwinner/sun55i-a527-cubie-a5e.dts
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@@ -43,10 +43,34 @@
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regulator-max-microvolt = <5000000>;
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vin-supply = <®_vcc5v>;
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gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
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enable-active-high;
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};
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+
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+ reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie-pwren";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpio = <&r_pio 0 11 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_pwren_pins>;
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+ };
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+
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+ reg_vcc_3v3: vcc-3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ enable-active-high;
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+ };
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};
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&ehci0 {
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status = "okay";
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};
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@@ -102,10 +126,34 @@
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vcc-pg-supply = <®_bldo1>;
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vcc-ph-supply = <®_cldo3>; /* via VCC-IO */
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vcc-pi-supply = <®_cldo3>;
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vcc-pj-supply = <®_cldo4>;
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vcc-pk-supply = <®_cldo1>;
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+
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+ pcie0_pins_ph: pcie0-ph {
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+ pins = "PH19";
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+ function = "pcie0";
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+ allwinner,pinmux = <6>;
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+ drive-strength = <20>;
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+ bias-pull-up;
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+ power-source = <3300>;
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+ };
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+
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+ spi0_pins: spi0-pins {
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+ pins = "PC2","PC4", "PC12";
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+ allwinner,pinmux = <4>;
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+ function = "spi0";
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+ drive-strength = <10>;
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+ };
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+
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+ spi0_cs_pin: spi0-cs0-pin {
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+ pins = "PC3";
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+ allwinner,pinmux = <4>;
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+ function = "spi0";
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+ drive-strength = <10>;
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+ bias-pull-up; /* cs, hold, wp should be pulled up */
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+ };
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};
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&r_i2c0 {
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status = "okay";
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@@ -280,18 +328,53 @@
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* Specifying the supply would create a circular dependency.
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*
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* vcc-pl-supply = <®_aldo3>;
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*/
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vcc-pm-supply = <®_aldo3>;
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+
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+ pcie_pwren_pins: pcie-pwren-pins {
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+ allwinner,pins = "PL11";
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+ function = "gpio_out";
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+ allwinner,pinmux = <1>;
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+ drive-strength = <10>;
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+ bias-disable; //bias-pull-up; or bias-pull-down;
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+ };
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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+&combophy {
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+ select3v3-supply = <®_vcc_3v3>;
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+ status = "okay";
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+};
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+
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+&spi0 {
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+ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+ w25q128: flash@0 {
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+ compatible = "winbond,w25q128fw", "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <24000000>;
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+ vcc-supply = <®_cldo1>;
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+ status = "okay";
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+ };
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+};
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+
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+&pcie {
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+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
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+ wake-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>;
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+ num-lanes = <1>;
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+ slot-3v3-supply = <®_pcie_vcc3v3>;
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+ switch-sel-gpios = <&pio 1 6 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+};
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+
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&usb_otg {
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/*
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* The USB-C port is the primary power supply, so in this configuration
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* relies on the other end of the USB cable to supply the VBUS power.
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* So use this port in peripheral mode.
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--
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Armbian
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