78d28f8083
1, format all patches from https://github.com/megous/linux `git format-patch 79bf89b88a87f2ebf147f76d8c40183283b49b51...2a7cb228d29c3882c1414c10a44c5f3f59bfa44d` and copy them to sunxi-next with prefix `0000-` 2, remove unnecessary patches, due to they are revert of upstream patches:4d867e2bd64e674a3000b8e05fe47e8bb8175edda2888276ee3, remove fail to apply and no use:960ddd63a84, remove WireGuard patch:1cd13b836c5, remove meaningless patch:f26e36379a6, remove merged or included by megous/linux patches: 0112-mfd-axp20x-Add-supported-cells-for-AXP803.patch board-bpi-m3-make-ethernet-working.patch board-pine-h6-pine-h6-0025-phy-sun4i-usb-add-support-for-missing-USB-PHY-index.patch 7, remove stable release update patches. ignored. 8, rebase sunxi-next/sunxi64-next to upstream linux-4.19.y test result: all patches applied, no error. orangepipc/orangpioneplus build OK. Signed-off-by: Zhang Ning <832666+zhangn1985@users.noreply.github.com>
63 lines
1.9 KiB
Diff
63 lines
1.9 KiB
Diff
From 30bbeb66d0f9cc6f49cc95e60443eeca952b119c Mon Sep 17 00:00:00 2001
|
|
From: Ondrej Jirman <megous@megous.com>
|
|
Date: Sat, 30 Jun 2018 07:55:34 +0200
|
|
Subject: [PATCH 76/82] arm64: dts: sun50i-h5: Add mali GPU node
|
|
|
|
https://github.com/jernejsk/LibreELEC.tv/blob/aw_h5_init/projects/Allwinner/devices/H5/patches/linux/20-add-mali-node.patch
|
|
---
|
|
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 38 ++++++++++++++++++++
|
|
1 file changed, 38 insertions(+)
|
|
|
|
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
|
index acd90f390e88..67e2246a6374 100644
|
|
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
|
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
|
@@ -94,6 +94,44 @@
|
|
method = "smc";
|
|
};
|
|
|
|
+ soc {
|
|
+ mali: gpu@1280000 {
|
|
+ compatible = "allwinner,sun50i-h5-mali",
|
|
+ "arm,mali-450";
|
|
+ reg = <0x01e80000 0x30000>;
|
|
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "gp",
|
|
+ "gpmmu",
|
|
+ "pmu",
|
|
+ "pp",
|
|
+ "pp0",
|
|
+ "ppmmu0",
|
|
+ "pp1",
|
|
+ "ppmmu1",
|
|
+ "pp2",
|
|
+ "ppmmu2",
|
|
+ "pp3",
|
|
+ "ppmmu3";
|
|
+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
|
|
+ clock-names = "bus", "core";
|
|
+ resets = <&ccu RST_BUS_GPU>;
|
|
+
|
|
+ assigned-clocks = <&ccu CLK_GPU>;
|
|
+ assigned-clock-rates = <384000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
timer {
|
|
compatible = "arm,armv8-timer";
|
|
interrupts = <GIC_PPI 13
|
|
--
|
|
2.20.1
|
|
|