armbian-build/patch/kernel/sunxi-next/0000-0049-ARM-dts-sun8i-a83t-Add-uart2-uart4.patch
zhangn1985 78d28f8083 rebase sunxi-next to upstream LTS (#1507)
1, format all patches from https://github.com/megous/linux
   `git format-patch 79bf89b88a87f2ebf147f76d8c40183283b49b51...2a7cb228d29c3882c1414c10a44c5f3f59bfa44d`
   and copy them to sunxi-next with prefix `0000-`

2, remove unnecessary patches, due to they are revert of upstream patches:
    4d867e2bd6
    4e674a3000
    b8e05fe47e
    8bb8175edd
    a2888276ee

3, remove fail to apply and no use:
    960ddd63a8

4, remove WireGuard patch:
    1cd13b836c

5, remove meaningless patch:
    f26e36379a

6, remove merged or included by megous/linux patches:
   0112-mfd-axp20x-Add-supported-cells-for-AXP803.patch
   board-bpi-m3-make-ethernet-working.patch
   board-pine-h6-pine-h6-0025-phy-sun4i-usb-add-support-for-missing-USB-PHY-index.patch

7, remove stable release update patches.
   ignored.

8, rebase sunxi-next/sunxi64-next to upstream linux-4.19.y

test result:
   all patches applied, no error.
   orangepipc/orangpioneplus build OK.

Signed-off-by: Zhang Ning <832666+zhangn1985@users.noreply.github.com>
2019-08-06 21:00:05 -04:00

58 lines
1.6 KiB
Diff

From 1b732183172780283b7311bf0959b7ba7d4a4153 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Fri, 10 Nov 2017 22:21:29 +0100
Subject: [PATCH 49/82] ARM: dts: sun8i-a83t: Add uart2-uart4
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 33 +++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index d9074f050a9c..788ecf540f55 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -880,6 +880,39 @@
status = "disabled";
};
+ uart2: serial@01c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART2>;
+ resets = <&ccu RST_BUS_UART2>;
+ status = "disabled";
+ };
+
+ uart3: serial@01c28c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28c00 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART3>;
+ resets = <&ccu RST_BUS_UART3>;
+ status = "disabled";
+ };
+
+ uart4: serial@01c29000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART4>;
+ resets = <&ccu RST_BUS_UART4>;
+ status = "disabled";
+ };
+
i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun8i-a83t-i2c",
"allwinner,sun6i-a31-i2c";
--
2.20.1