1a12994e79
* [Early WIP] Update sunxi-next to kernel 4.17 * Switch Allwinner 32 and 64bit to U-boot 2018.05 * Adjust patched for 4.17.y / sunxi-next - adjust both configurations - removing FAT support from u-boot (breaks if you try to save) Tested those boards: Cubietruck: wlan fails http://ix.io/1fYS USB OK, HDMI yes Bananapi R40: http://ix.io/1fZm USB OK, HDMI yes Lime A64: USB no, HDMI no, wireless buggy, eMMC yes Orangepi prime H5: OK http://ix.io/1fZJ DVFS no Orangepi2e: DVFS OK, HDMI OK, net OK, wifi OK, eMMC ok, http://ix.io/1fZT * Kernel config update, enabling HDMI on CT+ * Trying to fix A64 HDMI but failed. Fixed M64 ethernet instead * Update orangepioneplus.wip * Update orangepioneplus.wip * Fix H6 build process * Add regulator bits for Orangepizero+, thanks to @5kft * add H5 support for optional 1.3v regulator and 1.3GHz operation This patch adds two optional overlays that can be used to: 1) enable the 1.1v/1.3v regulator on boards that provide the necessary compatible H/W support 2) modify the default CPU clock operating table to add new 1.2GHz and 1.3GHz clocks Note that the generated regulator overlay will only support boards whose 1.1v/1.3v regulator is controlled by GPIO PL6. * updates for the NanoPi NEO Plus2 This change introduces a patch that provides two changes for the NanoPi NEO Plus2: * Configure the "cpu0" to use the "vdd_cpux" regulator; this enables the ability to use higher CPU clocks * Correct the configurations of the on-board power and status LEDs * Adjust nightly building and few boards config cleanup
104 lines
3.0 KiB
Diff
104 lines
3.0 KiB
Diff
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
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index 379d852..2ace5f9 100644
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--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
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+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
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@@ -12,6 +12,8 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
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sun50i-a64-w1-gpio.dtbo \
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sun50i-h5-analog-codec.dtbo \
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sun50i-h5-cir.dtbo \
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+ sun50i-h5-cpu-clock-1.3GHz.dtbo \
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+ sun50i-h5-gpio-regulator-1.3v.dtbo \
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sun50i-h5-i2c0.dtbo \
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sun50i-h5-i2c1.dtbo \
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sun50i-h5-i2c2.dtbo \
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diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
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new file mode 100644
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index 0000000..4ab2633
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
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@@ -0,0 +1,40 @@
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+// DT overlay for operating points to 1.3GHz
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the H5 DT cooling-maps, replace the latter
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+ // part of the OP table with the new frequencies...
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+
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+ // override the "1.056GHz" opp definition with the 1.104GHz clock definition
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+ opp@1056000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.104GHz" opp definition with the 1.200GHz clock definition
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+ opp@1104000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.152GHz" opp definition with the 1.296GHz clock definition
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+ opp@1152000000 {
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+ opp-hz = /bits/ 64 <1296000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
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new file mode 100644
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index 0000000..8d2755c
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
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@@ -0,0 +1,38 @@
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "allwinner,sun50i-h5";
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+
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+ fragment@0 {
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+ target-path = "/";
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+
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+ __overlay__ {
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+ reg_vdd_cpux: gpio-regulator {
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+ compatible = "regulator-gpio";
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+ regulator-name = "vdd-cpux";
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+ regulator-type = "voltage";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1300000>;
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+ regulator-ramp-delay = <50>; /* 4ms */
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+
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+ gpios = <&r_pio 0 6 0>; /* PL6 */
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+ enable-active-high;
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+ gpios-states = <0x1>;
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+ states = <1100000 0x0
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+ 1300000 0x1>;
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&cpu0>;
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+
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+ __overlay__ {
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+ cpu-supply = <®_vdd_cpux>;
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+ };
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+ };
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+};
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+
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