a57ce78b37
* Bump to 4.18, removing the obvious, fixing build problems, put some on waiting. * Pin 4.18 to DEV, rollback 4.14 to NEXT, adjust configs, remove one deprecated patch from NEXT and add board-h3-address-some-stability-issues.patch * Adjust few boards in development to new reality, removing it from NEXT for now * Adjust few board configs * Board config adjustement * Adjust few boards configs * Port NeoCore2 and Neo21.1 to 4.14.y * Adjust board config * Adjust board config
45 lines
1.4 KiB
Diff
45 lines
1.4 KiB
Diff
From 54c453465d296a98be67d6d758b564424952fc63 Mon Sep 17 00:00:00 2001
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From: Icenowy Zheng <icenowy@aosc.io>
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Date: Tue, 1 Aug 2017 21:12:57 +0800
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Subject: [PATCH] clk: sunxi-ng: export CLK_PLL_DE for H3
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The CLK_PLL_DE is needed to be referenced in device tree for H3, for
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both forcing the parent of PLL_DE.
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So export it to the device tree binding header.
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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---
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drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
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include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
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2 files changed, 3 insertions(+), 2 deletions(-)
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diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
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index 1b4baea37d810..add3a7c182123 100644
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--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
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+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h
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@@ -35,9 +35,8 @@
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#define CLK_PLL_PERIPH0_2X 10
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#define CLK_PLL_GPU 11
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#define CLK_PLL_PERIPH1 12
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-#define CLK_PLL_DE 13
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-/* The CPUX clock is exported */
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+/* The PLL_DE and CPUX clocks is exported */
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#define CLK_AXI 15
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#define CLK_AHB1 16
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diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h
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index e139fe5c62ecd..5345957a8c2e6 100644
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--- a/include/dt-bindings/clock/sun8i-h3-ccu.h
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+++ b/include/dt-bindings/clock/sun8i-h3-ccu.h
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@@ -45,6 +45,8 @@
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#define CLK_PLL_PERIPH0 9
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+#define CLK_PLL_DE 13
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+
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#define CLK_CPUX 14
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#define CLK_BUS_CE 20
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