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armbian-build/patch/u-boot/legacy/u-boot-spacemit-k1/006-orangepi-rv2-r2s-fit.patch
Patrick Yavitz 0d8faf47da SpacemiT: Update OpenSBI/U-Boot to k1-bl-v2.2.9-release 
Signed-off-by: Patrick Yavitz <pyavitz@gmail.com>
2026-02-24 08:17:39 -05:00

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From a74951ae0f81b896cedac7fecea017ecd2a7f13c Mon Sep 17 00:00:00 2001
From: Sven-Ola Tuecke <sven-ola@gmx.de>
Date: Mon, 12 Jan 2026 21:21:41 +0100
Subject: [PATCH] add ky x1 boards (orangepi rv2 and r2s)
Signed-off-by: Sven-Ola Tuecke <sven-ola@gmx.de>
---
arch/riscv/dts/Makefile | 2 +-
arch/riscv/dts/x1_orangepi-r2s.dts | 335 +++++++++++++++++++++
arch/riscv/dts/x1_orangepi-rv2.dts | 342 ++++++++++++++++++++++
board/spacemit/k1-x/configs/uboot_fdt.its | 28 ++
4 files changed, 706 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/dts/x1_orangepi-r2s.dts
create mode 100644 arch/riscv/dts/x1_orangepi-rv2.dts
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index a0773093468..61e3ec156a4 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -16,7 +16,7 @@ dtb-$(CONFIG_TARGET_SPACEMIT_K1X) += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb \
k1-x_MUSE-Paper-mini-4g.dtb k1-x_baton-camera.dtb \
k1-x_FusionOne.dtb k1-x_InnoBoard-Pi.dtb k1-x_ZT001H.dtb \
k1-x_uav.dtb k1-x_MUSE-Paper2.dtb k1-x_MUSE-Pi-Pro.dtb k1-x_LX-V10.dtb \
- k1-x_som.dtb k1-x_ZT_RVOH007.dtb
+ k1-x_som.dtb k1-x_ZT_RVOH007.dtb x1_orangepi-rv2.dtb x1_orangepi-r2s.dtb
include $(srctree)/scripts/Makefile.dts
diff --git a/arch/riscv/dts/x1_orangepi-r2s.dts b/arch/riscv/dts/x1_orangepi-r2s.dts
new file mode 100644
index 00000000000..e9202c5046a
--- /dev/null
+++ b/arch/riscv/dts/x1_orangepi-r2s.dts
@@ -0,0 +1,335 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Ky, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+
+/ {
+ model = "ky x1 orangepi-r2s board";
+
+ aliases {
+ efuse_power = &ldo_31;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+ };
+
+ chosen {
+ bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+ stdout-path = "serial0:115200n8";
+ };
+
+ usb2hub: usb2hub {
+ compatible = "spacemit,usb-hub";
+ vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
+ status = "okay";
+ };
+
+ usb3hub: usb3hub {
+ compatible = "spacemit,usb-hub";
+ vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
+ status = "okay";
+ };
+
+ vcc5v_otg: vcc5v-otg-regulator {
+ u-boot,dm-spl;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v_otg";
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio 126 0>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ u-boot,dm-spl;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio 116 0>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ gpio-leds {
+ //u-boot,dm-pre-reloc;
+ compatible = "gpio-leds";
+ status = "okay";
+
+ act-led {
+ //u-boot,dm-pre-reloc;
+ gpios=<&gpio 96 1>;
+ label = "status_led";
+ default-state = "on";
+ };
+ };
+};
+
+&cpus {
+ timebase-frequency = <24000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "disabled";
+};
+
+&i2c1 {
+ status = "disabled";
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_0>;
+ status = "okay";
+
+ eeprom@50{
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ vin-supply-names = "eeprom_1v8";
+ status = "okay";
+ };
+};
+
+&i2c3 {
+ status = "disabled";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c5 {
+ status = "disabled";
+};
+
+&i2c6 {
+ status = "disabled";
+};
+
+&i2c7 {
+ status = "disabled";
+};
+
+&pinctrl {
+ pinctrl-single,gpio-range = <
+ &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
+ &range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
+ &range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ >;
+
+ usbp1_vbus: usbp1_vbus {
+ pinctrl-single,pins =<
+ K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
+ >;
+ };
+
+ gpio80_pmx_func0: gpio80_pmx_func0 {
+ pinctrl-single,pins = <
+ K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
+ >;
+ };
+};
+
+&gpio{
+ gpio-ranges = <
+ &pinctrl 49 GPIO_49 2
+ &pinctrl 58 GPIO_58 1
+ &pinctrl 63 GPIO_63 1
+ &pinctrl 65 GPIO_65 3
+ &pinctrl 70 PRI_TDI 4
+ &pinctrl 74 GPIO_74 1
+ &pinctrl 79 GPIO_79 1
+ &pinctrl 80 GPIO_80 4
+ &pinctrl 90 GPIO_90 3
+ &pinctrl 96 DVL0 2
+ &pinctrl 110 GPIO_110 1
+ &pinctrl 114 GPIO_114 3
+ &pinctrl 123 GPIO_123 5
+ >;
+};
+
+&udc {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&ehci1 {
+ vbus-supply = <&usb2hub>;
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&combphy {
+ status = "okay";
+};
+
+
+&usbdrd3 {
+ status = "okay";
+ vbus-supply = <&usb3hub>;
+ dwc3@c0a00000 {
+ dr_mode = "host";
+ phy_type = "utmi";
+ snps,dis_enblslpm_quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ };
+};
+
+&sdhci0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+ bus-width = <4>;
+ cd-gpios = <&gpio 80 0>;
+ cd-inverted;
+ cap-sd-highspeed;
+ sdh-phy-module = <0>;
+ clk-src-freq = <204800000>;
+ status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+ bus-width = <8>;
+ non-removable;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ sdh-phy-module = <1>;
+ clk-src-freq = <375000000>;
+ status = "okay";
+};
+
+&eth0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gmac0>;
+
+ phy-reset-pin = <110>;
+
+ clk_tuning_enable;
+ clk-tuning-by-delayline;
+ tx-phase = <90>;
+ rx-phase = <73>;
+
+ phy-mode = "rgmii";
+ phy-addr = <1>;
+ phy-handle = <&rgmii>;
+
+ ref-clock-from-phy;
+
+ mdio {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ rgmii: phy@0 {
+ compatible = "ethernet-phy-id001c.c916";
+ device_type = "ethernet-phy";
+ reg = <0x1>;
+ };
+ };
+};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie1_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1_3>;
+ status = "disabled";
+};
+
+&qspi {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <26500000>;
+ m25p,fast-read;
+ broken-flash-reset;
+ status = "okay";
+ };
+};
+
+&efuse {
+ status = "okay";
+};
+
+&dpu {
+ status = "okay";
+};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi_0>;
+ status = "okay";
+};
+
+&pwm14 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm14_1>;
+ status = "disabled";
+};
+
+&backlight {
+ pwms = <&pwm14 0 2000>;
+ default-brightness-level = <6>;
+ status = "disabled";
+};
+
+&mipi_dsi {
+ status = "disabled";
+};
+
+&panel {
+ dcp-gpios = <&gpio 82 0>;
+ dcn-gpios = <&gpio 83 0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio 81 0>;
+ status = "disabled";
+};
diff --git a/arch/riscv/dts/x1_orangepi-rv2.dts b/arch/riscv/dts/x1_orangepi-rv2.dts
new file mode 100644
index 00000000000..2c122f2107f
--- /dev/null
+++ b/arch/riscv/dts/x1_orangepi-rv2.dts
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Ky, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+
+/ {
+ model = "ky x1 orangepi-rv2 board";
+
+ aliases {
+ efuse_power = &ldo_31;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+ };
+
+ chosen {
+ bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+ stdout-path = "serial0:115200n8";
+ };
+
+ usb2hub: usb2hub {
+ compatible = "spacemit,usb-hub";
+ vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
+ status = "okay";
+ };
+
+ usb3hub: usb3hub {
+ compatible = "spacemit,usb-hub";
+ vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
+ status = "okay";
+ };
+
+ vcc5v_otg: vcc5v-otg-regulator {
+ u-boot,dm-spl;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v_otg";
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio 126 0>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ u-boot,dm-spl;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio 116 0>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ gpio-leds {
+ //u-boot,dm-pre-reloc;
+ compatible = "gpio-leds";
+ status = "okay";
+
+ act-led {
+ //u-boot,dm-pre-reloc;
+ gpios=<&gpio 96 1>;
+ label = "status_led";
+ default-state = "on";
+ };
+ };
+};
+
+&cpus {
+ timebase-frequency = <24000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "disabled";
+};
+
+&i2c1 {
+ status = "disabled";
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_0>;
+ status = "okay";
+
+ eeprom@50{
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ vin-supply-names = "eeprom_1v8";
+ status = "okay";
+ };
+};
+
+&i2c3 {
+ status = "disabled";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c5 {
+ status = "disabled";
+};
+
+&i2c6 {
+ status = "disabled";
+};
+
+&i2c7 {
+ status = "disabled";
+};
+
+&pinctrl {
+ pinctrl-single,gpio-range = <
+ &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
+ &range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
+ &range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ &range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
+ &range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+ >;
+
+ usbp1_vbus: usbp1_vbus {
+ pinctrl-single,pins =<
+ K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
+ >;
+ };
+
+ gpio80_pmx_func0: gpio80_pmx_func0 {
+ pinctrl-single,pins = <
+ K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
+ >;
+ };
+};
+
+&gpio{
+ gpio-ranges = <
+ &pinctrl 49 GPIO_49 2
+ &pinctrl 58 GPIO_58 1
+ &pinctrl 63 GPIO_63 1
+ &pinctrl 65 GPIO_65 3
+ &pinctrl 70 PRI_TDI 4
+ &pinctrl 74 GPIO_74 1
+ &pinctrl 79 GPIO_79 1
+ &pinctrl 80 GPIO_80 4
+ &pinctrl 90 GPIO_90 3
+ &pinctrl 96 DVL0 2
+ &pinctrl 110 GPIO_110 1
+ &pinctrl 114 GPIO_114 3
+ &pinctrl 123 GPIO_123 5
+ >;
+};
+
+&udc {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&ehci1 {
+ vbus-supply = <&usb2hub>;
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&combphy {
+ status = "okay";
+};
+
+
+&usbdrd3 {
+ status = "okay";
+ vbus-supply = <&usb3hub>;
+ dwc3@c0a00000 {
+ dr_mode = "host";
+ phy_type = "utmi";
+ snps,dis_enblslpm_quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ };
+};
+
+&sdhci0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+ bus-width = <4>;
+ cd-gpios = <&gpio 80 0>;
+ cd-inverted;
+ cap-sd-highspeed;
+ sdh-phy-module = <0>;
+ clk-src-freq = <204800000>;
+ status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+ bus-width = <8>;
+ non-removable;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ sdh-phy-module = <1>;
+ clk-src-freq = <375000000>;
+ status = "okay";
+};
+
+&eth0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gmac0>;
+
+ phy-reset-pin = <110>;
+
+ clk_tuning_enable;
+ clk-tuning-by-delayline;
+ tx-phase = <90>;
+ rx-phase = <73>;
+
+ phy-mode = "rgmii";
+ phy-addr = <1>;
+ phy-handle = <&rgmii>;
+
+ ref-clock-from-phy;
+
+ mdio {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ rgmii: phy@0 {
+ compatible = "ethernet-phy-id001c.c916";
+ device_type = "ethernet-phy";
+ reg = <0x1>;
+ };
+ };
+};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie1_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1_3>;
+ k1x,pwr_on = <&gpio 116 0>;
+ status = "okay";
+};
+
+&pcie2_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie2_4>;
+ status = "okay";
+};
+
+&qspi {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <26500000>;
+ m25p,fast-read;
+ broken-flash-reset;
+ status = "okay";
+ };
+};
+
+&efuse {
+ status = "okay";
+};
+
+&dpu {
+ status = "okay";
+};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi_0>;
+ status = "okay";
+};
+
+&pwm14 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm14_1>;
+ status = "disabled";
+};
+
+&backlight {
+ pwms = <&pwm14 0 2000>;
+ default-brightness-level = <6>;
+ status = "disabled";
+};
+
+&mipi_dsi {
+ status = "disabled";
+};
+
+&panel {
+ dcp-gpios = <&gpio 82 0>;
+ dcn-gpios = <&gpio 83 0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio 81 0>;
+ status = "disabled";
+};
diff --git a/board/spacemit/k1-x/configs/uboot_fdt.its b/board/spacemit/k1-x/configs/uboot_fdt.its
index bd1fa59f706..c486dfe5d73 100644
--- a/board/spacemit/k1-x/configs/uboot_fdt.its
+++ b/board/spacemit/k1-x/configs/uboot_fdt.its
@@ -172,6 +172,24 @@
algo = "crc32";
};
};
+ fdt_18 {
+ description = "x1_orangepi-rv2";
+ type = "flat_dt";
+ compression = "none";
+ data = /incbin/("../dtb/x1_orangepi-rv2.dtb");
+ hash-1 {
+ algo = "crc32";
+ };
+ };
+ fdt_19 {
+ description = "x1_orangepi-r2s";
+ type = "flat_dt";
+ compression = "none";
+ data = /incbin/("../dtb/x1_orangepi-r2s.dtb");
+ hash-1 {
+ algo = "crc32";
+ };
+ };
};
configurations {
@@ -261,5 +279,15 @@
loadables = "uboot";
fdt = "fdt_17";
};
+ conf_18 {
+ description = "x1_orangepi-rv2";
+ loadables = "uboot";
+ fdt = "fdt_18";
+ };
+ conf_19 {
+ description = "x1_orangepi-r2s";
+ loadables = "uboot";
+ fdt = "fdt_19";
+ };
};
};
--
2.34.1
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