5ffefd40ab
* patch: kernel: rockchip-dev: Handle more resolutions with HDMI (β) The added patch add more PLL configurations, in order to satisfy more HDMI frequencies requirements. This should allow users to benefit from more resolutions. However, this is fairly untested. I only tested it on my 1080p screen and, yeah, it works but so does the kernel without this patch. Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr> * patch: kernel: rockchip-dev: Handle more resolutions with HDMI (β) Now with proper patches names. Anyway : The added patch add more PLL configurations, in order to satisfy more HDMI frequencies requirements. This should allow users to benefit from more resolutions. However, this is fairly untested. I only tested it on my 1080p screen and, yeah, it works but it also does without this patch. So could anyone test this with the following configurations ? * [ ] A HDMI 4K screen * [ ] A HDMI 1366x768 screen resolution * [ ] A VGA screen with a VGA to HDMI adapter * [ ] A DVI screen with a DVI to HDMI adapter Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr> * Using the patches provided by @Kwiboo for HDMI This provides me way more resolutions, including interlaced modes. I don't see 4K modes, though the screen attached can't do it, so I still don't know if that can help provided 4K modes on mainline kernels. Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr> * Support for 4K screens Using fixes provided by @czak Tested and approved by @czak too ! Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
191 lines
4.3 KiB
Diff
191 lines
4.3 KiB
Diff
From 0a07a7ed53b37c7a53df3e14ab29d366522d2439 Mon Sep 17 00:00:00 2001
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From: Douglas Anderson <dianders@chromium.org>
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Date: Mon, 11 Jul 2016 19:05:42 +0800
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Subject: [PATCH 08/14] drm/rockchip: dw_hdmi: Use auto-generated tables
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The previous tables for mpll_cfg and curr_ctrl were created using the
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20-pages of example settings provided by the PHY vendor. Those
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example settings weren't particularly dense, so there were places
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where we were guessing what the settings would be for 10-bit and
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12-bit (not that we use those anyway). It was also always a lot of
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extra work every time we wanted to add a new clock rate since we had
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to cross-reference several tables.
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In <http://crosreview.com/285855> I've gone through the work to figure
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out how to generate this table automatically. Let's now use the
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automatically generated table and then we'll never need to look at it
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again.
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We only support 8-bit mode right now and only support a small number
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of clock rates and and I've verified that the only 8-bit rate that was
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affected was 148.5. That mode appears to have been wrong in the old
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table.
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Yakir Yang <ykk@rock-chips.com>
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Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
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---
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drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 130 +++++++++++---------
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1 file changed, 69 insertions(+), 61 deletions(-)
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diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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index 3cd86070f..c0f67309b 100644
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--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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@@ -78,80 +78,88 @@ struct rockchip_hdmi {
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static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
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{
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- 27000000, {
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- { 0x00b3, 0x0000},
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- { 0x2153, 0x0000},
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- { 0x40f3, 0x0000}
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+ 30666000, {
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+ { 0x00b3, 0x0000 },
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+ { 0x2153, 0x0000 },
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+ { 0x40f3, 0x0000 },
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},
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- }, {
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- 36000000, {
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- { 0x00b3, 0x0000},
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- { 0x2153, 0x0000},
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- { 0x40f3, 0x0000}
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+ }, {
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+ 36800000, {
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+ { 0x00b3, 0x0000 },
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+ { 0x2153, 0x0000 },
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+ { 0x40a2, 0x0001 },
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},
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- }, {
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- 40000000, {
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- { 0x00b3, 0x0000},
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- { 0x2153, 0x0000},
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- { 0x40f3, 0x0000}
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+ }, {
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+ 46000000, {
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+ { 0x00b3, 0x0000 },
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+ { 0x2142, 0x0001 },
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+ { 0x40a2, 0x0001 },
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},
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- }, {
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- 54000000, {
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- { 0x0072, 0x0001},
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- { 0x2142, 0x0001},
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- { 0x40a2, 0x0001},
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+ }, {
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+ 61333000, {
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+ { 0x0072, 0x0001 },
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+ { 0x2142, 0x0001 },
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+ { 0x40a2, 0x0001 },
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},
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- }, {
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- 65000000, {
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- { 0x0072, 0x0001},
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- { 0x2142, 0x0001},
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- { 0x40a2, 0x0001},
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+ }, {
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+ 73600000, {
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+ { 0x0072, 0x0001 },
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+ { 0x2142, 0x0001 },
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+ { 0x4061, 0x0002 },
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},
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- }, {
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- 66000000, {
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- { 0x013e, 0x0003},
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- { 0x217e, 0x0002},
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- { 0x4061, 0x0002}
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+ }, {
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+ 92000000, {
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+ { 0x0072, 0x0001 },
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+ { 0x2145, 0x0002 },
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+ { 0x4061, 0x0002 },
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+ },
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+ }, {
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+ 122666000, {
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+ { 0x0051, 0x0002 },
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+ { 0x2145, 0x0002 },
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+ { 0x4061, 0x0002 },
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},
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- }, {
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- 74250000, {
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- { 0x0072, 0x0001},
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- { 0x2145, 0x0002},
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- { 0x4061, 0x0002}
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+ }, {
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+ 147200000, {
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+ { 0x0051, 0x0002 },
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+ { 0x2145, 0x0002 },
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+ { 0x4064, 0x0003 },
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},
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- }, {
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- 83500000, {
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- { 0x0072, 0x0001},
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+ }, {
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+ 184000000, {
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+ { 0x0051, 0x0002 },
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+ { 0x214c, 0x0003 },
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+ { 0x4064, 0x0003 },
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},
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- }, {
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- 108000000, {
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- { 0x0051, 0x0002},
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- { 0x2145, 0x0002},
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- { 0x4061, 0x0002}
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+ }, {
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+ 226666000, {
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+ { 0x0040, 0x0003 },
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+ { 0x214c, 0x0003 },
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+ { 0x4064, 0x0003 },
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},
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- }, {
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- 106500000, {
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- { 0x0051, 0x0002},
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- { 0x2145, 0x0002},
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- { 0x4061, 0x0002}
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+ }, {
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+ 272000000, {
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+ { 0x0040, 0x0003 },
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+ { 0x214c, 0x0003 },
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+ { 0x5a64, 0x0003 },
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},
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- }, {
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- 146250000, {
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- { 0x0051, 0x0002},
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- { 0x2145, 0x0002},
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- { 0x4061, 0x0002}
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+ }, {
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+ 340000000, {
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+ { 0x0040, 0x0003 },
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+ { 0x3b4c, 0x0003 },
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+ { 0x5a64, 0x0003 },
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},
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- }, {
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- 148500000, {
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- { 0x0051, 0x0003},
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- { 0x214c, 0x0003},
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- { 0x4064, 0x0003}
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+ }, {
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+ 600000000, {
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+ { 0x1a40, 0x0003 },
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+ { 0x3b4c, 0x0003 },
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+ { 0x5a64, 0x0003 },
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},
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- }, {
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+ }, {
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~0UL, {
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- { 0x00a0, 0x000a },
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- { 0x2001, 0x000f },
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- { 0x4002, 0x000f },
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+ { 0x0000, 0x0000 },
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+ { 0x0000, 0x0000 },
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+ { 0x0000, 0x0000 },
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},
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}
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};
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--
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2.26.2
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