d8474158e2
This change introduces an optional overlay that can be used to modify the default CPU clock operating table to support a maximum core clock of 1.4GHz. These higher clock rates will only be allowed if the board's CPU VDD regulator can support operation at 1.4v (or greater), e.g., SY8106A.
167 lines
5.0 KiB
Diff
167 lines
5.0 KiB
Diff
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
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index 4c945d8..2833b86 100644
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--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
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+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
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@@ -12,6 +12,9 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
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sun50i-a64-w1-gpio.dtbo \
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sun50i-h5-analog-codec.dtbo \
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sun50i-h5-cir.dtbo \
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+ sun50i-h5-cpu-clock-1.3GHz.dtbo \
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+ sun50i-h5-cpu-clock-1.4GHz.dtbo \
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+ sun50i-h5-gpio-regulator-1.3v.dtbo \
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sun50i-h5-i2c0.dtbo \
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sun50i-h5-i2c1.dtbo \
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sun50i-h5-i2c2.dtbo \
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diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
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new file mode 100644
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index 0000000..4ab2633
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
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@@ -0,0 +1,40 @@
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+// DT overlay for operating points to 1.3GHz
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the H5 DT cooling-maps, replace the latter
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+ // part of the OP table with the new frequencies...
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+
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+ // override the "1.056GHz" opp definition with the 1.104GHz clock definition
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+ opp@1056000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.104GHz" opp definition with the 1.200GHz clock definition
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+ opp@1104000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.152GHz" opp definition with the 1.296GHz clock definition
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+ opp@1152000000 {
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+ opp-hz = /bits/ 64 <1296000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts
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new file mode 100644
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index 0000000..6994432
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts
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@@ -0,0 +1,56 @@
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+// DT overlay for operating points to 1.4GHz
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the H5 DT cooling-maps, replace the latter
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+ // part of the OP table with the new frequencies...
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+
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+ // override the "960MHz" opp definition with the 1.008GHz clock definition
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+ opp@960000000 {
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+ opp-hz = /bits/ 64 <1008000000>;
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+ opp-microvolt = <1200000 1200000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+
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+ // override the "1.008GHz" opp definition with the 1.104GHz clock definition
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+ opp@1008000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1240000 1240000 1400000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.056GHz" opp definition with the 1.200GHz clock definition
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+ opp@1056000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1290000 1290000 1400000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+
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+ // override the "1.104GHz" opp definition with the 1.296GHz clock definition
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+ opp@1104000000 {
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+ opp-hz = /bits/ 64 <1296000000>;
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+ opp-microvolt = <1340000 1340000 1400000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ // override the "1.152GHz" opp definition with the 1.392GHz clock definition
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+ opp@1152000000 {
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+ opp-hz = /bits/ 64 <1392000000>;
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+ opp-microvolt = <1400000 1400000 1400000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
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new file mode 100644
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index 0000000..8d2755c
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
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@@ -0,0 +1,38 @@
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "allwinner,sun50i-h5";
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+
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+ fragment@0 {
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+ target-path = "/";
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+
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+ __overlay__ {
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+ reg_vdd_cpux: gpio-regulator {
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+ compatible = "regulator-gpio";
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+ regulator-name = "vdd-cpux";
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+ regulator-type = "voltage";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1300000>;
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+ regulator-ramp-delay = <50>; /* 4ms */
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+
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+ gpios = <&r_pio 0 6 0>; /* PL6 */
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+ enable-active-high;
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+ gpios-states = <0x1>;
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+ states = <1100000 0x0
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+ 1300000 0x1>;
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&cpu0>;
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+
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+ __overlay__ {
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+ cpu-supply = <®_vdd_cpux>;
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+ };
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+ };
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+};
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+
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