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updated additional phy-mode configurations

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This commit is contained in:
5kft 2020-12-20 06:39:09 -08:00
parent 343fb5f003
commit fcd4acf8bf
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GPG Key ID: 1FA43AEDB0493C92
5 changed files with 102 additions and 55 deletions
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2
patch/kernel/sunxi-dev/board-h3-add-nanopi-r1-and-duo2.patch
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@ -152,7 +152,7 @@ index 000000000..731c705a4
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+};

2
patch/kernel/sunxi-dev/board-h5-add-0001-nanopi-neo-core2.patch
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@ -146,7 +146,7 @@ index 000000000..b3035ddd7
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+

2
patch/kernel/sunxi-dev/board-h5-add-0002-nanopi-neo2-v1.1.patch
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@ -153,7 +153,7 @@ index 00000000..cab3c73b
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+

99
patch/kernel/sunxi-dev/board-h5-nanopi-neo2-v1.0-add-regulator-fix-phymode.patch Normal file
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@ -0,0 +1,99 @@
diff --git a/arch/arm/crypto/aes-neonbs-glue.c.rej b/arch/arm/crypto/aes-neonbs-glue.c.rej
new file mode 100644
index 000000000..d0299a251
--- /dev/null
+++ b/arch/arm/crypto/aes-neonbs-glue.c.rej
@@ -0,0 +1,31 @@
+--- arch/arm/crypto/aes-neonbs-glue.c
++++ arch/arm/crypto/aes-neonbs-glue.c
+@@ -19,7 +19,7 @@ MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
+ MODULE_LICENSE("GPL v2");
+
+ MODULE_ALIAS_CRYPTO("ecb(aes)");
+-MODULE_ALIAS_CRYPTO("cbc(aes)");
++MODULE_ALIAS_CRYPTO("cbc(aes)-all");
+ MODULE_ALIAS_CRYPTO("ctr(aes)");
+ MODULE_ALIAS_CRYPTO("xts(aes)");
+
+@@ -191,7 +191,8 @@ static int cbc_init(struct crypto_skcipher *tfm)
+ struct aesbs_cbc_ctx *ctx = crypto_skcipher_ctx(tfm);
+ unsigned int reqsize;
+
+- ctx->enc_tfm = crypto_alloc_skcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC);
++ ctx->enc_tfm = crypto_alloc_skcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC |
++ CRYPTO_ALG_NEED_FALLBACK);
+ if (IS_ERR(ctx->enc_tfm))
+ return PTR_ERR(ctx->enc_tfm);
+
+@@ -441,7 +442,8 @@ static struct skcipher_alg aes_algs[] = { {
+ .base.cra_blocksize = AES_BLOCK_SIZE,
+ .base.cra_ctxsize = sizeof(struct aesbs_cbc_ctx),
+ .base.cra_module = THIS_MODULE,
+- .base.cra_flags = CRYPTO_ALG_INTERNAL,
++ .base.cra_flags = CRYPTO_ALG_INTERNAL |
++ CRYPTO_ALG_NEED_FALLBACK,
+
+ .min_keysize = AES_MIN_KEY_SIZE,
+ .max_keysize = AES_MAX_KEY_SIZE,
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index ea417eb01..fcf5a1a04 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -26,12 +26,13 @@ leds {
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ linux,default-trigger = "default-on";
};
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
};
};
@@ -52,6 +53,22 @@ reg_vcc3v3: vcc3v3 {
regulator-max-microvolt = <3300000>;
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1100000 0x1>;
+ };
+
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -63,6 +80,10 @@ reg_usb0_vbus: usb0-vbus {
};
};
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
&ehci0 {
status = "okay";
};
@@ -76,7 +97,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};

52
patch/kernel/sunxi-dev/board-h5-nanopi-neo2-v1.0-add-regulator.patch
View File

@ -1,52 +0,0 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index cc268a697..c839b4c0b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -64,12 +64,13 @@
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ linux,default-trigger = "default-on";
};
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
};
};
@@ -90,6 +91,21 @@
regulator-max-microvolt = <3300000>;
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1100000 0x1>;
+ };
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -101,6 +117,10 @@
};
};
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
&ehci0 {
status = "okay";
};