Update Pine64 patches

Errata 843419 on default kernel needs testing
This commit is contained in:
zador-blood-stained 2016-11-20 22:57:30 +03:00
parent e71f0e2630
commit fc2fb58371
4 changed files with 62 additions and 22 deletions

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@ -23,6 +23,8 @@ CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_KERNEL_MODE_NEON=y
CONFIG_ARM64_MODULE_CMODEL_LARGE=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y

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@ -0,0 +1,60 @@
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index bf428a1..bcfbbb5 100755
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -477,6 +477,31 @@ config SECCOMP
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
+config ARM64_MODULE_CMODEL_LARGE
+ bool
+
+config ARM64_ERRATUM_843419
+ bool "Cortex-A53: 843419: A load or store might access an incorrect address"
+ depends on MODULES
+ default y
+ select ARM64_MODULE_CMODEL_LARGE
+ select ARM64_MODULE_CMODEL_LARGE if MODULES
+ help
+ This option builds kernel modules using the large memory model in
+ order to avoid the use of the ADRP instruction, which can cause
+ a subsequent memory access to use an incorrect address on Cortex-A53
+ parts up to r0p4.
+
+ Note that the kernel itself must be linked with a version of ld
+ which fixes potentially affected ADRP instructions through the
+ use of veneers.
+ This option links the kernel with '--fix-cortex-a53-843419' and
+ builds modules using the large memory model in order to avoid the use
+ of the ADRP instruction, which can cause a subsequent memory access
+ to use an incorrect address on Cortex-A53 parts up to r0p4.
+
+ If unsure, say Y.
+
endmenu
menu "Boot options"
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index e2782e1..4196f47 100755
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -34,6 +34,19 @@ AS += -EL
LD += -EL
endif
+ifeq ($(CONFIG_ARM64_MODULE_CMODEL_LARGE), y)
+KBUILD_CFLAGS_MODULE += -mcmodel=large
+endif
+
+ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
+ld-843419-workaround := $(call ld-option, --fix-cortex-a53-843419)
+ifeq ($(ld-843419-workaround),)
+$(warning ld does not support --fix-cortex-a53-843419; kernel may be susceptible to erratum)
+else
+LDFLAGS_vmlinux += --fix-cortex-a53-843419
+endif
+endif
+
comma = ,
CHECKFLAGS += -D__aarch64__

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@ -1,22 +0,0 @@
diff --git a/u-boot/include/configs/sunxi-common.h b/u-boot/include/configs/sunxi-common.h
index b9aa62b..980c252 100644
--- a/u-boot/include/configs/sunxi-common.h
+++ b/u-boot/include/configs/sunxi-common.h
@@ -100,7 +100,7 @@
* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 40 KiB */
#else
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
@@ -221,7 +221,7 @@
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-#define LOW_LEVEL_SRAM_STACK 0x0001A000
+#define LOW_LEVEL_SRAM_STACK 0x00018000
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#else
/* end of 32 KiB in sram */