rockchip64: remove inno-usb3 rk3328 driver from EDGE kernel, remove/rename affected board files (#4006)
This commit is contained in:
Paolo
GitHub
parent
c91029dc10
commit
fa89975db7
@ -1,6 +1,6 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 5.18.3 Kernel Configuration
|
||||
# Linux/arm64 5.18.12 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
@ -165,6 +165,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
|
||||
CONFIG_CC_HAS_INT128=y
|
||||
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
|
||||
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
|
||||
CONFIG_ARCH_SUPPORTS_INT128=y
|
||||
CONFIG_NUMA_BALANCING=y
|
||||
CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
|
||||
@ -645,6 +646,7 @@ CONFIG_JUMP_LABEL=y
|
||||
# CONFIG_STATIC_KEYS_SELFTEST is not set
|
||||
CONFIG_UPROBES=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_KRETPROBES=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
|
||||
@ -8583,7 +8585,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=m
|
||||
CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB3=m
|
||||
CONFIG_PHY_ROCKCHIP_PCIE=y
|
||||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
|
||||
CONFIG_PHY_ROCKCHIP_TYPEC=y
|
||||
@ -9435,6 +9436,7 @@ CONFIG_CRYPTO_LIB_SM3=m
|
||||
CONFIG_CRYPTO_LIB_SM4=m
|
||||
# end of Crypto library routines
|
||||
|
||||
CONFIG_LIB_MEMNEQ=y
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRC_T10DIF=y
|
||||
@ -9785,10 +9787,12 @@ CONFIG_FTRACE=y
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
CONFIG_KPROBE_EVENTS=y
|
||||
CONFIG_UPROBE_EVENTS=y
|
||||
CONFIG_BPF_EVENTS=y
|
||||
CONFIG_DYNAMIC_EVENTS=y
|
||||
CONFIG_PROBE_EVENTS=y
|
||||
# CONFIG_BPF_KPROBE_OVERRIDE is not set
|
||||
# CONFIG_SYNTH_EVENTS is not set
|
||||
# CONFIG_HIST_TRIGGERS is not set
|
||||
# CONFIG_TRACE_EVENT_INJECT is not set
|
||||
@ -9798,6 +9802,7 @@ CONFIG_PROBE_EVENTS=y
|
||||
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
|
||||
# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set
|
||||
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
|
||||
# CONFIG_KPROBE_EVENT_GEN_TEST is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_IO_STRICT_DEVMEM is not set
|
||||
@ -9819,6 +9824,7 @@ CONFIG_KUNIT=m
|
||||
# CONFIG_KUNIT_EXAMPLE_TEST is not set
|
||||
# CONFIG_KUNIT_ALL_TESTS is not set
|
||||
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
|
||||
CONFIG_FUNCTION_ERROR_INJECTION=y
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
|
||||
@ -9828,6 +9834,7 @@ CONFIG_RUNTIME_TESTING_MENU=y
|
||||
# CONFIG_TEST_MIN_HEAP is not set
|
||||
# CONFIG_TEST_SORT is not set
|
||||
CONFIG_TEST_DIV64=m
|
||||
# CONFIG_KPROBES_SANITY_TEST is not set
|
||||
CONFIG_BACKTRACE_SELF_TEST=m
|
||||
CONFIG_TEST_REF_TRACKER=m
|
||||
CONFIG_RBTREE_TEST=m
|
||||
|
||||
@ -1,498 +0,0 @@
|
||||
--- /dev/null 2020-12-23 11:47:50.044000030 +0200
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts 2020-12-30 16:15:50.808198411 +0200
|
||||
@@ -0,0 +1,495 @@
|
||||
+/*
|
||||
+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3328.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "Firefly roc-rk3328-pc";
|
||||
+ compatible = "firefly,roc-rk3328-pc", "rockchip,rk3328";
|
||||
+
|
||||
+ aliases {
|
||||
+ mmc0 = &sdmmc;
|
||||
+ mmc1 = &emmc; /* MMC boot device */
|
||||
+ };
|
||||
+
|
||||
+ gmac_clkin: external-gmac-clock {
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <125000000>;
|
||||
+ clock-output-names = "gmac_clkin";
|
||||
+ #clock-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,mclk-fs = <256>;
|
||||
+ simple-audio-card,name = "rockchip,rk3328";
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s1>;
|
||||
+ };
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&codec>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,name = "rockchip,hdmi";
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s0>;
|
||||
+ };
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&hdmi>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_host_5v: vcc-host-5v-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb30_host_drv>;
|
||||
+ regulator-name = "vcc_host_5v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_phy";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_phy: vcc-phy-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb20_host_drv>;
|
||||
+ regulator-name = "vcc_host1_5v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: sdmmc-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0m1_pin>;
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: vcc-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+
|
||||
+ xin32k: xin32k {
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "xin32k";
|
||||
+ #clock-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ power_led: led-0 {
|
||||
+ label = "firefly:blue:power";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
|
||||
+ default-state = "on";
|
||||
+ mode = <0x23>;
|
||||
+ };
|
||||
+
|
||||
+ user_led: led-1 {
|
||||
+ label = "firefly:yellow:user";
|
||||
+ linux,default-trigger = "mmc1";
|
||||
+ gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
|
||||
+ default-state = "off";
|
||||
+ mode = <0x05>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vccio1-supply = <&vcc_io>;
|
||||
+ vccio2-supply = <&vcc_18emmc>;
|
||||
+ vccio3-supply = <&vcc_io>;
|
||||
+ vccio4-supply = <&vcc_io>;
|
||||
+ vccio5-supply = <&vcc_io>;
|
||||
+ vccio6-supply = <&vcc_io>;
|
||||
+ pmuio-supply = <&vcc_io>;
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ status = "okay";
|
||||
+ mali-supply = <&vdd_logic>;
|
||||
+};
|
||||
+
|
||||
+&gmac2phy {
|
||||
+ phy-supply = <&vcc_phy>;
|
||||
+ clock_in_out = "output";
|
||||
+ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
|
||||
+ assigned-clock-rate = <50000000>;
|
||||
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
|
||||
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&gmac2io {
|
||||
+ phy-supply = <&vcc_io>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ clock_in_out = "input";
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 50000>;
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ snps,aal;
|
||||
+ snps,rxpbl = <0x4>;
|
||||
+ snps,txpbl = <0x4>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&display_subsystem {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ ddc-i2c-scl-high-time-ns = <9625>;
|
||||
+ ddc-i2c-scl-low-time-ns = <10000>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmiphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*&h265e {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rkvdec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vepu {
|
||||
+ status = "okay";
|
||||
+};*/
|
||||
+
|
||||
+&vop {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*&vpu_service {
|
||||
+ status = "okay";
|
||||
+};*/
|
||||
+
|
||||
+&i2s0 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ rockchip,bclk-fs = <128>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&codec {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ supports-emmc;
|
||||
+ disable-wp;
|
||||
+ non-removable;
|
||||
+ num-slots = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ max-frequency = <150000000>;
|
||||
+ num-slots = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
||||
+ supports-sd;
|
||||
+ status = "okay";
|
||||
+ vmmc-supply = <&vcc_sd>;
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ rk805: rk805@18 {
|
||||
+ compatible = "rockchip,rk805";
|
||||
+ status = "okay";
|
||||
+ reg = <0x18>;
|
||||
+ interrupt-parent = <&gpio2>;
|
||||
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ wakeup-source;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "xin32k", "rk805-clkout2";
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc5-supply = <&vcc_io>;
|
||||
+ vcc6-supply = <&vcc_io>;
|
||||
+
|
||||
+ rtc {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pwrkey {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ gpio {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ regulators {
|
||||
+ compatible = "rk805-regulator";
|
||||
+ status = "okay";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_arm: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_arm";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <950000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: DCDC_REG4 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_18: LDO_REG1 {
|
||||
+ regulator-name = "vdd_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_18emmc: LDO_REG2 {
|
||||
+ regulator-name = "vcc_18emmc";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_11: LDO_REG3 {
|
||||
+ regulator-name = "vdd_11";
|
||||
+ regulator-min-microvolt = <1100000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1100000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&clk_32k_out>;
|
||||
+
|
||||
+ clk_32k {
|
||||
+ clk_32k_out: clk-32k-out {
|
||||
+ rockchip,pins =
|
||||
+ <1 RK_PD4 1 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins =
|
||||
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio-pwrseq {
|
||||
+ wifi_enable_h: wifi-enable-h {
|
||||
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_4ma>,
|
||||
+ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb2 {
|
||||
+ usb20_host_drv: usb20-host-drv {
|
||||
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb3 {
|
||||
+ usb30_host_drv: usb30-host-drv {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&u2phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy_host {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy_utmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy_pipe {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb20_otg {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd3 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdt {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vdd_18>;
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ status = "okay";
|
||||
+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
|
||||
+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
|
||||
+};
|
||||
@ -13,7 +13,7 @@ new file mode 100644
|
||||
index 000000000..08d77c694
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
|
||||
@@ -0,0 +1,529 @@
|
||||
@@ -0,0 +1,517 @@
|
||||
+/*
|
||||
+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
|
||||
@ -495,18 +495,6 @@ index 000000000..08d77c694
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy_utmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy_pipe {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user