Upgrade Meson64 u-boot to 2020.10 (#2500)
* Upgrade Meson64 u-boot to 2020.10 Tested on C1,C2 and C4 * Remove accidentaly added patch * Remove patches that are not needed anymore and restore / adjust the one that is still needed for Lepotato
This commit is contained in:
Igor Pečovnik
GitHub
parent
d78a8d2e00
commit
e9588e3661
@ -5,6 +5,7 @@ LINUXFAMILY=meson64
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ARCH=arm64
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SERIALCON=ttyAML0
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SRC_LOADADDR='LOADADDR=0x1080000'
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BOOTBRANCH="tag:v2020.10"
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OVERLAY_PREFIX='meson'
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# this family does not need it
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@ -1,419 +0,0 @@
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From e59c5fca47c82b85f232fc9e182df387d6c34dfd Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Fri, 24 Apr 2020 02:58:30 +0000
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Subject: [PATCH 1/3] ARM: dts: Import Odroid C4 DT from Linux 5.X
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/meson-sm1-odroid-c4.dts | 386 +++++++++++++++++++++++++++
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2 files changed, 387 insertions(+)
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create mode 100755 arch/arm/dts/meson-sm1-odroid-c4.dts
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 820ee973..7dee4c51 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -154,6 +154,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
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meson-g12b-odroid-n2.dtb \
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meson-g12b-a311d-khadas-vim3.dtb \
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meson-sm1-khadas-vim3l.dtb \
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+ meson-sm1-odroid-c4.dtb \
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meson-sm1-sei610.dtb
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dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra20-medcom-wide.dtb \
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diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts
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new file mode 100755
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index 00000000..f4e19710
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--- /dev/null
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+++ b/arch/arm/dts/meson-sm1-odroid-c4.dts
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@@ -0,0 +1,386 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
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+ */
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+
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+/dts-v1/;
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+
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+#include "meson-sm1.dtsi"
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+#include <dt-bindings/gpio/meson-g12a-gpio.h>
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+
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+/ {
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+ compatible = "hardkernel,odroid-c4", "amlogic,sm1";
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+ model = "Hardkernel ODROID-C4";
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+
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+ aliases {
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+ serial0 = &uart_AO;
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+ ethernet0 = ðmac;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x0 0x0 0x40000000>;
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+ };
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+
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+ emmc_pwrseq: emmc-pwrseq {
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+ compatible = "mmc-pwrseq-emmc";
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+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ tflash_vdd: regulator-tflash_vdd {
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+ compatible = "regulator-fixed";
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+
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+ regulator-name = "TFLASH_VDD";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ regulator-always-on;
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+ };
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+
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+ tf_io: gpio-regulator-tf_io {
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+ compatible = "regulator-gpio";
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+
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+ regulator-name = "TF_IO";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ gpios = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0>;
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+
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+ states = <3300000 0>,
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+ <1800000 1>;
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+ };
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+
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+ flash_1v8: regulator-flash_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "FLASH_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ main_12v: regulator-main_12v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "12V";
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_5v: regulator-vcc_5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ vin-supply = <&main_12v>;
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+ };
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+
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+ vcc_1v8: regulator-vcc_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_3v3: regulator-vcc_3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC_3V3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vddao_3v3>;
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+ regulator-always-on;
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+ /* FIXME: actually controlled by VDDCPU_B_EN */
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+ };
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+
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+ vddcpu: regulator-vddcpu {
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+ /*
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+ * MP8756GD Regulator.
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+ */
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+ compatible = "pwm-regulator";
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+
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+ regulator-name = "VDDCPU";
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+ regulator-min-microvolt = <721000>;
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+ regulator-max-microvolt = <1022000>;
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+
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+ vin-supply = <&main_12v>;
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+
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+ pwms = <&pwm_AO_cd 1 1250 0>;
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+ pwm-dutycycle-range = <100 0>;
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+
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ hub_5v: regulator-hub_5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "HUB_5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_5v>;
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+
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+ /* Connected to the Hub CHIPENABLE, LOW sets low power state */
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+ gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ usb_pwr_en: regulator-usb_pwr_en {
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+ compatible = "regulator-fixed";
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+ regulator-name = "USB_PWR_EN";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_5v>;
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+
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+ /* Connected to the microUSB port power enable */
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+ gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ vddao_1v8: regulator-vddao_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDAO_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vddao_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ vddao_3v3: regulator-vddao_3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDAO_3V3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&main_12v>;
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+ regulator-always-on;
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+ };
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+
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+ hdmi-connector {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_connector_in: endpoint {
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+ remote-endpoint = <&hdmi_tx_tmds_out>;
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+ };
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vddcpu>;
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+ operating-points-v2 = <&cpu_opp_table>;
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+ clocks = <&clkc CLKID_CPU_CLK>;
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+ clock-latency = <50000>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vddcpu>;
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+ operating-points-v2 = <&cpu_opp_table>;
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+ clocks = <&clkc CLKID_CPU1_CLK>;
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+ clock-latency = <50000>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vddcpu>;
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+ operating-points-v2 = <&cpu_opp_table>;
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+ clocks = <&clkc CLKID_CPU2_CLK>;
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+ clock-latency = <50000>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vddcpu>;
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+ operating-points-v2 = <&cpu_opp_table>;
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+ clocks = <&clkc CLKID_CPU3_CLK>;
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+ clock-latency = <50000>;
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+};
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+
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+&ext_mdio {
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+ external_phy: ethernet-phy@0 {
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+ /* Realtek RTL8211F (0x001cc916) */
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+ reg = <0>;
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+ max-speed = <1000>;
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+
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <30000>;
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+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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+
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+ interrupt-parent = <&gpio_intc>;
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+ /* MAC_INTR on GPIOZ_14 */
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+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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+ };
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+};
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+
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+ðmac {
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+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+ phy-mode = "rgmii";
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+ phy-handle = <&external_phy>;
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+ amlogic,tx-delay-ns = <2>;
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+};
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+
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+&gpio {
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+ gpio-line-names =
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+ /* GPIOZ */
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+ "", "", "", "", "", "", "", "",
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+ "", "", "", "", "", "", "", "",
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+ /* GPIOH */
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+ "", "", "", "", "",
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+ "PIN_36", /* GPIOH_5 */
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+ "PIN_26", /* GPIOH_6 */
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+ "PIN_32", /* GPIOH_7 */
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+ "",
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+ /* BOOT */
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+ "", "", "", "", "", "", "", "",
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+ "", "", "", "", "", "", "", "",
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+ /* GPIOC */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIOA */
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+ "", "", "", "", "", "", "", "",
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+ "", "", "", "", "", "",
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+ "PIN_27", /* GPIOA_14 */
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+ "PIN_28", /* GPIOA_15 */
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+ /* GPIOX */
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+ "PIN_16", /* GPIOX_0 */
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+ "PIN_18", /* GPIOX_1 */
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+ "PIN_22", /* GPIOX_2 */
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+ "PIN_11", /* GPIOX_3 */
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+ "PIN_13", /* GPIOX_4 */
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+ "PIN_7", /* GPIOX_5 */
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+ "PIN_33", /* GPIOX_6 */
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+ "PIN_15", /* GPIOX_7 */
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+ "PIN_19", /* GPIOX_8 */
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+ "PIN_21", /* GPIOX_9 */
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+ "PIN_24", /* GPIOX_10 */
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+ "PIN_23", /* GPIOX_11 */
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+ "PIN_8", /* GPIOX_12 */
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+ "PIN_10", /* GPIOX_13 */
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+ "PIN_29", /* GPIOX_14 */
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+ "PIN_31", /* GPIOX_15 */
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+ "PIN_12", /* GPIOX_16 */
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+ "PIN_3", /* GPIOX_17 */
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+ "PIN_5", /* GPIOX_18 */
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+ "PIN_35"; /* GPIOX_19 */
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+
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+ /*
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+ * WARNING: The USB Hub on the Odroid-C4 needs a reset signal
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+ * to be turned high in order to be detected by the USB Controller
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+ * This signal should be handled by a USB specific power sequence
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+ * in order to reset the Hub when USB bus is powered down.
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+ */
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+ usb-hub {
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+ gpio-hog;
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+ gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ line-name = "usb-hub-reset";
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+ };
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+};
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+
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+&gpio_ao {
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+ gpio-line-names =
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+ /* GPIOAO */
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+ "", "", "", "",
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+ "PIN_47", /* GPIOAO_4 */
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+ "", "",
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+ "PIN_45", /* GPIOAO_7 */
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+ "PIN_46", /* GPIOAO_8 */
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+ "PIN_44", /* GPIOAO_9 */
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+ "PIN_42", /* GPIOAO_10 */
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+ "",
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+ /* GPIOE */
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+ "", "", "";
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+};
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+
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+&hdmi_tx {
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+ status = "okay";
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+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
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+ pinctrl-names = "default";
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+ hdmi-supply = <&vcc_5v>;
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+};
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+
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+&hdmi_tx_tmds_port {
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+ hdmi_tx_tmds_out: endpoint {
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+ remote-endpoint = <&hdmi_connector_in>;
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+ };
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+};
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+
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+&pwm_AO_cd {
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+ pinctrl-0 = <&pwm_ao_d_e_pins>;
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+ pinctrl-names = "default";
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+ clocks = <&xtal>;
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+ clock-names = "clkin1";
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+ status = "okay";
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+};
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+
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+&saradc {
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+ status = "okay";
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+};
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+
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+/* SD card */
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+&sd_emmc_b {
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+ status = "okay";
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+ pinctrl-0 = <&sdcard_c_pins>;
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+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
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+ pinctrl-names = "default", "clk-gate";
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+
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ max-frequency = <200000000>;
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+ sd-uhs-sdr12;
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+ sd-uhs-sdr25;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ disable-wp;
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+
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+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
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+ vmmc-supply = <&tflash_vdd>;
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+ vqmmc-supply = <&tf_io>;
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+};
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+
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+/* eMMC */
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+&sd_emmc_c {
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+ status = "okay";
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+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-1 = <&emmc_clk_gate_pins>;
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+ pinctrl-names = "default", "clk-gate";
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+
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ mmc-ddr-1_8v;
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+ mmc-hs200-1_8v;
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+ max-frequency = <200000000>;
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+ disable-wp;
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+
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+ mmc-pwrseq = <&emmc_pwrseq>;
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+ vmmc-supply = <&vcc_3v3>;
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+ vqmmc-supply = <&flash_1v8>;
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+};
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+
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+&uart_AO {
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+ status = "okay";
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+ pinctrl-0 = <&uart_ao_a_pins>;
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+ pinctrl-names = "default";
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+};
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+
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+&usb {
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+ status = "okay";
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+ vbus-supply = <&usb_pwr_en>;
|
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+};
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+
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+&usb2_phy0 {
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||||
+ phy-supply = <&vcc_5v>;
|
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+};
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||||
+
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+&usb2_phy1 {
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+ /* Enable the hub which is connected to this port */
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+ phy-supply = <&hub_5v>;
|
||||
+};
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--
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2.22.0
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@ -1,238 +0,0 @@
|
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From 9af545e2824df54e8cef7f3a62d96c37360cb0a0 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 24 Apr 2020 03:09:12 +0000
|
||||
Subject: [PATCH 2/3] boards: amlogic: add Odroid C4 support
|
||||
|
||||
Odroid C4 is an SM1 device, the board config is adapted from VIM3L and
|
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README is based on the README.odroid-n2 from the same vendor.
|
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|
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Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
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---
|
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board/amlogic/w400/MAINTAINERS | 1 +
|
||||
board/amlogic/w400/README.odroid-c4 | 134 ++++++++++++++++++++++++++++
|
||||
configs/odroid-c4_defconfig | 62 +++++++++++++
|
||||
3 files changed, 197 insertions(+)
|
||||
create mode 100644 board/amlogic/w400/README.odroid-c4
|
||||
create mode 100644 configs/odroid-c4_defconfig
|
||||
|
||||
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
|
||||
index 2ff90039..b28dd7f0 100644
|
||||
--- a/board/amlogic/w400/MAINTAINERS
|
||||
+++ b/board/amlogic/w400/MAINTAINERS
|
||||
@@ -6,3 +6,4 @@ F: board/amlogic/w400/
|
||||
F: configs/khadas-vim3_defconfig
|
||||
F: configs/khadas-vim3l_defconfig
|
||||
F: configs/odroid-n2_defconfig
|
||||
+F: configs/odroid-c4_defconfig
|
||||
diff --git a/board/amlogic/w400/README.odroid-c4 b/board/amlogic/w400/README.odroid-c4
|
||||
new file mode 100644
|
||||
index 00000000..b1bca758
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/README.odroid-c4
|
||||
@@ -0,0 +1,134 @@
|
||||
+U-Boot for ODROID-C4
|
||||
+====================
|
||||
+
|
||||
+ODROID-N2 is a single board computer manufactured by Hardkernel
|
||||
+Co. Ltd with the following specifications:
|
||||
+
|
||||
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
|
||||
+ - 2GB or 4GB LPDDR4 SDRAM
|
||||
+ - Gigabit Ethernet
|
||||
+ - HDMI 2.1 display
|
||||
+ - 40-pin GPIO header
|
||||
+ - 7-pin GPIO expansion header
|
||||
+ - 4x USB 3.0 Host
|
||||
+ - 1x USB 2.0 Host/OTG (micro)
|
||||
+ - eMMC, microSD
|
||||
+ - UART serial
|
||||
+ - Infrared receiver
|
||||
+
|
||||
+Schematics are available on the manufacturer website.
|
||||
+
|
||||
+Currently the U-Boot port supports the following devices:
|
||||
+ - serial
|
||||
+ - eMMC, microSD
|
||||
+ - Ethernet
|
||||
+ - I2C
|
||||
+ - Regulators
|
||||
+ - Reset controller
|
||||
+ - Clock controller
|
||||
+ - ADC
|
||||
+
|
||||
+u-boot compilation
|
||||
+==================
|
||||
+
|
||||
+ > export ARCH=arm
|
||||
+ > export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ > make odroid-c4_defconfig
|
||||
+ > make
|
||||
+
|
||||
+Image creation
|
||||
+==============
|
||||
+
|
||||
+Amlogic doesn't provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image, so it is necessary to obtain them from
|
||||
+the git tree published by the board vendor:
|
||||
+
|
||||
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > wget https://releases.linaro.org/archive/14.04/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz
|
||||
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > tar xvf gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz
|
||||
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2014.04_linux/bin:$PATH
|
||||
+
|
||||
+ > DIR=odroidc4-u-boot
|
||||
+ > git clone --depth 1 \
|
||||
+ https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 \
|
||||
+ $DIR
|
||||
+
|
||||
+ > cd odroidc4-u-boot
|
||||
+ > make odroidc4_defconfig
|
||||
+ > make
|
||||
+ > export UBOOTDIR=$PWD
|
||||
+
|
||||
+ Go back to mainline U-Boot source tree then :
|
||||
+ > mkdir fip
|
||||
+
|
||||
+ > cp $UBOOTDIR/build/scp_task/bl301.bin fip/
|
||||
+ > cp $UBOOTDIR/build/board/hardkernel/odroidc4/firmware/acs.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/bl2.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/bl30.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/bl31.img fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/piei.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
|
||||
+ > cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl2.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/acs.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
|
||||
+ --output fip/bl30_new.bin.g12a.enc \
|
||||
+ --level v3
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
|
||||
+ --output fip/bl30_new.bin.enc \
|
||||
+ --level v3 --type bl30
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
|
||||
+ --output fip/bl31.img.enc \
|
||||
+ --level v3 --type bl31
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
|
||||
+ --output fip/bl33.bin.enc \
|
||||
+ --level v3 --type bl33 --compress lz4
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
|
||||
+ --output fip/bl2.n.bin.sig
|
||||
+ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc \
|
||||
+ --ddrfw1 fip/ddr4_1d.fw \
|
||||
+ --ddrfw2 fip/ddr4_2d.fw \
|
||||
+ --ddrfw3 fip/ddr3_1d.fw \
|
||||
+ --ddrfw4 fip/piei.fw \
|
||||
+ --ddrfw5 fip/lpddr4_1d.fw \
|
||||
+ --ddrfw6 fip/lpddr4_2d.fw \
|
||||
+ --ddrfw7 fip/diag_lpddr4.fw \
|
||||
+ --ddrfw8 fip/aml_ddr.fw \
|
||||
+ --ddrfw9 fip/lpddr3_1d.fw \
|
||||
+ --level v3
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+ > DEV=/dev/your_sd_device
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig
|
||||
new file mode 100644
|
||||
index 00000000..ab7d588e
|
||||
--- /dev/null
|
||||
+++ b/configs/odroid-c4_defconfig
|
||||
@@ -0,0 +1,62 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SYS_BOARD="w400"
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_MESON_G12A=y
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" odroid-c4"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4"
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_MESON_G12A_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_G12A=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_MESON=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.22.0
|
||||
|
||||
@ -1,26 +0,0 @@
|
||||
From 64017a2cc9e501329016d50b701c5e9a9488991d Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 2 Sep 2019 15:42:04 +0200
|
||||
Subject: [PATCH 3/3] HACK: mmc: meson-gx: limit to 24MHz
|
||||
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
---
|
||||
drivers/mmc/meson_gx_mmc.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
|
||||
index b5f5122b..00bfa324 100644
|
||||
--- a/drivers/mmc/meson_gx_mmc.c
|
||||
+++ b/drivers/mmc/meson_gx_mmc.c
|
||||
@@ -252,7 +252,7 @@ static int meson_mmc_probe(struct udevice *dev)
|
||||
cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
|
||||
MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||
cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
|
||||
- cfg->f_max = 100000000; /* 100 MHz */
|
||||
+ cfg->f_max = SD_EMMC_CLKSRC_24M;
|
||||
cfg->b_max = 511; /* max 512 - 1 blocks */
|
||||
cfg->name = dev->name;
|
||||
|
||||
--
|
||||
2.22.0
|
||||
|
||||
@ -1,54 +0,0 @@
|
||||
From f40f83d023b2e1dd82e751aee35c1f0d386b8b4f Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Sat, 1 Feb 2020 20:55:39 +0000
|
||||
Subject: [PATCH 1/3] Amlogic w400: read ethaddr from efuse
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
board/amlogic/w400/w400.c | 27 ++++++++++++++++++++++++---
|
||||
1 file changed, 24 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
|
||||
index 47a51710dc..d74aab899a 100644
|
||||
--- a/board/amlogic/w400/w400.c
|
||||
+++ b/board/amlogic/w400/w400.c
|
||||
@@ -6,13 +6,36 @@
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
-#include <env_internal.h>
|
||||
+#include <env.h>
|
||||
#include <asm/io.h>
|
||||
+#include <asm/arch/sm.h>
|
||||
#include <asm/arch/eth.h>
|
||||
|
||||
+#define EFUSE_MAC_OFFSET 20
|
||||
+#define EFUSE_MAC_SIZE 12
|
||||
+
|
||||
int misc_init_r(void)
|
||||
{
|
||||
+ u8 mac_addr[6];
|
||||
+ char efuse_mac_addr[EFUSE_MAC_SIZE], buff[3];
|
||||
+ ssize_t len;
|
||||
+
|
||||
meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
|
||||
|
||||
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
+ efuse_mac_addr, EFUSE_MAC_SIZE);
|
||||
+ if (len != EFUSE_MAC_SIZE)
|
||||
+ return 0;
|
||||
+
|
||||
+ for (int i = 0; i < 6; i++){
|
||||
+ buff[0] = efuse_mac_addr[i * 2];
|
||||
+ buff[1] = efuse_mac_addr[i * 2 + 1];
|
||||
+ mac_addr[i] = simple_strtoul(buff, NULL, 16);
|
||||
+ }
|
||||
+ if(is_valid_ethaddr(mac_addr))
|
||||
+ eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -12,9 +12,9 @@ index f1e5cdba..221923c1 100644
|
||||
compatible = "simple-bus";
|
||||
reg = <0x0 0xc1100000 0x0 0x100000>;
|
||||
@@ -505,6 +507,7 @@
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
amlogic,canvas = <&canvas>;
|
||||
+ u-boot,dm-spl;
|
||||
|
||||
/* CVBS VDAC output port */
|
||||
@ -56,27 +56,3 @@ index a23252ef..c92b67a6 100644
|
||||
};
|
||||
};
|
||||
|
||||
@@ -118,8 +120,8 @@
|
||||
vddio_boot: regulator-vddio_boot {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDDIO_BOOT";
|
||||
- regulator-min-microvolt = <3300000>;
|
||||
- regulator-max-microvolt = <3300000>;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -254,9 +256,9 @@
|
||||
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
- mmc-ddr-3_3v;
|
||||
- max-frequency = <50000000>;
|
||||
- non-removable;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ max-frequency = <200000000>;
|
||||
disable-wp;
|
||||
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user