meson-6.7: Copy patches from 6.6 (#6341)
* meson-6.7: Copy patches from 6.6
Commit f852beca0a ("Switch meson64, bcm2711, sunxi, imx6, mvebu current to 6.6, edge to 6.7 and leave 6.1 for legecy") bump to linux 6.7 but forget to copy patches.
* meson-6.7: Refresh patches
This commit is contained in:
hzyitc
GitHub
parent
c2fe587716
commit
e8cbdf6682
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,27 @@
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From d11b44bf44111b9f1d5497e92826df46ff065dbd Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Sat, 18 Nov 2023 01:22:03 +0800
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Subject: [PATCH 2/3] meson8/meson8b/meson8m2: drm: Forcefully enable XRGB
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format
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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drivers/gpu/drm/meson/meson_plane.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
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index 27e39577..027b2fe7 100644
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--- a/drivers/gpu/drm/meson/meson_plane.c
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+++ b/drivers/gpu/drm/meson/meson_plane.c
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@@ -483,6 +483,8 @@ static const struct drm_plane_funcs meson_plane_funcs = {
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static const uint32_t supported_drm_formats_m8[] = {
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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+ DRM_FORMAT_XRGB8888,
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+ DRM_FORMAT_XBGR8888,
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DRM_FORMAT_RGB888,
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DRM_FORMAT_RGB565,
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};
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--
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2.34.1
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@ -0,0 +1,26 @@
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From 99a889c050d71d663aba1ba2a706348be72ca787 Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Fri, 17 Nov 2023 22:54:18 +0800
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Subject: [PATCH 3/3] drm/meson: Support meson{8,8b}-hdmi-tx components
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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drivers/gpu/drm/meson/meson_drv.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
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index e8134e4c..c3e8fef9 100644
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--- a/drivers/gpu/drm/meson/meson_drv.c
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+++ b/drivers/gpu/drm/meson/meson_drv.c
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@@ -668,6 +668,8 @@ static void meson_drv_shutdown(struct platform_device *pdev)
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* private structure for HHI registers.
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*/
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static const struct of_device_id components_dev_match[] = {
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+ { .compatible = "amlogic,meson8-hdmi-tx" },
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+ { .compatible = "amlogic,meson8b-hdmi-tx" },
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{ .compatible = "amlogic,meson-gxbb-dw-hdmi" },
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{ .compatible = "amlogic,meson-gxl-dw-hdmi" },
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{ .compatible = "amlogic,meson-gxm-dw-hdmi" },
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--
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2.34.1
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@ -0,0 +1,77 @@
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From b2a6218e25682158d6c7d6029505e60577fd4562 Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Sat, 18 Nov 2023 01:22:04 +0800
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Subject: [PATCH] Revert "mmc: core: Set HS clock speed before sending HS
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CMD13"
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This reverts commit 4bc31edebde51fcf8ad0794763b8679a7ecb5ec0.
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---
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drivers/mmc/core/mmc.c | 23 ++++-------------------
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1 file changed, 4 insertions(+), 19 deletions(-)
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diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
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index 705942ed..8652fa28 100644
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--- a/drivers/mmc/core/mmc.c
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+++ b/drivers/mmc/core/mmc.c
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@@ -1390,17 +1390,13 @@ static int mmc_select_hs400es(struct mmc_card *card)
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goto out_err;
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}
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- /*
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- * Bump to HS timing and frequency. Some cards don't handle
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- * SEND_STATUS reliably at the initial frequency.
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- */
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mmc_set_timing(host, MMC_TIMING_MMC_HS);
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- mmc_set_bus_speed(card);
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-
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err = mmc_switch_status(card, true);
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if (err)
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goto out_err;
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+ mmc_set_clock(host, card->ext_csd.hs_max_dtr);
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+
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/* Switch card to DDR with strobe bit */
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val = EXT_CSD_DDR_BUS_WIDTH_8 | EXT_CSD_BUS_WIDTH_STROBE;
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err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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@@ -1458,7 +1454,7 @@ static int mmc_select_hs400es(struct mmc_card *card)
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static int mmc_select_hs200(struct mmc_card *card)
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{
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struct mmc_host *host = card->host;
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- unsigned int old_timing, old_signal_voltage, old_clock;
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+ unsigned int old_timing, old_signal_voltage;
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int err = -EINVAL;
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u8 val;
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@@ -1489,17 +1485,8 @@ static int mmc_select_hs200(struct mmc_card *card)
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false, true, MMC_CMD_RETRIES);
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if (err)
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goto err;
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-
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- /*
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- * Bump to HS timing and frequency. Some cards don't handle
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- * SEND_STATUS reliably at the initial frequency.
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- * NB: We can't move to full (HS200) speeds until after we've
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- * successfully switched over.
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- */
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old_timing = host->ios.timing;
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- old_clock = host->ios.clock;
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mmc_set_timing(host, MMC_TIMING_MMC_HS200);
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- mmc_set_clock(card->host, card->ext_csd.hs_max_dtr);
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/*
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* For HS200, CRC errors are not a reliable way to know the
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@@ -1512,10 +1499,8 @@ static int mmc_select_hs200(struct mmc_card *card)
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* mmc_select_timing() assumes timing has not changed if
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* it is a switch error.
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*/
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- if (err == -EBADMSG) {
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- mmc_set_clock(host, old_clock);
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+ if (err == -EBADMSG)
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mmc_set_timing(host, old_timing);
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- }
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}
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err:
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if (err) {
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--
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2.34.1
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@ -0,0 +1,39 @@
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From 6b1a414f7bb456817cd3cb385e9f5eb9e0d9cbe7 Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Sat, 18 Nov 2023 01:22:04 +0800
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Subject: [PATCH] Revert "pwm: meson: modify and simplify calculation in
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meson_pwm_get_state"
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This reverts commit 6b9352f3f8a1a35faf0efc1ad1807ee303467796.
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---
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drivers/pwm/pwm-meson.c | 14 ++++++++++++--
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1 file changed, 12 insertions(+), 2 deletions(-)
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diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
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index 5bea5324..a7c9b555 100644
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--- a/drivers/pwm/pwm-meson.c
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+++ b/drivers/pwm/pwm-meson.c
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@@ -322,8 +322,18 @@ static int meson_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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channel->lo = FIELD_GET(PWM_LOW_MASK, value);
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channel->hi = FIELD_GET(PWM_HIGH_MASK, value);
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- state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->lo + channel->hi);
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- state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
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+ if (channel->lo == 0) {
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+ state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
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+ state->duty_cycle = state->period;
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+ } else if (channel->lo >= channel->hi) {
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+ state->period = meson_pwm_cnt_to_ns(chip, pwm,
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+ channel->lo + channel->hi);
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+ state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm,
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+ channel->hi);
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+ } else {
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+ state->period = 0;
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+ state->duty_cycle = 0;
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+ }
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state->polarity = PWM_POLARITY_NORMAL;
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--
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2.34.1
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107
patch/kernel/archive/meson-6.7/odroidc1-dts-Enable-HDMI.patch
Normal file
107
patch/kernel/archive/meson-6.7/odroidc1-dts-Enable-HDMI.patch
Normal file
@ -0,0 +1,107 @@
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From e9d0d7bb75ff8234d717fb640c020ffe303a8d11 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Fri, 20 Mar 2020 15:17:51 +0100
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Subject: [PATCH] ARM: dts: meson8b: odroid-c1: enable HDMI for the
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Odroid-C1 - WiP
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WiP
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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.../arm/boot/dts/amlogic/meson8b-odroidc1.dts | 59 +++++++++++++++++++
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1 file changed, 59 insertions(+)
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diff --git a/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts b/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
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index 94168284..7e43212e 100644
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--- a/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
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+++ b/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
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@@ -32,6 +32,17 @@ emmc_pwrseq: emmc-pwrseq {
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reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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};
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+ hdmi-connector {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_connector_in: endpoint {
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+ remote-endpoint = <&hdmi_tx_tmds_out>;
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+ };
|
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+ };
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+ };
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+
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leds {
|
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compatible = "gpio-leds";
|
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led-blue {
|
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@@ -93,6 +104,38 @@ rtc32k_xtal: rtc32k-xtal-clk {
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#clock-cells = <0>;
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};
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+ sound {
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+ compatible = "amlogic,gx-sound-card";
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+ model = "ODROID-C1";
|
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+
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+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
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+ <&clkc CLKID_MPLL1>;
|
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+ assigned-clock-rates = <294912000>,
|
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+ <270950400>;
|
||||
+
|
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+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
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+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
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+ };
|
||||
+ };
|
||||
+
|
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+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx 0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
vcc_1v8: regulator-vcc-1v8 {
|
||||
/*
|
||||
* RICHTEK RT9179 configured for a fixed output voltage of
|
||||
@@ -187,6 +230,10 @@ vdd_rtc: regulator-vdd-rtc {
|
||||
};
|
||||
};
|
||||
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cpu0 {
|
||||
cpu-supply = <&vcck>;
|
||||
};
|
||||
@@ -283,6 +330,18 @@ &gpio_ao {
|
||||
"SYS_LED", "", "";
|
||||
};
|
||||
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&ir_receiver {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ir_recv_pins>;
|
||||
--
|
||||
2.34.1
|
||||
|
||||
441
patch/kernel/archive/meson-6.7/onecloud-0001-add-dts.patch
Normal file
441
patch/kernel/archive/meson-6.7/onecloud-0001-add-dts.patch
Normal file
@ -0,0 +1,441 @@
|
||||
From 5271ca000048ca86ac8f2e81ebcb1e2a0993cd73 Mon Sep 17 00:00:00 2001
|
||||
From: hzy <hzyitc@outlook.com>
|
||||
Date: Sat, 1 Apr 2023 13:24:42 +0800
|
||||
Subject: [PATCH 1/2] ARM: dts: meson8b: Add DTS for Xunlei Onecloud
|
||||
|
||||
Signed-off-by: hzy <hzyitc@outlook.com>
|
||||
---
|
||||
arch/arm/boot/dts/amlogic/Makefile | 1 +
|
||||
.../arm/boot/dts/amlogic/meson8b-onecloud.dts | 410 ++++++++++++++++++
|
||||
2 files changed, 411 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
|
||||
diff --git a/arch/arm/boot/dts/amlogic/Makefile b/arch/arm/boot/dts/amlogic/Makefile
|
||||
index a8431078..4ef5d491 100644
|
||||
--- a/arch/arm/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm/boot/dts/amlogic/Makefile
|
||||
@@ -6,4 +6,5 @@ dtb-$(CONFIG_MACH_MESON8) += \
|
||||
meson8b-ec100.dtb \
|
||||
meson8b-mxq.dtb \
|
||||
meson8b-odroidc1.dtb \
|
||||
+ meson8b-onecloud.dtb \
|
||||
meson8m2-mxiii-plus.dtb
|
||||
diff --git a/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts b/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
new file mode 100644
|
||||
index 00000000..1fa5420f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
@@ -0,0 +1,410 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * Author: hzy <hzyitc@outlook.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson8b.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "Xunlei OneCloud";
|
||||
+ compatible = "xunlei,onecloud", "amlogic,meson8b";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ mmc0 = &sd_card_slot;
|
||||
+ mmc1 = &sdhc;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x40000000 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ button {
|
||||
+ // compatible = "gpio-keys-polled";
|
||||
+ // poll-interval = <100>;
|
||||
+
|
||||
+ compatible = "gpio-keys";
|
||||
+
|
||||
+ autorepeat;
|
||||
+
|
||||
+ reset-button {
|
||||
+ label = "reset";
|
||||
+ linux,code = <BTN_0>;
|
||||
+
|
||||
+ // gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>; // GPIOAO 5
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ red {
|
||||
+ label = "onecloud:red:alive";
|
||||
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
|
||||
+
|
||||
+ default-state = "on";
|
||||
+ linux,default-trigger = "default-on";
|
||||
+ };
|
||||
+
|
||||
+ green {
|
||||
+ label = "onecloud:green:alive";
|
||||
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
|
||||
+
|
||||
+ default-state = "off";
|
||||
+ linux,default-trigger = "mmc1";
|
||||
+ };
|
||||
+
|
||||
+ blue {
|
||||
+ label = "onecloud:blue:alive";
|
||||
+ gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
|
||||
+
|
||||
+ default-state = "off";
|
||||
+ linux,default-trigger = "usb-host";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ p12v: regulator-p12v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "P12V";
|
||||
+ regulator-min-microvolt = <12000000>;
|
||||
+ regulator-max-microvolt = <12000000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_5v: regulator-vcc-5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "VCC5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ vin-supply = <&p12v>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc-3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "VCC3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ vin-supply = <&p12v>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: regulator-vcc-1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "VCC1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ vin-supply = <&p12v>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: regulator-vcc-ddr {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "VCC_DDR";
|
||||
+ regulator-min-microvolt = <1500000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+
|
||||
+ vin-supply = <&vcc_3v3>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_core: regulator-vcc-core {
|
||||
+ compatible = "pwm-regulator";
|
||||
+
|
||||
+ regulator-name = "VCC_CORE";
|
||||
+
|
||||
+ // +---------------------------------------------------+
|
||||
+ // | The actual mapping in phyical |
|
||||
+ // +------+--------+--------+--------+--------+--------+
|
||||
+ // | | 100% | 60% | 30% | 10% | 0% |
|
||||
+ // +------+--------+--------+--------+--------+--------+
|
||||
+ // | V1.0 | 677mV | 857mV | 992mV | 1082mV | 1127mV |
|
||||
+ // | V1.3 | 1116mV | 1121mV | 1125mV | 1128mV | 1129mV |
|
||||
+ // +------+--------+--------+--------+--------+--------+
|
||||
+ //
|
||||
+ // According to meson8b.dtsi, the CPU should be able to
|
||||
+ // run at 504MHz with 870mV. But this regulator supplies
|
||||
+ // not only CPU but also GPU. And according to the users'
|
||||
+ // tests on V1.0, we need such higher voltages.
|
||||
+
|
||||
+ pwms = <&pwm_cd 1 12001 0>; // PWM_D
|
||||
+ pwm-dutycycle-range = <10 0>;
|
||||
+ regulator-min-microvolt = <860000>;
|
||||
+ regulator-max-microvolt = <1140000>;
|
||||
+
|
||||
+ pwm-supply = <&p12v>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_cd {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>, <&xtal>;
|
||||
+ clock-names = "clkin0", "clkin1";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vcc_core>;
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vcc_1v8>;
|
||||
+};
|
||||
+
|
||||
+&mali {
|
||||
+ // commented to allow cpufreq tweaking
|
||||
+ // mali-supply = <&vcc_core>;
|
||||
+};
|
||||
+
|
||||
+&gpio {
|
||||
+ gpio-line-names =
|
||||
+ /* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
|
||||
+ /* 1 */ "WIFI_SDIO_D1 PIN19 (GPIOX_1)",
|
||||
+ /* 2 */ "WIFI_SDIO_D2 PIN14 (GPIOX_2)",
|
||||
+ /* 3 */ "WIFI_SDIO_D3 PIN15 (GPIOX_3)",
|
||||
+ /* 4 */ "WIFI_PCM_DIN PIN27 (GPIOX_4)",
|
||||
+ /* 5 */ "WIFI_PCM_DOUT PIN25 (GPIOX_5)",
|
||||
+ /* 6 */ "WIFI_PCM_SYNC PIN28 (GPIOX_6)",
|
||||
+ /* 7 */ "WIFI_PCM_CLK PIN26 (GPIOX_7)",
|
||||
+ /* 8 */ "WIFI_SDIO_CLK PIN17_Resistor (GPIOX_8)",
|
||||
+ /* 9 */ "WIFI_SDIO_CMD PIN16 (GPIOX_9)",
|
||||
+ /* 10 */ "GPIOX_10",
|
||||
+ /* 11 */ "WIFI PIN12 (GPIOX_11)",
|
||||
+ /* 12 */ "WIFI_UART_RX PIN43 (GPIOX_16)",
|
||||
+ /* 13 */ "WIFI_UART_TX PIN42 (GPIOX_17)",
|
||||
+ /* 14 */ "WIFI_UART_RTS PIN41_Resistor (GPIOX_18)",
|
||||
+ /* 15 */ "WIFI_UART_CTS PIN44 (GPIOX_19)",
|
||||
+ /* 16 */ "WIFI PIN34 (GPIOX_20)",
|
||||
+ /* 17 */ "WIFI_WAKE PIN13 (GPIOX_21)",
|
||||
+
|
||||
+ /* 18 */ "Resistor_TopOf_LED (GPIOY_0)",
|
||||
+ /* 19 */ "GPIOY_1",
|
||||
+ /* 20 */ "GPIOY_3",
|
||||
+ /* 21 */ "GPIOY_6",
|
||||
+ /* 22 */ "GPIOY_7",
|
||||
+ /* 23 */ "GPIOY_8",
|
||||
+ /* 24 */ "GPIOY_9",
|
||||
+ /* 25 */ "GPIOY_10",
|
||||
+ /* 26 */ "GPIOY_11",
|
||||
+ /* 27 */ "GPIOY_12",
|
||||
+ /* 28 */ "Left_BottomOf_CPU (GPIOY_13)",
|
||||
+ /* 29 */ "Right_BottomOf_CPU (GPIOY_14)",
|
||||
+
|
||||
+ /* 30 */ "GPIODV_9 (PWM_C)",
|
||||
+ /* 31 */ "GPIODV_24",
|
||||
+ /* 32 */ "GPIODV_25",
|
||||
+ /* 33 */ "GPIODV_26",
|
||||
+ /* 34 */ "GPIODV_27",
|
||||
+ /* 35 */ "VCC_CPU_PWM (GPIODV_28)",
|
||||
+ /* 36 */ "GPIODV_29",
|
||||
+
|
||||
+ /* 37 */ "HDMI_HPD (GPIOH_0)",
|
||||
+ /* 38 */ "HDMI_SDA (GPIOH_1)",
|
||||
+ /* 39 */ "HDMI_SCL (GPIOH_2)",
|
||||
+ /* 40 */ "ETH_PHY_INTR (GPIOH_3)",
|
||||
+ /* 41 */ "ETH_PHY_nRST (GPIOH_4)",
|
||||
+ /* 42 */ "ETH_TXD1 (GPIOH_5)",
|
||||
+ /* 43 */ "ETH_TXD0 (GPIOH_6)",
|
||||
+ /* 44 */ "ETH_TXD3 (GPIOH_7)",
|
||||
+ /* 45 */ "ETH_TXD2 (GPIOH_8)",
|
||||
+ /* 46 */ "ETH_TX_CLK (GPIOH_9)",
|
||||
+
|
||||
+ /* 47 */ "SDCARD_D1 (CARD_0)",
|
||||
+ /* 48 */ "SDCARD_D0 (CARD_1)",
|
||||
+ /* 49 */ "SDCARD_CLK (CARD_2)",
|
||||
+ /* 50 */ "SDCARD_CMD (CARD_3)",
|
||||
+ /* 51 */ "SDCARD_D3 (CARD_4)",
|
||||
+ /* 52 */ "SDCARD_D2 (CARD_5)",
|
||||
+ /* 53 */ "SDCARD_CD (CARD_6)",
|
||||
+
|
||||
+ /* 54 */ "EMMC_D0 (BOOT_0)",
|
||||
+ /* 55 */ "EMMC_D1 (BOOT_1)",
|
||||
+ /* 56 */ "EMMC_D2 (BOOT_2)",
|
||||
+ /* 57 */ "EMMC_D3 (BOOT_3)",
|
||||
+ /* 58 */ "EMMC_D4 (BOOT_4)",
|
||||
+ /* 59 */ "EMMC_D5 (BOOT_5)",
|
||||
+ /* 60 */ "EMMC_D6 (BOOT_6)",
|
||||
+ /* 61 */ "EMMC_D7 (BOOT_7)",
|
||||
+ /* 62 */ "EMMC_CLK (BOOT_8)",
|
||||
+ /* 63 */ "EMMC_nRST (BOOT_9)",
|
||||
+ /* 64 */ "EMMC_CMD (BOOT_10)",
|
||||
+ /* 65 */ "BOOT_11",
|
||||
+ /* 66 */ "BOOT_12",
|
||||
+ /* 67 */ "BOOT_13",
|
||||
+ /* 68 */ "BOOT_14",
|
||||
+ /* 69 */ "BOOT_15",
|
||||
+ /* 70 */ "BOOT_16",
|
||||
+ /* 71 */ "BOOT_17",
|
||||
+ /* 72 */ "BOOT_18",
|
||||
+
|
||||
+ /* 73 */ "ETH_RXD1 (DIF_0_P)",
|
||||
+ /* 74 */ "ETH_RXD0 (DIF_0_N)",
|
||||
+ /* 75 */ "ETH_RX_DV (DIF_1_P)",
|
||||
+ /* 76 */ "ETH_RX_CLK (DIF_1_N)",
|
||||
+ /* 77 */ "ETH_RXD3 (DIF_2_P)",
|
||||
+ /* 78 */ "ETH_RXD2 (DIF_2_N)",
|
||||
+ /* 79 */ "ETH_TX_EN (DIF_3_P)",
|
||||
+ /* 80 */ "ETH_REF_CLK (DIF_3_N)",
|
||||
+ /* 81 */ "ETH_MDC (DIF_4_P)",
|
||||
+ /* 82 */ "ETH_MDIO_EN (DIF_4_N)";
|
||||
+};
|
||||
+
|
||||
+&gpio_ao {
|
||||
+ gpio-line-names =
|
||||
+ /* 0 */ "UART TX (GPIOAO_0)",
|
||||
+ /* 1 */ "UART RX (GPIOAO_1)",
|
||||
+ /* 2 */ "RED_LED (GPIOAO_2)",
|
||||
+ /* 3 */ "GREEN_LED (GPIOAO_3)",
|
||||
+ /* 4 */ "BLUE_LED (GPIOAO_4)",
|
||||
+ /* 5 */ "BUTTON (GPIOAO_5)",
|
||||
+ /* 6 */ "GPIOAO_6",
|
||||
+ /* 7 */ "IR_IN (GPIOAO_7)",
|
||||
+ /* 8 */ "GPIOAO_8",
|
||||
+ /* 9 */ "GPIOAO_9",
|
||||
+ /* 10 */ "GPIOAO_10",
|
||||
+ /* 11 */ "GPIOAO_11",
|
||||
+ /* 12 */ "GPIOAO_12",
|
||||
+ /* 13 */ "GPIOAO_13",
|
||||
+
|
||||
+ /* 14 */ "GPIO_BSD_EN",
|
||||
+ /* 15 */ "GPIO_TEST_N";
|
||||
+};
|
||||
+
|
||||
+// eMMC
|
||||
+&sdhc {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pinctrl-0 = <&sdxc_c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ non-removable;
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ // vqmmc-supply = <&vcc_3v3>;
|
||||
+};
|
||||
+
|
||||
+&sdio {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pinctrl-0 = <&sd_b_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ // SD card
|
||||
+ sd_card_slot: slot@1 {
|
||||
+ compatible = "mmc-slot";
|
||||
+ reg = <1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ no-sdio;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ // vqmmc-supply = <&vcc_3v3>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pinctrl-0 = <ð_rgmii_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ phy-handle = <ð_phy>;
|
||||
+ phy-mode = "rgmii-rxid";
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ // Realtek RTL8211F (0x001cc916)
|
||||
+ eth_phy: ethernet-phy@0 {
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <80000>;
|
||||
+ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>; // GPIOH 3
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb0 {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "otg";
|
||||
+ usb-role-switch;
|
||||
+ role-switch-default-mode = "host";
|
||||
+};
|
||||
+
|
||||
+&usb0_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ir_receiver {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&ir_recv_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -0,0 +1,96 @@
|
||||
From 40100240a3702be8f8ceb88ec6643af669bd6de8 Mon Sep 17 00:00:00 2001
|
||||
From: hzy <hzyitc@outlook.com>
|
||||
Date: Sat, 1 Apr 2023 10:26:14 +0800
|
||||
Subject: [PATCH 2/2] ARM: dts: meson8b: onecloud: Support HDMI
|
||||
|
||||
Signed-off-by: hzy <hzyitc@outlook.com>
|
||||
---
|
||||
.../arm/boot/dts/amlogic/meson8b-onecloud.dts | 58 +++++++++++++++++++
|
||||
1 file changed, 58 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts b/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
index 1fa5420f..6ed19522 100644
|
||||
--- a/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
+++ b/arch/arm/boot/dts/amlogic/meson8b-onecloud.dts
|
||||
@@ -80,6 +80,48 @@ blue {
|
||||
};
|
||||
};
|
||||
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx 0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
p12v: regulator-p12v {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
@@ -199,6 +241,10 @@ &mali {
|
||||
// mali-supply = <&vcc_core>;
|
||||
};
|
||||
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&gpio {
|
||||
gpio-line-names =
|
||||
/* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
|
||||
@@ -403,6 +449,18 @@ &usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&ir_receiver {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ir_recv_pins>;
|
||||
--
|
||||
2.34.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user