Allwinner: Bump u-boot to 2023.04

2023-06-24 21:48:10 +05:30 · 2023-06-24 21:48:10 +05:30 · e4f9f637a6
commit e4f9f637a6
parent 9525b2d16c
8 changed files with 83 additions and 685 deletions
--- a/config/sources/families/include/sunxi64_common.inc
+++ b/config/sources/families/include/sunxi64_common.inc
@ -11,7 +11,7 @@ declare -g ARCH=arm64
 declare -g ATF_TARGET_MAP="PLAT=$ATF_PLAT DEBUG=1 bl31;;build/$ATF_PLAT/debug/bl31.bin"
 declare -g BOOTDELAY=1
 declare -g BOOTPATCHDIR="${BOOTPATCHDIR:-"u-boot-sunxi"}"
-declare -g BOOTBRANCH="${BOOTBRANCH:-"tag:v2023.01"}"
+declare -g BOOTBRANCH="${BOOTBRANCH:-"tag:v2023.04"}"
 declare -g BOOTENV_FILE='sunxi.txt'
 UBOOT_TARGET_MAP="${UBOOT_TARGET_MAP:-BINMAN_ALLOW_MISSING=1;;u-boot-sunxi-with-spl.bin}"
 declare -g BOOTSCRIPT='boot-sun50i-next.cmd:boot.cmd'
--- a/config/sources/families/include/sunxi_common.inc
+++ b/config/sources/families/include/sunxi_common.inc
@ -10,7 +10,7 @@ enable_extension "sunxi-tools"
 declare -g ARCH=armhf
 declare -g BOOTDELAY=1
 declare -g BOOTPATCHDIR="${BOOTPATCHDIR:-"u-boot-sunxi"}"
-declare -g BOOTBRANCH="${BOOTBRANCH:-"tag:v2023.01"}"
+declare -g BOOTBRANCH="${BOOTBRANCH:-"tag:v2023.04"}"
 UBOOT_TARGET_MAP="${UBOOT_TARGET_MAP:-;;u-boot-sunxi-with-spl.bin}"
 declare -g BOOTSCRIPT="boot-sunxi.cmd:boot.cmd"
 declare -g BOOTENV_FILE='sunxi.txt'
--- a/patch/u-boot/u-boot-sunxi-crust/h3-scp.patch
+++ b/patch/u-boot/u-boot-sunxi-crust/h3-scp.patch
@ -1,7 +1,7 @@
-From 470356d816b305448b14eb6f09fcaccc248ca598 Mon Sep 17 00:00:00 2001
+From 07b6f327566f198ac5a138abab600c9601e6caec Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 10:40:45 -0500
-Subject: [PATCH 01/11] Kconfig: Remove an impossible condition
+Subject: [PATCH 01/10] Kconfig: Remove an impossible condition

 ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI"
 is impossible to satisfy.
@ -12,65 +12,26 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/Kconfig b/Kconfig
-index 0cdc9658f7..e367a28c69 100644
+index b8f65589f4..4206d0de62 100644
 --- a/Kconfig
 +++ b/Kconfig
-@@ -459,7 +459,7 @@ config BUILD_TARGET
- 	default "u-boot-with-spl.kwb" if ARCH_MVEBU && SPL
+@@ -432,7 +432,7 @@ config BUILD_TARGET
+ 	default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL
 	default "u-boot-elf.srec" if RCAR_GEN3
 	default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
 -				ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
 +				RISCV || ARCH_ZYNQMP)
- 	default "u-boot.kwb" if ARCH_KIRKWOOD
+ 	default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL
+ 	default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
 	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
- 	default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
 -- 
 2.34.1


-From 0d2371ac7e031ccb866916e1a053a667b40fee8e Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 9 Oct 2021 10:43:56 -0500
-Subject: [PATCH 02/11] binman: Prevent entries in a section from overlapping
-
-Currently, if the "offset" property is given for an entry, the section's
-running offset is completely ignored. This causes entries to overlap if
-the provided offset is less than the size of the entries earlier in the
-section. Avoid the overlap by only using the provided offset when it is
-greater than the running offset.
-
-The motivation for this change is the rule used by SPL to find U-Boot on
-sunxi boards: U-Boot starts 32 KiB after the start of SPL, unless SPL is
-larger than 32 KiB, in which case U-Boot immediately follows SPL.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
---
- tools/binman/entry.py | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/tools/binman/entry.py b/tools/binman/entry.py
-index 1be31a05e0..33d1dfeb7b 100644
--- a/tools/binman/entry.py
-+++ b/tools/binman/entry.py
-@@ -483,7 +483,9 @@ class Entry(object):
-             if self.offset_unset:
-                 self.Raise('No offset set with offset-unset: should another '
-                            'entry provide this correct offset?')
-            self.offset = tools.align(offset, self.align)
-+        elif self.offset > offset:
-+            offset = self.offset
-+        self.offset = tools.align(offset, self.align)
-         needed = self.pad_before + self.contents_size + self.pad_after
-         needed = tools.align(needed, self.align_size)
-         size = self.size
-- 
-2.34.1
-
-
-From 7ed6ed1bc3dd2a76ffe8cc19c8fec4c7c01bfaa6 Mon Sep 17 00:00:00 2001
+From b22eb354c12d309d16f0b26baa106df9af740f77 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 17 Apr 2021 13:33:54 -0500
-Subject: [PATCH 03/11] sunxi: binman: Enable SPL FIT loading for 32-bit SoCs
+Subject: [PATCH 02/10] sunxi: binman: Enable SPL FIT loading for 32-bit SoCs

 Now that Crust (SCP firmware) has support for H3, we need a FIT image to
 load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0
@ -110,10 +71,10 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 3 files changed, 35 insertions(+), 19 deletions(-)

 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index ff46730bfb..befb8edd20 100644
+index 1a41215ebf..472bee4213 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1137,6 +1137,7 @@ config ARCH_SUNXI
+@@ -1139,6 +1139,7 @@ config ARCH_SUNXI
 	imply SPL_GPIO
 	imply SPL_LIBCOMMON_SUPPORT
 	imply SPL_LIBGENERIC_SUPPORT
@ -122,7 +83,7 @@ index ff46730bfb..befb8edd20 100644
 	imply SPL_POWER
 	imply SPL_SERIAL
 diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
-index 2028d5b6a9..cfe8a6cf3a 100644
+index e959eb2a40..b4e5827ed4 100644
 --- a/arch/arm/dts/sunxi-u-boot.dtsi
 +++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -1,13 +1,19 @@
@ -152,7 +113,7 @@ index 2028d5b6a9..cfe8a6cf3a 100644
 #endif
 
 / {
-@@ -34,30 +40,33 @@
+@@ -32,30 +38,33 @@
 			filename = "spl/sunxi-spl.bin";
 		};
 
@ -191,7 +152,7 @@ index 2028d5b6a9..cfe8a6cf3a 100644
 					compression = "none";
 					load = <BL31_ADDR>;
 					entry = <BL31_ADDR>;
-@@ -67,6 +76,7 @@
+@@ -65,6 +74,7 @@
 						missing-msg = "atf-bl31-sunxi";
 					};
 				};
@ -199,7 +160,7 @@ index 2028d5b6a9..cfe8a6cf3a 100644
 
 #ifdef SCP_ADDR
 				scp {
-@@ -95,19 +105,23 @@
+@@ -93,19 +103,23 @@
 
 				@config-SEQ {
 					description = "NAME";
@ -228,7 +189,7 @@ index 2028d5b6a9..cfe8a6cf3a 100644
 #endif
 	};
 diff --git a/common/spl/Kconfig b/common/spl/Kconfig
-index d774c930a8..77e5b0e563 100644
+index 3c2af453ab..1d2ee3f0d0 100644
 --- a/common/spl/Kconfig
 +++ b/common/spl/Kconfig
@@ -76,7 +76,9 @@ config SPL_SIZE_LIMIT_PROVIDE_STACK
@ -250,7 +211,7 @@ index d774c930a8..77e5b0e563 100644
 	default 0x0 if ARCH_MTMIPS
 	default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
 	default SPL_MAX_SIZE
-@@ -575,8 +577,7 @@ config SPL_MD5
+@@ -576,8 +578,7 @@ config SPL_MD5
 config SPL_FIT_IMAGE_TINY
 	bool "Remove functionality from SPL FIT loading to reduce size"
 	depends on SPL_FIT
@ -264,10 +225,10 @@ index d774c930a8..77e5b0e563 100644
 2.34.1


-From e0f104e255525c54e22cfdd58415b6041d6096d8 Mon Sep 17 00:00:00 2001
+From 41b0c27f31bebfdbfc76780030ce7a93d4e20c40 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 22:00:22 -0500
-Subject: [PATCH 04/11] sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged
+Subject: [PATCH 03/10] sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged

 Do not try to send an SGI from CPU 0 to itself. Since FIQs are masked
 when entering monitor mode, this will hang. Plus, CPU 0 cannot fully
@ -321,10 +282,10 @@ index e1d3638b5c..738ea8f281 100644
 2.34.1


-From a7223def28f3a9d25f19f8d9f34824c88f671bfb Mon Sep 17 00:00:00 2001
+From da90512f5aba81b0fe84ab6316ad202d8e6de815 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 17:12:57 -0500
-Subject: [PATCH 05/11] sunxi: psci: Add support for H3 CPU 0 hotplug
+Subject: [PATCH 04/10] sunxi: psci: Add support for H3 CPU 0 hotplug

 Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
 written, resuming CPU 0 requires using the "Super Standby" code path in
@ -350,11 +311,11 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 4 files changed, 74 insertions(+), 1 deletion(-)

 diff --git a/Makefile b/Makefile
-index 9a8a7c4681..ab0b18d881 100644
+index af1408222d..4e69adbe97 100644
 --- a/Makefile
 +++ b/Makefile
-@@ -1013,6 +1013,23 @@ INPUTS-y += u-boot.img
- endif
+@@ -1011,6 +1011,23 @@ ifeq ($(CONFIG_ARCH_ROCKCHIP)_$(CONFIG_SPL_FRAMEWORK),y_)
+ INPUTS-y += u-boot.img
 endif
 
 +ifeq ($(CONFIG_MACH_SUN8I_H3)$(CONFIG_ARMV7_PSCI),yy)
@ -450,7 +411,7 @@ index 738ea8f281..e6bfd193e4 100644
 	setbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu));
 
 diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
-index cfe8a6cf3a..9cb9e85453 100644
+index b4e5827ed4..ac96eae9cc 100644
 --- a/arch/arm/dts/sunxi-u-boot.dtsi
 +++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -6,7 +6,11 @@
@ -466,7 +427,7 @@ index cfe8a6cf3a..9cb9e85453 100644
 #define BL31_ADDR	0x00044000
 #define SCP_ADDR	0x00050000
 #elif defined(CONFIG_MACH_SUN50I_H6)
-@@ -78,6 +82,20 @@
+@@ -76,6 +80,20 @@
 				};
 #endif
 
@ -487,7 +448,7 @@ index cfe8a6cf3a..9cb9e85453 100644
 #ifdef SCP_ADDR
 				scp {
 					description = "SCP firmware";
-@@ -111,6 +129,9 @@
+@@ -109,6 +127,9 @@
 					firmware = "uboot";
 #endif
 					loadables =
@ -516,10 +477,10 @@ index 608a055892..98e68e068b 100644
 2.34.1


-From 2e62fb5affdeea8364a97a35b1d925673e6ac1f2 Mon Sep 17 00:00:00 2001
+From 69a0fb1929ad5ee47e4dc84c05e9085a4e489356 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 14:58:27 -0500
-Subject: [PATCH 06/11] remoteproc: Add a driver for the Allwinner AR100
+Subject: [PATCH 05/10] remoteproc: Add a driver for the Allwinner AR100

 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
@ -682,10 +643,10 @@ index 0000000000..c94f6c752b
 2.34.1


-From b6372d0bedae59d11e7f2791940f0c1b146918df Mon Sep 17 00:00:00 2001
+From 0bce0723224ead36a2f7dea2471abd473ac92450 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 15:04:16 -0500
-Subject: [PATCH 07/11] arm: dts: sunxi: h3: Add nodes for AR100 remoteproc
+Subject: [PATCH 06/10] arm: dts: sunxi: h3: Add nodes for AR100 remoteproc

 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
@ -728,10 +689,10 @@ index eac2349a23..b88dcd4272 100644
 2.34.1


-From 51dd93e53d3ce8bcfb10f241a9e6911ed3ed692c Mon Sep 17 00:00:00 2001
+From 685af7c43558a7c25d3aeb0d750729c5753674a5 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 17 Apr 2021 13:33:54 -0500
-Subject: [PATCH 08/11] sunxi: Enable support for SCP firmware on H3
+Subject: [PATCH 07/10] sunxi: Enable support for SCP firmware on H3

 Now that issues with the BROM have been sorted out, we can implement
 PSCI system suspend on H3 by delegating to SCP firmware. Let's start by
@ -746,7 +707,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 3 files changed, 12 insertions(+)

 diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
-index 9cb9e85453..228b43c0c0 100644
+index ac96eae9cc..964556ec62 100644
 --- a/arch/arm/dts/sunxi-u-boot.dtsi
 +++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -9,6 +9,7 @@
@ -801,10 +762,10 @@ index 98e68e068b..506ce35707 100644
 2.34.1


-From 86585a0f23efa3b16caf44571a64686a7f0b67bc Mon Sep 17 00:00:00 2001
+From e67ab86b597fbc5388e86152fbc2c8de85797157 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 22:43:26 -0500
-Subject: [PATCH 09/11] arm: psci: Add definitions for PSCI v1.1
+Subject: [PATCH 08/10] arm: psci: Add definitions for PSCI v1.1

 Add the new option, function IDs, and prototypes for PSCI v1.1
 implementations. In the process, fix some issues with the existing
@ -815,11 +776,10 @@ definitions:
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
 arch/arm/cpu/armv7/Kconfig    |  3 +++
- arch/arm/cpu/armv8/fwcall.c   |  2 +-
- arch/arm/include/asm/psci.h   |  9 +++++++--
+ arch/arm/include/asm/psci.h   |  5 +++--
 arch/arm/include/asm/system.h | 14 +++++++++-----
 arch/arm/lib/psci-dt.c        |  2 ++
- 5 files changed, 22 insertions(+), 8 deletions(-)
+ 4 files changed, 17 insertions(+), 7 deletions(-)

 diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
 index f1e4e26b8f..c2d0491a37 100644
@ -835,27 +795,15 @@ index f1e4e26b8f..c2d0491a37 100644
 config ARMV7_PSCI_1_0
 	bool "PSCI V1.0"
 
-diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
-index 16914dc1ee..87de09979b 100644
--- a/arch/arm/cpu/armv8/fwcall.c
-+++ b/arch/arm/cpu/armv8/fwcall.c
-@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 reset_level, u32 cookie)
- {
- 	struct pt_regs regs;
- 
-	regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
-+	regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2;
- 	regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
- 	regs.regs[2] = cookie;
- 	if (use_smc_for_psci)
 diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
-index 67e9234066..aa351867ee 100644
+index 7343b941ef..27c2d15521 100644
 --- a/arch/arm/include/asm/psci.h
 +++ b/arch/arm/include/asm/psci.h
-@@ -22,8 +22,9 @@
+@@ -22,9 +22,9 @@
 #include <linux/bitops.h>
 #endif
 
+-#define ARM_PSCI_VER_1_1		(0x00010001)
 -#define ARM_PSCI_VER_1_0		(0x00010000)
 #define ARM_PSCI_VER_0_2		(0x00000002)
 +#define ARM_PSCI_VER_1_0		(0x00010000)
@ -863,26 +811,14 @@ index 67e9234066..aa351867ee 100644
 
 /* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE		0x95c1ba5e
-@@ -68,7 +69,6 @@
- #define ARM_PSCI_0_2_FN64_AFFINITY_INFO		ARM_PSCI_0_2_FN64(4)
- #define ARM_PSCI_0_2_FN64_MIGRATE		ARM_PSCI_0_2_FN64(5)
- #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN64(7)
-#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2		ARM_PSCI_0_2_FN64(18)
- 
- /* PSCI 1.0 interface */
- #define ARM_PSCI_1_0_FN_PSCI_FEATURES		ARM_PSCI_0_2_FN(10)
-@@ -86,6 +86,11 @@
- #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY	ARM_PSCI_0_2_FN64(16)
+@@ -87,6 +87,7 @@
 #define ARM_PSCI_1_0_FN64_STAT_COUNT		ARM_PSCI_0_2_FN64(17)
 
-+/* PSCI 1.1 interface */
+ /* PSCI 1.1 interface */
 +#define ARM_PSCI_1_1_FN_SYSTEM_RESET2		ARM_PSCI_0_2_FN(18)
-+
-+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2		ARM_PSCI_0_2_FN64(18)
-+
+ #define ARM_PSCI_1_1_FN64_SYSTEM_RESET2		ARM_PSCI_0_2_FN64(18)
+ 
 /* 1KB stack per core */
- #define ARM_PSCI_STACK_SHIFT	10
- #define ARM_PSCI_STACK_SIZE	(1 << ARM_PSCI_STACK_SHIFT)
 diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
 index 87d1c77e8b..bcbb999b49 100644
 --- a/arch/arm/include/asm/system.h
@ -930,10 +866,10 @@ index 903b335704..ea9d1c8355 100644
 2.34.1


-From 862da00823c5cbf38b8532c96e0a92768d0b607d Mon Sep 17 00:00:00 2001
+From 9e64a793231211717fcaf6e63fa600f98e5ae0cc Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 9 Oct 2021 23:01:05 -0500
-Subject: [PATCH 10/11] sunxi: psci: Delegate PSCI to SCPI
+Subject: [PATCH 09/10] sunxi: psci: Delegate PSCI to SCPI

 This adds a new PSCI implementation which communicates with SCP firmware
 running on the AR100 using the SCPI protocol. This allows it to support
@ -1438,10 +1374,10 @@ index 0000000000..cf85292a8f
 2.34.1


-From 5ea3ebb020321ecb542a353ba1106cca8871f83e Mon Sep 17 00:00:00 2001
+From 7abb8ce85969ddc24e5fc82e1042461d1acbb651 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Wed, 8 Jun 2022 07:55:54 -0500
-Subject: [PATCH 11/11] sunxi: Enable SCP/SCPI on A33 as well
+Subject: [PATCH 10/10] sunxi: Enable SCP/SCPI on A33 as well

 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
@ -1526,7 +1462,7 @@ index 06809c3a1f..c3d5a0d070 100644
 	};
 };
 diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
-index 228b43c0c0..ed99a74b1a 100644
+index 964556ec62..6f5c103148 100644
 --- a/arch/arm/dts/sunxi-u-boot.dtsi
 +++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -6,11 +6,11 @@
--- a/patch/u-boot/u-boot-sunxi/board_cubieboard/adjust-default-dram-clockspeeds.patch
+++ b/patch/u-boot/u-boot-sunxi/board_cubieboard/adjust-default-dram-clockspeeds.patch
@ -1,13 +1,13 @@
 diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
-index a8e9c988d5..9d892d6343 100644
+index 71743f7b8a..29e695d4a7 100644
 --- a/configs/Cubieboard_defconfig
 +++ b/configs/Cubieboard_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- CONFIG_ARCH_SUNXI=y
+@@ -3,7 +3,7 @@ CONFIG_ARCH_SUNXI=y
+ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
+ CONFIG_SPL=y
 CONFIG_MACH_SUN4I=y
 -CONFIG_DRAM_CLK=480
 +CONFIG_DRAM_CLK=432
- CONFIG_MMC0_CD_PIN="PH1"
 CONFIG_SATAPWR="PB8"
- CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
+ CONFIG_AHCI=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
--- a/patch/u-boot/u-boot-sunxi/board_cubieboard2/adjust-default-dram-clockspeeds.patch
+++ b/patch/u-boot/u-boot-sunxi/board_cubieboard2/adjust-default-dram-clockspeeds.patch
@ -1,13 +1,13 @@
 diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
-index 02c503f672..cf9c16351d 100644
+index 10314ab991..a1d8866d78 100644
 --- a/configs/Cubieboard2_defconfig
 +++ b/configs/Cubieboard2_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- CONFIG_ARCH_SUNXI=y
+@@ -3,7 +3,7 @@ CONFIG_ARCH_SUNXI=y
+ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
+ CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 -CONFIG_DRAM_CLK=480
 +CONFIG_DRAM_CLK=432
- CONFIG_MMC0_CD_PIN="PH1"
 CONFIG_SATAPWR="PB8"
- CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
+ CONFIG_AHCI=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
--- a/patch/u-boot/u-boot-sunxi/board_cubietruck/adjust-default-dram-clockspeeds.patch
+++ b/patch/u-boot/u-boot-sunxi/board_cubietruck/adjust-default-dram-clockspeeds.patch
@ -1,13 +1,13 @@
 diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
-index f9d56c8f9d..5d42b59e57 100644
+index 67f00ead13..12c21d0fb7 100644
 --- a/configs/Cubietruck_defconfig
 +++ b/configs/Cubietruck_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- CONFIG_ARCH_SUNXI=y
+@@ -3,7 +3,7 @@ CONFIG_ARCH_SUNXI=y
+ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
+ CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 -CONFIG_DRAM_CLK=432
 +CONFIG_DRAM_CLK=384
- CONFIG_MMC0_CD_PIN="PH1"
 CONFIG_USB0_VBUS_PIN="PH17"
 CONFIG_USB0_VBUS_DET="PH22"
+ CONFIG_USB0_ID_DET="PH19"
--- a/patch/u-boot/u-boot-sunxi/board_orangepizero2/orangepizero2_light_red_led_on.patch
+++ b/patch/u-boot/u-boot-sunxi/board_orangepizero2/orangepizero2_light_red_led_on.patch
@ -1,4 +1,4 @@
-From b32893e22426625fa0d32460a93d26b152a19849 Mon Sep 17 00:00:00 2001
+From b2750ef240a92a06d0531d4b7d3d4820c7c45ad2 Mon Sep 17 00:00:00 2001
 From: orangepi-xunlong <258384131@qq.com>
 Date: Mon, 18 Apr 2022 10:43:17 +0800
 Subject: [PATCH] sunxi: orangepizero2: light up red led
@ -10,10 +10,10 @@ Subject: [PATCH] sunxi: orangepizero2: light up red led
 3 files changed, 17 insertions(+), 1 deletion(-)

 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index 14c0f3b6a..0be3bd390 100644
+index 08cfc581cb..03743f03fb 100644
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -645,6 +645,13 @@ config MACPWR
+@@ -652,6 +652,13 @@ config MACPWR
 	  Set the pin used to power the MAC. This takes a string in the format
 	  understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 
@ -24,14 +24,14 @@ index 14c0f3b6a..0be3bd390 100644
 +          Set the pin used to power the led. This takes a string in the format
 +          understood by sunxi_name_to_gpio, e.g. PC12 for pin 1 of port H.
 +
- config MMC0_CD_PIN
- 	string "Card detect pin for mmc0"
- 	default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ config MMC1_PINS_PH
+ 	bool "Pins for mmc1 are on Port H"
+ 	depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
 diff --git a/board/sunxi/board.c b/board/sunxi/board.c
-index 31e08c3ba..c7df86695 100644
+index 3079ac0002..1dad128a85 100644
 --- a/board/sunxi/board.c
 +++ b/board/sunxi/board.c
-@@ -233,7 +233,7 @@ static void mmc_pinmux_setup(int sdc);
+@@ -187,7 +187,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 /* add board specific code here */
 int board_init(void)
 {
@ -40,7 +40,7 @@ index 31e08c3ba..c7df86695 100644
 
 	gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
 
-@@ -293,6 +293,14 @@ int board_init(void)
+@@ -247,6 +247,14 @@ int board_init(void)
 		}
 	}
 
@ -56,11 +56,14 @@ index 31e08c3ba..c7df86695 100644
 	/*
 	 * The bit[16] of register reg[0x03000000] must be zero for the THS
 diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
-index 5334ff7bc..02ac272be 100644
+index 72fc419ca7..63e6ec9f46 100644
 --- a/configs/orangepi_zero2_defconfig
 +++ b/configs/orangepi_zero2_defconfig
-@@ -13,3 +13,4 @@ CONFIG_R_I2C_ENABLE=y
+@@ -19,3 +19,4 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_REALTEK=y
 CONFIG_SUN8I_EMAC=y
 CONFIG_SPI=y
 +CONFIG_PWRLED="PC12"
+-- 
+2.34.1
+
--- a/patch/u-boot/u-boot-sunxi/sunxi-dts-arm64-update-devicetree-files-from-Linux-v6.2-rc2.patch
+++ b/patch/u-boot/u-boot-sunxi/sunxi-dts-arm64-update-devicetree-files-from-Linux-v6.2-rc2.patch
@ -1,541 +0,0 @@
-From 8e2c0ee3bafbc283b58b66d9007847a5a3ed07be Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Thu, 12 Jan 2023 11:22:20 +0000
-Subject: [PATCH] sunxi: dts: arm64: update devicetree files from Linux
- v6.2-rc2
-
-Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
-This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.
-
-This enables GPU power management in the kernel for the H6, enables
-Bluetooth on the Pinebook, and adds USB to the H616 devices (just
-for newer Linux kernels at the moment, U-Boot support is pending).
-
-As before, this omits the non-backwards compatible changes to the R_INTC
-controller, to remain compatible with older kernels.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
- arch/arm/dts/axp803.dtsi                    |  10 --
- arch/arm/dts/sun50i-a64-pinebook.dts        |  14 ++
- arch/arm/dts/sun50i-h6-beelink-gs1.dts      |   1 +
- arch/arm/dts/sun50i-h6-gpu-opp.dtsi         |  87 +++++++++++
- arch/arm/dts/sun50i-h6.dtsi                 |  52 ++++++-
- arch/arm/dts/sun50i-h616-orangepi-zero2.dts |  41 +++++
- arch/arm/dts/sun50i-h616-x96-mate.dts       |  25 +++
- arch/arm/dts/sun50i-h616.dtsi               | 160 ++++++++++++++++++++
- 8 files changed, 378 insertions(+), 12 deletions(-)
- create mode 100644 arch/arm/dts/sun50i-h6-gpu-opp.dtsi
-
-diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi
-index 578ef368e2b4..a6b4b87f185d 100644
--- a/arch/arm/dts/axp803.dtsi
-+++ b/arch/arm/dts/axp803.dtsi
-@@ -25,16 +25,6 @@
- 		compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio";
- 		gpio-controller;
- 		#gpio-cells = <2>;
-
-		gpio0_ldo: gpio0-ldo-pin {
-			pins = "GPIO0";
-			function = "ldo";
-		};
-
-		gpio1_ldo: gpio1-ldo-pin {
-			pins = "GPIO1";
-			function = "ldo";
-		};
- 	};
- 
- 	battery_power_supply: battery-power {
-diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts b/arch/arm/dts/sun50i-a64-pinebook.dts
-index c00c4c1e9e73..576eae132230 100644
--- a/arch/arm/dts/sun50i-a64-pinebook.dts
-+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
-@@ -406,6 +406,20 @@
- 	status = "okay";
- };
- 
-+&uart1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
-+	uart-has-rtscts;
-+	status = "okay";
-+
-+	bluetooth {
-+		compatible = "realtek,rtl8723cs-bt";
-+		device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
-+		enable-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
-+		host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
-+	};
-+};
-+
- &usb_otg {
- 	dr_mode = "host";
- };
-diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-index 649b146dfff8..d6897ec97998 100644
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-@@ -5,6 +5,7 @@
- 
- #include "sun50i-h6.dtsi"
- #include "sun50i-h6-cpu-opp.dtsi"
-+#include "sun50i-h6-gpu-opp.dtsi"
- 
- #include <dt-bindings/gpio/gpio.h>
- 
-diff --git a/arch/arm/dts/sun50i-h6-gpu-opp.dtsi b/arch/arm/dts/sun50i-h6-gpu-opp.dtsi
-new file mode 100644
-index 000000000000..b48049c4fc85
--- /dev/null
-+++ b/arch/arm/dts/sun50i-h6-gpu-opp.dtsi
-@@ -0,0 +1,87 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+// Copyright (C) 2022 Clément Péron <peron.clem@gmail.com>
-+
-+/ {
-+	gpu_opp_table: opp-table-gpu {
-+		compatible = "operating-points-v2";
-+
-+		opp-216000000 {
-+			opp-hz = /bits/ 64 <216000000>;
-+			opp-microvolt = <810000 810000 1200000>;
-+		};
-+
-+		opp-264000000 {
-+			opp-hz = /bits/ 64 <264000000>;
-+			opp-microvolt = <810000 810000 1200000>;
-+		};
-+
-+		opp-312000000 {
-+			opp-hz = /bits/ 64 <312000000>;
-+			opp-microvolt = <810000 810000 1200000>;
-+		};
-+
-+		opp-336000000 {
-+			opp-hz = /bits/ 64 <336000000>;
-+			opp-microvolt = <810000 810000 1200000>;
-+		};
-+
-+		opp-360000000 {
-+			opp-hz = /bits/ 64 <360000000>;
-+			opp-microvolt = <820000 820000 1200000>;
-+		};
-+
-+		opp-384000000 {
-+			opp-hz = /bits/ 64 <384000000>;
-+			opp-microvolt = <830000 830000 1200000>;
-+		};
-+
-+		opp-408000000 {
-+			opp-hz = /bits/ 64 <408000000>;
-+			opp-microvolt = <840000 840000 1200000>;
-+		};
-+
-+		opp-420000000 {
-+			opp-hz = /bits/ 64 <420000000>;
-+			opp-microvolt = <850000 850000 1200000>;
-+		};
-+
-+		opp-432000000 {
-+			opp-hz = /bits/ 64 <432000000>;
-+			opp-microvolt = <860000 860000 1200000>;
-+		};
-+
-+		opp-456000000 {
-+			opp-hz = /bits/ 64 <456000000>;
-+			opp-microvolt = <870000 870000 1200000>;
-+		};
-+
-+		opp-504000000 {
-+			opp-hz = /bits/ 64 <504000000>;
-+			opp-microvolt = <890000 890000 1200000>;
-+		};
-+
-+		opp-540000000 {
-+			opp-hz = /bits/ 64 <540000000>;
-+			opp-microvolt = <910000 910000 1200000>;
-+		};
-+
-+		opp-576000000 {
-+			opp-hz = /bits/ 64 <576000000>;
-+			opp-microvolt = <930000 930000 1200000>;
-+		};
-+
-+		opp-624000000 {
-+			opp-hz = /bits/ 64 <624000000>;
-+			opp-microvolt = <950000 950000 1200000>;
-+		};
-+
-+		opp-756000000 {
-+			opp-hz = /bits/ 64 <756000000>;
-+			opp-microvolt = <1040000 1040000 1200000>;
-+		};
-+	};
-+};
-+
-+&gpu {
-+	operating-points-v2 = <&gpu_opp_table>;
-+};
-diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
-index afbbfc252697..3c85c8cc8eaa 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
-+++ b/arch/arm/dts/sun50i-h6.dtsi
-@@ -161,6 +161,7 @@
- 			clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
- 			clock-names = "bus", "mod";
- 			resets = <&ccu RST_BUS_VP9>;
-+			iommus = <&iommu 5>;
- 		};
- 
- 		video-codec@1c0e000 {
-@@ -186,6 +187,7 @@
- 			clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
- 			clock-names = "core", "bus";
- 			resets = <&ccu RST_BUS_GPU>;
-+			#cooling-cells = <2>;
- 			status = "disabled";
- 		};
- 
-@@ -1070,9 +1072,55 @@
- 		};
- 
- 		gpu-thermal {
-			polling-delay-passive = <0>;
-			polling-delay = <0>;
-+			polling-delay-passive = <1000>;
-+			polling-delay = <2000>;
- 			thermal-sensors = <&ths 1>;
-+
-+			trips {
-+				gpu_alert0: gpu-alert-0 {
-+					temperature = <95000>;
-+					hysteresis = <2000>;
-+					type = "passive";
-+				};
-+
-+				gpu_alert1: gpu-alert-1 {
-+					temperature = <100000>;
-+					hysteresis = <2000>;
-+					type = "passive";
-+				};
-+
-+				gpu_alert2: gpu-alert-2 {
-+					temperature = <105000>;
-+					hysteresis = <2000>;
-+					type = "passive";
-+				};
-+
-+				gpu-crit {
-+					temperature = <115000>;
-+					hysteresis = <0>;
-+					type = "critical";
-+				};
-+			};
-+
-+			cooling-maps {
-+				// Forbid the GPU to go over 756MHz
-+				map0 {
-+					trip = <&gpu_alert0>;
-+					cooling-device = <&gpu 1 THERMAL_NO_LIMIT>;
-+				};
-+
-+				// Forbid the GPU to go over 624MHz
-+				map1 {
-+					trip = <&gpu_alert1>;
-+					cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
-+				};
-+
-+				// Forbid the GPU to go over 576MHz
-+				map2 {
-+					trip = <&gpu_alert2>;
-+					cooling-device = <&gpu 3 THERMAL_NO_LIMIT>;
-+				};
-+			};
- 		};
- 	};
- };
-diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
-index 02893f3ac99d..cb8600d0ea1e 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
-+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
-@@ -49,8 +49,24 @@
- 		regulator-max-microvolt = <5000000>;
- 		regulator-always-on;
- 	};
-+
-+	reg_usb1_vbus: regulator-usb1-vbus {
-+		compatible = "regulator-fixed";
-+		regulator-name = "usb1-vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&reg_vcc5v>;
-+		enable-active-high;
-+		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
-+	};
- };
- 
-+&ehci1 {
-+	status = "okay";
-+};
-+
-+/* USB 2 & 3 are on headers only. */
-+
- &emac0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ext_rgmii_pins>;
-@@ -76,6 +92,10 @@
- 	status = "okay";
- };
- 
-+&ohci1 {
-+	status = "okay";
-+};
-+
- &r_rsb {
- 	status = "okay";
- 
-@@ -211,3 +231,24 @@
- 	pinctrl-0 = <&uart0_ph_pins>;
- 	status = "okay";
- };
-+
-+&usbotg {
-+	/*
-+	 * PHY0 pins are connected to a USB-C socket, but a role switch
-+	 * is not implemented: both CC pins are pulled to GND.
-+	 * The VBUS pins power the device, so a fixed peripheral mode
-+	 * is the best choice.
-+	 * The board can be powered via GPIOs, in this case port0 *can*
-+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
-+	 * then provided by the GPIOs. Any user of this setup would
-+	 * need to adjust the DT accordingly: dr_mode set to "host",
-+	 * enabling OHCI0 and EHCI0.
-+	 */
-+	dr_mode = "peripheral";
-+	status = "okay";
-+};
-+
-+&usbphy {
-+	usb1_vbus-supply = <&reg_usb1_vbus>;
-+	status = "okay";
-+};
-diff --git a/arch/arm/dts/sun50i-h616-x96-mate.dts b/arch/arm/dts/sun50i-h616-x96-mate.dts
-index 6619db34714a..07424c28b696 100644
--- a/arch/arm/dts/sun50i-h616-x96-mate.dts
-+++ b/arch/arm/dts/sun50i-h616-x96-mate.dts
-@@ -32,6 +32,14 @@
- 	};
- };
- 
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ehci2 {
-+	status = "okay";
-+};
-+
- &ir {
- 	status = "okay";
- };
-@@ -54,6 +62,14 @@
- 	status = "okay";
- };
- 
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&ohci2 {
-+	status = "okay";
-+};
-+
- &r_rsb {
- 	status = "okay";
- 
-@@ -175,3 +191,12 @@
- 	pinctrl-0 = <&uart0_ph_pins>;
- 	status = "okay";
- };
-+
-+&usbotg {
-+	dr_mode = "host";	/* USB A type receptable */
-+	status = "okay";
-+};
-+
-+&usbphy {
-+	status = "okay";
-+};
-diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
-index 622a1f7d1641..74aed0d232a9 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
-+++ b/arch/arm/dts/sun50i-h616.dtsi
-@@ -504,6 +504,166 @@
- 			};
- 		};
- 
-+		usbotg: usb@5100000 {
-+			compatible = "allwinner,sun50i-h616-musb",
-+				     "allwinner,sun8i-h3-musb";
-+			reg = <0x05100000 0x0400>;
-+			clocks = <&ccu CLK_BUS_OTG>;
-+			resets = <&ccu RST_BUS_OTG>;
-+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "mc";
-+			phys = <&usbphy 0>;
-+			phy-names = "usb";
-+			extcon = <&usbphy 0>;
-+			status = "disabled";
-+		};
-+
-+		usbphy: phy@5100400 {
-+			compatible = "allwinner,sun50i-h616-usb-phy";
-+			reg = <0x05100400 0x24>,
-+			      <0x05101800 0x14>,
-+			      <0x05200800 0x14>,
-+			      <0x05310800 0x14>,
-+			      <0x05311800 0x14>;
-+			reg-names = "phy_ctrl",
-+				    "pmu0",
-+				    "pmu1",
-+				    "pmu2",
-+				    "pmu3";
-+			clocks = <&ccu CLK_USB_PHY0>,
-+				 <&ccu CLK_USB_PHY1>,
-+				 <&ccu CLK_USB_PHY2>,
-+				 <&ccu CLK_USB_PHY3>,
-+				 <&ccu CLK_BUS_EHCI2>;
-+			clock-names = "usb0_phy",
-+				      "usb1_phy",
-+				      "usb2_phy",
-+				      "usb3_phy",
-+				      "pmu2_clk";
-+			resets = <&ccu RST_USB_PHY0>,
-+				 <&ccu RST_USB_PHY1>,
-+				 <&ccu RST_USB_PHY2>,
-+				 <&ccu RST_USB_PHY3>;
-+			reset-names = "usb0_reset",
-+				      "usb1_reset",
-+				      "usb2_reset",
-+				      "usb3_reset";
-+			status = "disabled";
-+			#phy-cells = <1>;
-+		};
-+
-+		ehci0: usb@5101000 {
-+			compatible = "allwinner,sun50i-h616-ehci",
-+				     "generic-ehci";
-+			reg = <0x05101000 0x100>;
-+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI0>,
-+				 <&ccu CLK_BUS_EHCI0>,
-+				 <&ccu CLK_USB_OHCI0>;
-+			resets = <&ccu RST_BUS_OHCI0>,
-+				 <&ccu RST_BUS_EHCI0>;
-+			phys = <&usbphy 0>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ohci0: usb@5101400 {
-+			compatible = "allwinner,sun50i-h616-ohci",
-+				     "generic-ohci";
-+			reg = <0x05101400 0x100>;
-+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI0>,
-+				 <&ccu CLK_USB_OHCI0>;
-+			resets = <&ccu RST_BUS_OHCI0>;
-+			phys = <&usbphy 0>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ehci1: usb@5200000 {
-+			compatible = "allwinner,sun50i-h616-ehci",
-+				     "generic-ehci";
-+			reg = <0x05200000 0x100>;
-+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI1>,
-+				 <&ccu CLK_BUS_EHCI1>,
-+				 <&ccu CLK_USB_OHCI1>;
-+			resets = <&ccu RST_BUS_OHCI1>,
-+				 <&ccu RST_BUS_EHCI1>;
-+			phys = <&usbphy 1>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ohci1: usb@5200400 {
-+			compatible = "allwinner,sun50i-h616-ohci",
-+				     "generic-ohci";
-+			reg = <0x05200400 0x100>;
-+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI1>,
-+				 <&ccu CLK_USB_OHCI1>;
-+			resets = <&ccu RST_BUS_OHCI1>;
-+			phys = <&usbphy 1>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ehci2: usb@5310000 {
-+			compatible = "allwinner,sun50i-h616-ehci",
-+				     "generic-ehci";
-+			reg = <0x05310000 0x100>;
-+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI2>,
-+				 <&ccu CLK_BUS_EHCI2>,
-+				 <&ccu CLK_USB_OHCI2>;
-+			resets = <&ccu RST_BUS_OHCI2>,
-+				 <&ccu RST_BUS_EHCI2>;
-+			phys = <&usbphy 2>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ohci2: usb@5310400 {
-+			compatible = "allwinner,sun50i-h616-ohci",
-+				     "generic-ohci";
-+			reg = <0x05310400 0x100>;
-+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI2>,
-+				 <&ccu CLK_USB_OHCI2>;
-+			resets = <&ccu RST_BUS_OHCI2>;
-+			phys = <&usbphy 2>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ehci3: usb@5311000 {
-+			compatible = "allwinner,sun50i-h616-ehci",
-+				     "generic-ehci";
-+			reg = <0x05311000 0x100>;
-+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI3>,
-+				 <&ccu CLK_BUS_EHCI3>,
-+				 <&ccu CLK_USB_OHCI3>;
-+			resets = <&ccu RST_BUS_OHCI3>,
-+				 <&ccu RST_BUS_EHCI3>;
-+			phys = <&usbphy 3>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
-+		ohci3: usb@5311400 {
-+			compatible = "allwinner,sun50i-h616-ohci",
-+				     "generic-ohci";
-+			reg = <0x05311400 0x100>;
-+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_OHCI3>,
-+				 <&ccu CLK_USB_OHCI3>;
-+			resets = <&ccu RST_BUS_OHCI3>;
-+			phys = <&usbphy 3>;
-+			phy-names = "usb";
-+			status = "disabled";
-+		};
-+
- 		rtc: rtc@7000000 {
- 			compatible = "allwinner,sun50i-h616-rtc";
- 			reg = <0x07000000 0x400>;