mvebu: refresh patches based on 5.10.5
Signed-off-by: Rosen Penev <rosenp@gmail.com>
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@ -51,7 +51,7 @@
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* Functions implementing the pwm_chip methods
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*/
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static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
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@@ -1211,7 +1239,7 @@ static int mvebu_gpio_probe(struct platf
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@@ -1219,7 +1247,7 @@ static int mvebu_gpio_probe(struct platf
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err = irq_alloc_domain_generic_chips(
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mvchip->domain, ngpios, 2, np->name, handle_level_irq,
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@ -60,7 +60,7 @@
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if (err) {
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dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n",
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mvchip->chip.label);
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@@ -1229,6 +1257,8 @@ static int mvebu_gpio_probe(struct platf
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@@ -1237,6 +1265,8 @@ static int mvebu_gpio_probe(struct platf
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ct->chip.irq_mask = mvebu_gpio_level_irq_mask;
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ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask;
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ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
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@ -69,7 +69,7 @@
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ct->chip.name = mvchip->chip.label;
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ct = &gc->chip_types[1];
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@@ -1237,6 +1267,8 @@ static int mvebu_gpio_probe(struct platf
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@@ -1245,6 +1275,8 @@ static int mvebu_gpio_probe(struct platf
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ct->chip.irq_mask = mvebu_gpio_edge_irq_mask;
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ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask;
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ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
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@ -78,11 +78,11 @@
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ct->handler = handle_edge_irq;
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ct->chip.name = mvchip->chip.label;
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@@ -1252,6 +1284,7 @@ static int mvebu_gpio_probe(struct platf
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@@ -1260,6 +1292,7 @@ static int mvebu_gpio_probe(struct platf
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continue;
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irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler,
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mvchip);
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+ mvchip->bank_irq[i] = irq;
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}
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/* Some MVEBU SoCs have simple PWM support for GPIO lines */
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return 0;
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@ -1,6 +1,6 @@
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--- a/arch/arm/mm/dma-mapping.c
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+++ b/arch/arm/mm/dma-mapping.c
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@@ -314,7 +314,7 @@ static void *__alloc_remap_buffer(struct
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@@ -315,7 +315,7 @@ static void *__alloc_remap_buffer(struct
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pgprot_t prot, struct page **ret_page,
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const void *caller, bool want_vaddr);
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