switch pine64-dev to 4.10.x, fix patches, remove useless ones

config/sources/pine64.conf

@@ -22,8 +22,8 @@ case $BRANCH in
 	UBOOT_TARGET_MAP='a64;;u-boot-sunxi-with-spl.bin'
 	BOOTENV_FILE='sun50iw1-next.txt'
 
-	KERNELSOURCE='https://github.com/apritzel/linux'
-	KERNELBRANCH='branch:sunxi64-4.9-testing'
+	KERNELSOURCE='https://github.com/Icenowy/linux/'
+	KERNELBRANCH='branch:sunxi64-next-20170125'
 	KERNELDIR='linux-pine64-dev'
 	GOVERNOR=schedutil
 	;;

patch/kernel/pine64-dev/add_configfs_overlay_for_v4.10.x.patch

@@ -358,31 +358,3 @@ index dca8f9b..ec7e167 100644
  {
  	int parent, len;
  	const struct of_bus *bus, *pbus;
-diff --git a/drivers/of/resolver.c b/drivers/of/resolver.c
-index 46325d6..867d1cf 100644
---- a/drivers/of/resolver.c
-+++ b/drivers/of/resolver.c
-@@ -321,8 +321,10 @@ int of_resolve_phandles(struct device_node *resolve)
- 		pr_err("%s: node %s not detached\n", __func__,
- 			 resolve->full_name);
- 	/* the resolve node must exist, and be detached */
--	if (!resolve || !of_node_check_flag(resolve, OF_DETACHED))
-+	if (!resolve || !of_node_check_flag(resolve, OF_DETACHED)) {
-+		pr_err("%s: resolve node must exist, and be detached\n",  __func__);
- 		return -EINVAL;
-+	}
- 
- 	/* first we need to adjust the phandles */
- 	phandle_delta = of_get_tree_max_phandle() + 1;
-@@ -338,8 +340,10 @@ int of_resolve_phandles(struct device_node *resolve)
- 		/* resolve root is guaranteed to be the '/' */
- 		err = __of_adjust_tree_phandle_references(childroot,
- 				resolve, 0);
--		if (err != 0)
-+		if (err != 0) {
-+			pr_err("%s: __of_adjust_tree_phandle_references failed !\n",  __func__);
- 			return err;
-+		}
- 
- 		BUG_ON(__of_adjust_tree_phandle_references(childroot,
- 				resolve, phandle_delta));

patch/kernel/pine64-dev/enable-mmc-pull-up.patch

@@ -1,20 +0,0 @@
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-index 1efe033a..aafea7b2 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -172,6 +172,7 @@
- 				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
- 				function = "mmc0";
- 				drive-strength = <30>;
-+				bias-pull-up;
- 			};
- 
- 			mmc0_default_cd_pin: mmc0_cd_pin@0 {
-@@ -192,6 +193,7 @@
- 				       "PC15", "PC16";
- 				function = "mmc2";
- 				drive-strength = <30>;
-+				bias-pull-up;
- 			};
- 
- 			emac_rmii_pins: emac0@0 {

patch/kernel/pine64-dev/packaging-4.x-DEV-with-postinstall-scripts.patch

@@ -31,15 +31,6 @@ index 8ea9fd2b..9f17b825 100755
  	# Create the package
  	dpkg-gencontrol $forcearch -Vkernel:debarch="${debarch}" -p$pname -P"$pdir"
  	dpkg --build "$pdir" ..
-@@ -51,7 +73,7 @@ set_debarch() {
- 		debarch=hppa ;;
- 	mips*)
- 		debarch=mips$(grep -q CPU_LITTLE_ENDIAN=y $KCONFIG_CONFIG && echo el || true) ;;
--	arm64)
-+	arm64|aarch64)
- 		debarch=arm64 ;;
- 	arm*)
- 		if grep -q CONFIG_AEABI=y $KCONFIG_CONFIG; then
 @@ -95,11 +117,13 @@ tmpdir="$objtree/debian/tmp"
  fwdir="$objtree/debian/fwtmp"
  kernel_headers_dir="$objtree/debian/hdrtmp"

patch/kernel/pine64-dev/spi-patch-for-A64-4.10.x.patch

@@ -1,5 +1,5 @@
 diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-index e3c3d7d..522447c 100644
+index 100e9b4..1761402 100644
 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
 @@ -52,6 +52,11 @@
@@ -14,9 +14,9 @@ index e3c3d7d..522447c 100644
  	cpus {
  		#address-cells = <1>;
  		#size-cells = <0>;
-@@ -225,6 +230,35 @@
- 				allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+@@ -258,6 +263,35 @@
+ 				function = "emac";
+ 				drive-strength = <40>;
  			};
 +
 +			spi0_pins_a: spi0@0 {
@@ -50,10 +50,11 @@ index e3c3d7d..522447c 100644
  		};
  
  		uart0: serial@1c28000 {
-@@ -387,6 +421,36 @@
- 			};
+@@ -426,5 +460,36 @@
+ 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
  		};
- 
++
 +		spi0: spi@01c68000 {
 +			compatible = "allwinner,sun6i-a31-spi";
 +			reg = <0x01c68000 0x1000>;
@@ -84,6 +85,5 @@ index e3c3d7d..522447c 100644
 +			#size-cells = <0>;
 +		};
 +
- 		usbphy: phy@01c19400 {
- 			compatible = "allwinner,sun50i-a64-usb-phy";
- 			reg = <0x01c19400 0x14>,
+ 	};
+ };

patch/kernel/pine64-dev/spi-sun6i-allow-large-transfers.patch

@@ -1,201 +0,0 @@
-diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
-index 9918a57..64be5aa 100644
---- a/drivers/spi/spi-sun6i.c
-+++ b/drivers/spi/spi-sun6i.c
-@@ -17,6 +17,7 @@
- #include <linux/interrupt.h>
- #include <linux/io.h>
- #include <linux/module.h>
-+#include <linux/of_device.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
- #include <linux/reset.h>
-@@ -24,6 +25,7 @@
- #include <linux/spi/spi.h>
- 
- #define SUN6I_FIFO_DEPTH		128
-+#define SUN8I_FIFO_DEPTH		64
- 
- #define SUN6I_GBL_CTL_REG		0x04
- #define SUN6I_GBL_CTL_BUS_ENABLE		BIT(0)
-@@ -44,6 +46,8 @@
- #define SUN6I_TFR_CTL_XCH			BIT(31)
- 
- #define SUN6I_INT_CTL_REG		0x10
-+#define SUN6I_INT_CTL_RF_FUL			BIT(2)
-+#define SUN6I_INT_CTL_TF_EMP			BIT(5)
- #define SUN6I_INT_CTL_RF_OVF			BIT(8)
- #define SUN6I_INT_CTL_TC			BIT(12)
- 
-@@ -66,11 +70,13 @@
- #define SUN6I_CLK_CTL_CDR1(div)			(((div) & SUN6I_CLK_CTL_CDR1_MASK) << 8)
- #define SUN6I_CLK_CTL_DRS			BIT(12)
- 
-+#define SUN6I_MAX_XFER_SIZE                    0xffffff
-+
- #define SUN6I_BURST_CNT_REG		0x30
--#define SUN6I_BURST_CNT(cnt)			((cnt) & 0xffffff)
-+#define SUN6I_BURST_CNT(cnt)			((cnt) & SUN6I_MAX_XFER_SIZE)
- 
- #define SUN6I_XMIT_CNT_REG		0x34
--#define SUN6I_XMIT_CNT(cnt)			((cnt) & 0xffffff)
-+#define SUN6I_XMIT_CNT(cnt)			((cnt) & SUN6I_MAX_XFER_SIZE)
- 
- #define SUN6I_BURST_CTL_CNT_REG		0x38
- #define SUN6I_BURST_CTL_CNT_STC(cnt)		((cnt) & 0xffffff)
-@@ -90,6 +96,7 @@ struct sun6i_spi {
- 	const u8		*tx_buf;
- 	u8			*rx_buf;
- 	int			len;
-+	unsigned long		fifo_depth;
- };
- 
- static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
-@@ -102,6 +109,31 @@ static inline void sun6i_spi_write(struct sun6i_spi *sspi, u32 reg, u32 value)
- 	writel(value, sspi->base_addr + reg);
- }
- 
-+static inline u32 sun6i_spi_get_tx_fifo_count(struct sun6i_spi *sspi)
-+{
-+	u32 reg = sun6i_spi_read(sspi, SUN6I_FIFO_STA_REG);
-+
-+	reg >>= SUN6I_FIFO_STA_TF_CNT_BITS;
-+
-+	return reg & SUN6I_FIFO_STA_TF_CNT_MASK;
-+}
-+
-+static inline void sun6i_spi_enable_interrupt(struct sun6i_spi *sspi, u32 mask)
-+{
-+	u32 reg = sun6i_spi_read(sspi, SUN6I_INT_CTL_REG);
-+
-+	reg |= mask;
-+	sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, reg);
-+}
-+
-+static inline void sun6i_spi_disable_interrupt(struct sun6i_spi *sspi, u32 mask)
-+{
-+	u32 reg = sun6i_spi_read(sspi, SUN6I_INT_CTL_REG);
-+
-+	reg &= ~mask;
-+	sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, reg);
-+}
-+
- static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
- {
- 	u32 reg, cnt;
-@@ -124,10 +156,13 @@ static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len)
- 
- static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi, int len)
- {
-+	u32 cnt;
- 	u8 byte;
- 
--	if (len > sspi->len)
--		len = sspi->len;
-+	/* See how much data we can fit */
-+	cnt = sspi->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi);
-+
-+	len = min3(len, (int)cnt, sspi->len);
- 
- 	while (len--) {
- 		byte = sspi->tx_buf ? *sspi->tx_buf++ : 0;
-@@ -155,7 +190,7 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
- 
- static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
- {
--	return SUN6I_FIFO_DEPTH - 1;
-+	return SUN6I_MAX_XFER_SIZE - 1;
- }
- 
- static int sun6i_spi_transfer_one(struct spi_master *master,
-@@ -169,8 +204,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
- 	int ret = 0;
- 	u32 reg;
- 
--	/* We don't support transfer larger than the FIFO */
--	if (tfr->len > SUN6I_FIFO_DEPTH)
-+	if (tfr->len > SUN6I_MAX_XFER_SIZE)
- 		return -EINVAL;
- 
- 	reinit_completion(&sspi->done);
-@@ -265,10 +299,16 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
- 			SUN6I_BURST_CTL_CNT_STC(tx_len));
- 
- 	/* Fill the TX FIFO */
--	sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH);
-+	sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
- 
- 	/* Enable the interrupts */
--	sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC);
-+	/* Only enable Tx FIFO interrupt if we really need it */
-+	if (tx_len > sspi->fifo_depth)
-+		sun6i_spi_write(sspi, SUN6I_INT_CTL_REG,
-+			SUN6I_INT_CTL_TC | SUN6I_INT_CTL_RF_FUL | SUN6I_INT_CTL_TF_EMP);
-+	else
-+		sun6i_spi_write(sspi, SUN6I_INT_CTL_REG,
-+			SUN6I_INT_CTL_TC | SUN6I_INT_CTL_RF_FUL);
- 
- 	/* Start the transfer */
- 	reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
-@@ -288,8 +328,6 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
- 		goto out;
- 	}
- 
--	sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH);
--
- out:
- 	sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0);
- 
-@@ -304,10 +342,33 @@ static irqreturn_t sun6i_spi_handler(int irq, void *dev_id)
- 	/* Transfer complete */
- 	if (status & SUN6I_INT_CTL_TC) {
- 		sun6i_spi_write(sspi, SUN6I_INT_STA_REG, SUN6I_INT_CTL_TC);
-+		sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
- 		complete(&sspi->done);
- 		return IRQ_HANDLED;
- 	}
- 
-+	/* Receive FIFO Full */
-+	if (status & SUN6I_INT_CTL_RF_FUL) {
-+		sun6i_spi_drain_fifo(sspi, sspi->fifo_depth);
-+		/* Only clear the interrupt _after_ draining the FIFO */
-+		sun6i_spi_write(sspi, SUN6I_INT_STA_REG, SUN6I_INT_CTL_RF_FUL);
-+		return IRQ_HANDLED;
-+	}
-+
-+	/* Transmit FIFO Empty */
-+	if (status & SUN6I_INT_CTL_TF_EMP) {
-+		sun6i_spi_fill_fifo(sspi, sspi->fifo_depth);
-+
-+		if (!sspi->len)
-+			/* nothing left to transmit */
-+			sun6i_spi_disable_interrupt(sspi, SUN6I_INT_CTL_TF_EMP);
-+
-+		/* Only clear the interrupt _after_ re-seeding the FIFO */
-+		sun6i_spi_write(sspi, SUN6I_INT_STA_REG, SUN6I_INT_CTL_TF_EMP);
-+
-+		return IRQ_HANDLED;
-+	}
-+
- 	return IRQ_NONE;
- }
- 
-@@ -398,6 +459,8 @@ static int sun6i_spi_probe(struct platform_device *pdev)
- 	}
- 
- 	sspi->master = master;
-+	sspi->fifo_depth = (unsigned long)of_device_get_match_data(&pdev->dev);
-+
- 	master->max_speed_hz = 100 * 1000 * 1000;
- 	master->min_speed_hz = 3 * 1000;
- 	master->set_cs = sun6i_spi_set_cs;
-@@ -470,7 +533,8 @@ static int sun6i_spi_remove(struct platform_device *pdev)
- }
- 
- static const struct of_device_id sun6i_spi_match[] = {
--	{ .compatible = "allwinner,sun6i-a31-spi", },
-+	{ .compatible = "allwinner,sun6i-a31-spi", .data = (void *)SUN6I_FIFO_DEPTH },
-+	{ .compatible = "allwinner,sun8i-h3-spi",  .data = (void *)SUN8I_FIFO_DEPTH },
- 	{}
- };
- MODULE_DEVICE_TABLE(of, sun6i_spi_match);