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Fix TV out on H5/Orange Pi PC2

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This commit is contained in:
zador-blood-stained 2017-02-22 12:58:43 +03:00
parent 71f43993a8
commit d8191b649b
1 changed files with 12 additions and 7 deletions
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19
patch/u-boot/u-boot-sun50i-dev/add-disp2-video-driver-jernej.patch
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@ -182,7 +182,7 @@ index 3c85222..4a72dae 100644
#define SUNXI_MS_BASE 0x01c07000
#define SUNXI_TVD_BASE 0x01c08000
#define SUNXI_CSI0_BASE 0x01c09000
+#ifndef CONFIG_MACH_SUN8I_H3
+#if !defined(CONFIG_MACH_SUN8I_H3) && !defined(CONFIG_MACH_SUN50I_H5)
#define SUNXI_TVE0_BASE 0x01c0a000
+#endif
#define SUNXI_EMAC_BASE 0x01c0b000
@ -198,14 +198,14 @@ index 3c85222..4a72dae 100644
#define SUNXI_SPI2_BASE 0x01c17000
#define SUNXI_SATA_BASE 0x01c18000
#ifdef CONFIG_SUNXI_GEN_SUN4I
@@ -157,13 +163,21 @@ defined(CONFIG_MACH_SUN50I)
/* module sram */
@@ -157,12 +163,21 @@ defined(CONFIG_MACH_SUN50I)
#define SUNXI_SRAM_C_BASE 0x01d00000
+#ifndef CONFIG_MACH_SUN8I_H3
#define SUNXI_DE_FE0_BASE 0x01e00000
+#else
+#if defined(CONFIG_MACH_SUN8I_H3) && !defined(CONFIG_MACH_SUN50I_H5)
+#define SUNXI_TVE0_BASE 0x01e00000
+#else
+#define SUNXI_TVE0_BASE 0x01e40000
+#endif
#define SUNXI_DE_FE1_BASE 0x01e20000
#define SUNXI_DE_BE0_BASE 0x01e60000
@ -829,7 +829,7 @@ new file mode 100644
index 0000000..ecef9f6
--- /dev/null
+++ b/u-boot/drivers/video/sunxi_display2.c
@@ -0,0 +1,1273 @@
@@ -0,0 +1,1278 @@
+/*
+ * Display driver for sunxi Allwinner SoCs with DE2.
+ *
@ -1263,7 +1263,7 @@ index 0000000..ecef9f6
+ u32 data;
+
+ /* enable clock */
+#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) && !defined(CONFIG_MACH_SUN50I_H5)
+ setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4);
+#else
+ setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 2);
@ -1747,6 +1747,11 @@ index 0000000..ecef9f6
+ setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_TVE);
+ writel(CCM_TVE_CTRL_GATE | CCM_TVE_CTRL_M(2), &ccm->tve_clk_cfg);
+
+#ifdef CONFIG_MACH_SUN50I_H5
+ writel(0x285 << 16, SUNXI_TVE0_BASE + 0x304);
+ writel(0x00101110, SUNXI_TVE0_BASE + 0x30c);
+#endif
+
+ switch (sunxi_display.monitor) {
+ case sunxi_monitor_composite_pal:
+ writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) |