mixtile-blade3: enable pci3x4 nvme boot (requires u.2 -> m.2 adapter from blade3 case kit)

patch/u-boot/legacy/u-boot-mixtile-rk3588/0010-blade3-enable-pcie3x4.patch

@@ -0,0 +1,267 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Ricardo Pardini <ricardo@pardini.net>
+Date: Tue, 10 Oct 2023 22:13:28 +0200
+Subject: blade3: enable pcie3x4
+
+---
+ arch/arm/dts/rk3588-blade3.dts | 75 +++++++++-
+ configs/blade3_defconfig       | 40 ++---
+ 2 files changed, 95 insertions(+), 20 deletions(-)
+
+diff --git a/arch/arm/dts/rk3588-blade3.dts b/arch/arm/dts/rk3588-blade3.dts
+index d46226011c0..ba0e7306406 100644
+--- a/arch/arm/dts/rk3588-blade3.dts
++++ b/arch/arm/dts/rk3588-blade3.dts
+@@ -5,7 +5,6 @@
+  */
+ 
+ /dts-v1/;
+-
+ #include "rk3588.dtsi"
+ #include "rk3588-u-boot.dtsi"
+ #include <dt-bindings/input/input.h>
+@@ -14,6 +13,43 @@
+ 	model = "Mixtile Blade 3";
+ 	compatible = "mixtile,blade3", "rockchip,rk3588";
+ 
++	vcc12v_dcin: vcc12v-dcin {
++		u-boot,dm-pre-reloc;
++		compatible = "regulator-fixed";
++		regulator-name = "vcc12v_dcin";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <12000000>;
++		regulator-max-microvolt = <12000000>;
++	};
++
++	vcc5v0_sys: vcc5v0-sys {
++		u-boot,dm-pre-reloc;
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc12v_dcin>;
++	};
++
++	vcc3v3_pcie30: vcc3v3-pcie30 {
++		u-boot,dm-pre-reloc;
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3_pcie30";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		enable-active-high;
++		gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
++		regulator-boot-on;
++		regulator-always-on;
++		startup-delay-us = <5000>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc3v3_pcie30_en>;
++		vin-supply = <&vcc12v_dcin>;
++	};
++
+ 	vbus5v0_typec1: vbus5v0-typec1 {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "vbus5v0_typec1";
+@@ -22,6 +58,33 @@
+ 	};
+ };
+ 
++&pcie3x4 {
++	u-boot,dm-pre-reloc;
++	vpcie3v3-supply = <&vcc3v3_pcie30>;
++	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
++	status = "okay";
++};
++
++&pcie30phy {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++};
++
++&combphy0_ps {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++};
++
++&combphy1_ps {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++};
++
++&combphy2_psu {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++};
++
+ &i2c1 {
+ 	status = "okay";
+ 
+@@ -47,4 +110,14 @@
+ 			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ 		};
+ 	};
++
++	pcie {
++		u-boot,dm-spl;
++		vcc3v3_pcie30_en: vcc3v3-pcie30-en {
++			u-boot,dm-spl;
++			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	
++	};
+ };
++
+diff --git a/configs/blade3_defconfig b/configs/blade3_defconfig
+index 0ed3a08d853..07dde02b427 100644
+--- a/configs/blade3_defconfig
++++ b/configs/blade3_defconfig
+@@ -6,14 +6,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
+ CONFIG_SYS_MALLOC_F_LEN=0x80000
+ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+ CONFIG_ROCKCHIP_RK3588=y
++CONFIG_ROCKCHIP_USB_BOOT=y
+ CONFIG_ROCKCHIP_FIT_IMAGE=y
+ CONFIG_ROCKCHIP_HWID_DTB=y
+ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+ CONFIG_USING_KERNEL_DTB_V2=y
+ CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+ CONFIG_ROCKCHIP_NEW_IDB=y
+-CONFIG_LOADER_INI="RK3588MINIALL.ini"
+-CONFIG_TRUST_INI="RK3588TRUST.ini"
++CONFIG_PSTORE=y
+ CONFIG_SPL_SERIAL_SUPPORT=y
+ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+ CONFIG_TARGET_EVB_RK3588=y
+@@ -63,6 +63,7 @@ CONFIG_CMD_GPT=y
+ # CONFIG_CMD_LOADS is not set
+ CONFIG_CMD_BOOT_ANDROID=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
+ CONFIG_CMD_SF=y
+ CONFIG_CMD_SPI=y
+ CONFIG_CMD_USB=y
+@@ -81,7 +82,6 @@ CONFIG_SPL_OF_CONTROL=y
+ CONFIG_SPL_DTB_MINIMUM=y
+ CONFIG_OF_LIVE=y
+ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+-CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+ # CONFIG_NET_TFTP_VARS is not set
+ CONFIG_REGMAP=y
+ CONFIG_SPL_REGMAP=y
+@@ -101,9 +101,11 @@ CONFIG_DM_RNG=y
+ CONFIG_RNG_ROCKCHIP=y
+ CONFIG_SCMI_FIRMWARE=y
+ CONFIG_SPL_SCMI_FIRMWARE=y
++CONFIG_GPIO_HOG=y
+ CONFIG_ROCKCHIP_GPIO=y
+ CONFIG_ROCKCHIP_GPIO_V2=y
+ CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_I2C_MUX=y
+ CONFIG_DM_KEY=y
+ CONFIG_RK8XX_PWRKEY=y
+ CONFIG_ADC_KEY=y
+@@ -111,6 +113,7 @@ CONFIG_MISC=y
+ CONFIG_SPL_MISC=y
+ CONFIG_MISC_DECOMPRESS=y
+ CONFIG_SPL_MISC_DECOMPRESS=y
++CONFIG_ROCKCHIP_OTP=y
+ CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+ CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+ CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
+@@ -134,24 +137,27 @@ CONFIG_SPI_FLASH_WINBOND=y
+ CONFIG_SPI_FLASH_XMC=y
+ CONFIG_SPI_FLASH_XTX=y
+ CONFIG_SPI_FLASH_MTD=y
++CONFIG_PHY_REALTEK=y
+ CONFIG_DM_ETH=y
+ CONFIG_DM_ETH_PHY=y
+ CONFIG_DWC_ETH_QOS=y
++CONFIG_RGMII=y
+ CONFIG_GMAC_ROCKCHIP=y
+ CONFIG_NVME=y
+-CONFIG_CMD_NVME=y
+ CONFIG_PCI=y
+-CONFIG_CMD_PCI=y
+ CONFIG_DM_PCI=y
+ CONFIG_DM_PCI_COMPAT=y
+ CONFIG_PCIE_DW_ROCKCHIP=y
+-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+ CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
+-CONFIG_PHY_ROCKCHIP_USBDP=y
++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
++CONFIG_PHY_ROCKCHIP_TYPEC=y
+ CONFIG_PINCTRL=y
+ CONFIG_SPL_PINCTRL=y
+ CONFIG_DM_FUEL_GAUGE=y
+ CONFIG_POWER_FG_CW201X=y
++CONFIG_POWER_FG_CW221X=y
+ CONFIG_DM_PMIC=y
+ CONFIG_PMIC_SPI_RK8XX=y
+ CONFIG_DM_POWER_DELIVERY=y
+@@ -166,6 +172,8 @@ CONFIG_REGULATOR_RK860X=y
+ CONFIG_REGULATOR_RK806=y
+ CONFIG_CHARGER_BQ25700=y
+ CONFIG_CHARGER_BQ25890=y
++CONFIG_CHARGER_SC8551=y
++CONFIG_CHARGER_SGM41542=y
+ CONFIG_DM_CHARGE_DISPLAY=y
+ CONFIG_CHARGE_ANIMATION=y
+ CONFIG_PWM_ROCKCHIP=y
+@@ -174,8 +182,6 @@ CONFIG_SPL_RAM=y
+ CONFIG_TPL_RAM=y
+ CONFIG_DM_RAMDISK=y
+ CONFIG_RAMDISK_RO=y
+-CONFIG_ROCKCHIP_SDRAM_COMMON=y
+-CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
+ CONFIG_DM_RESET=y
+ CONFIG_SPL_DM_RESET=y
+ CONFIG_SPL_RESET_ROCKCHIP=y
+@@ -189,6 +195,7 @@ CONFIG_SYSRESET=y
+ CONFIG_USB=y
+ CONFIG_USB_XHCI_HCD=y
+ CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_XHCI_PCI=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_GENERIC=y
+ CONFIG_USB_OHCI_HCD=y
+@@ -205,6 +212,9 @@ CONFIG_USB_GADGET_DOWNLOAD=y
+ CONFIG_DM_VIDEO=y
+ CONFIG_DISPLAY=y
+ CONFIG_DRM_ROCKCHIP=y
++CONFIG_DRM_MAXIM_MAX96745=y
++CONFIG_DRM_MAXIM_MAX96755F=y
++CONFIG_DRM_ROHM_BU18XL82=y
+ CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
+ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
+ CONFIG_DRM_ROCKCHIP_DW_DP=y
+@@ -219,7 +229,9 @@ CONFIG_SPL_RSA=y
+ CONFIG_RSA_N_SIZE=0x200
+ CONFIG_RSA_E_SIZE=0x10
+ CONFIG_RSA_C_SIZE=0x20
++CONFIG_XBC=y
+ CONFIG_LZ4=y
++CONFIG_LZMA=y
+ CONFIG_ERRNO_STR=y
+ # CONFIG_EFI_LOADER is not set
+ CONFIG_AVB_LIBAVB=y
+@@ -227,13 +239,3 @@ CONFIG_AVB_LIBAVB_AB=y
+ CONFIG_AVB_LIBAVB_ATX=y
+ CONFIG_AVB_LIBAVB_USER=y
+ CONFIG_RK_AVB_LIBAVB_USER=y
+-CONFIG_ROCKCHIP_OTP=y
+-CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+-CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
+-CONFIG_AHCI=y
+-CONFIG_CMD_SCSI=y
+-CONFIG_DM_SCSI=y
+-CONFIG_DWC_AHCI=y
+-CONFIG_LIBATA=y
+-CONFIG_SCSI_AHCI=y
+-CONFIG_SCSI=y
+-- 
+Armbian
+