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Update mvebu-edge 5.14 patches with version from http://git.armlinux.org.uk/cgit/linux-arm.git/log/?h=clearfog

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This commit is contained in:
Heisath 2021-10-04 11:18:13 +02:00
parent 5a8513360c
commit d45499694e
6 changed files with 7176 additions and 612 deletions
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208
patch/kernel/archive/mvebu-5.14/10-mvebu-clearfog-pcie-updates.patch
View File

@ -1,17 +1,18 @@
From 527312a74d9d85ba9520c8cb2979004f6d23c4da Mon Sep 17 00:00:00 2001
From 49853eacbe2c75761c34e6198e5c3eec142a8d7c Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Tue, 29 Nov 2016 10:13:46 +0000
Subject: [PATCH] mvebu/clearfog pcie updates
Subject: mvebu/clearfog pcie updates
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
drivers/pci/controller/pci-mvebu.c | 112 ++++++++++++++++++++++++++++-
drivers/pci/pci-bridge-emul.c | 83 ++++++++++++---------
drivers/pci/pci-bridge-emul.h | 15 ++++
drivers/pci/controller/pci-mvebu.c | 112 ++++++++++++++++++++++++++++++++++++-
drivers/pci/pci-bridge-emul.c | 2 +
drivers/pci/pcie/aspm.c | 6 ++
drivers/pci/pcie/portdrv_core.c | 2 +
5 files changed, 184 insertions(+), 34 deletions(-)
4 files changed, 121 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index ed13e81cd691..2dc9f457bc76 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -52,7 +52,14 @@
@ -29,7 +30,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
#define PCIE_CTRL_OFF 0x1a00
#define PCIE_CTRL_X1_MODE 0x0001
#define PCIE_STAT_OFF 0x1a04
@@ -430,6 +437,54 @@ static void mvebu_pcie_handle_membase_ch
@@ -430,6 +437,54 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port)
&port->memwin);
}
@ -84,7 +85,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
static pci_bridge_emul_read_status_t
mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
int reg, u32 *value)
@@ -475,6 +530,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(str
@@ -475,6 +530,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
return PCI_BRIDGE_EMUL_HANDLED;
}
@ -115,7 +116,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
static void
mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
int reg, u32 old, u32 new, u32 mask)
@@ -492,7 +571,8 @@ mvebu_pci_bridge_emul_base_conf_write(st
@@ -492,7 +571,8 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
mvebu_pcie_handle_iobase_change(port);
if ((old ^ new) & PCI_COMMAND_MEMORY)
mvebu_pcie_handle_membase_change(port);
@ -125,7 +126,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
break;
}
@@ -515,6 +595,11 @@ mvebu_pci_bridge_emul_base_conf_write(st
@@ -515,6 +595,11 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
mvebu_pcie_handle_iobase_change(port);
break;
@ -137,7 +138,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
case PCI_PRIMARY_BUS:
mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus);
break;
@@ -532,6 +617,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
@@ -532,6 +617,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
switch (reg) {
case PCI_EXP_DEVCTL:
@ -148,7 +149,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/*
* Armada370 data says these bits must always
* be zero when in root complex mode.
@@ -557,6 +646,25 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
@@ -557,6 +646,25 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA);
break;
@ -174,7 +175,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
}
}
@@ -564,6 +672,8 @@ static struct pci_bridge_emul_ops mvebu_
@@ -564,6 +672,8 @@ static struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = {
.write_base = mvebu_pci_bridge_emul_base_conf_write,
.read_pcie = mvebu_pci_bridge_emul_pcie_conf_read,
.write_pcie = mvebu_pci_bridge_emul_pcie_conf_write,
@ -183,9 +184,11 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
};
/*
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index fbff7da94245..50b1b48f6e0d 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -151,6 +151,7 @@ static const struct pci_bridge_reg_behav
@@ -153,6 +153,7 @@ struct pci_bridge_reg_behavior pci_regs_behavior[PCI_STD_HEADER_SIZEOF / 4] = {
.rw = (GENMASK(7, 0) |
((PCI_BRIDGE_CTL_PARITY |
PCI_BRIDGE_CTL_SERR |
@ -193,7 +196,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PCI_BRIDGE_CTL_ISA |
PCI_BRIDGE_CTL_VGA |
PCI_BRIDGE_CTL_MASTER_ABORT |
@@ -264,6 +265,7 @@ int pci_bridge_emul_init(struct pci_brid
@@ -269,6 +270,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
bridge->conf.cache_line_size = 0x10;
bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);
@ -201,171 +204,11 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
sizeof(pci_regs_behavior),
GFP_KERNEL);
@@ -323,25 +325,26 @@ int pci_bridge_emul_conf_read(struct pci
__le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) {
- *value = 0;
- return PCIBIOS_SUCCESSFUL;
- }
-
- if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END) {
+ if (reg < PCI_CAP_PCIE_START) {
+ read_op = bridge->ops->read_base;
+ cfgspace = (__le32 *) &bridge->conf;
+ behavior = bridge->pci_regs_behavior;
+ } else if (!bridge->has_pcie) {
*value = 0;
return PCIBIOS_SUCCESSFUL;
- }
-
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
+ } else if (reg < PCI_CAP_PCIE_END) {
reg -= PCI_CAP_PCIE_START;
read_op = bridge->ops->read_pcie;
cfgspace = (__le32 *) &bridge->pcie_conf;
behavior = bridge->pcie_cap_regs_behavior;
+ } else if (reg < 0x100) {
+ *value = 0;
+ return PCIBIOS_SUCCESSFUL;
} else {
- read_op = bridge->ops->read_base;
- cfgspace = (__le32 *) &bridge->conf;
- behavior = bridge->pci_regs_behavior;
+ reg -= 0x100;
+ read_op = bridge->ops->read_ext;
+ cfgspace = NULL;
+ behavior = NULL;
}
if (read_op)
@@ -349,15 +352,20 @@ int pci_bridge_emul_conf_read(struct pci
else
ret = PCI_BRIDGE_EMUL_NOT_HANDLED;
- if (ret == PCI_BRIDGE_EMUL_NOT_HANDLED)
- *value = le32_to_cpu(cfgspace[reg / 4]);
+ if (ret == PCI_BRIDGE_EMUL_NOT_HANDLED) {
+ if (cfgspace)
+ *value = le32_to_cpu(cfgspace[reg / 4]);
+ else
+ *value = 0;
+ }
/*
* Make sure we never return any reserved bit with a value
* different from 0.
*/
- *value &= behavior[reg / 4].ro | behavior[reg / 4].rw |
- behavior[reg / 4].w1c;
+ if (behavior)
+ *value &= behavior[reg / 4].ro | behavior[reg / 4].rw |
+ behavior[reg / 4].w1c;
if (size == 1)
*value = (*value >> (8 * (where & 3))) & 0xff;
@@ -385,12 +393,6 @@ int pci_bridge_emul_conf_write(struct pc
__le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END)
- return PCIBIOS_SUCCESSFUL;
-
- if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END)
- return PCIBIOS_SUCCESSFUL;
-
shift = (where & 0x3) * 8;
if (size == 4)
@@ -406,27 +408,42 @@ int pci_bridge_emul_conf_write(struct pc
if (ret != PCIBIOS_SUCCESSFUL)
return ret;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
+ if (reg < PCI_CAP_PCIE_START) {
+ write_op = bridge->ops->write_base;
+ cfgspace = (__le32 *) &bridge->conf;
+ behavior = bridge->pci_regs_behavior;
+ } else if (!bridge->has_pcie) {
+ return PCIBIOS_SUCCESSFUL;
+ } else if (reg < PCI_CAP_PCIE_END) {
reg -= PCI_CAP_PCIE_START;
write_op = bridge->ops->write_pcie;
cfgspace = (__le32 *) &bridge->pcie_conf;
behavior = bridge->pcie_cap_regs_behavior;
+ } else if (reg < 0x100) {
+ return PCIBIOS_SUCCESSFUL;
} else {
- write_op = bridge->ops->write_base;
- cfgspace = (__le32 *) &bridge->conf;
- behavior = bridge->pci_regs_behavior;
+ reg -= 0x100;
+ write_op = bridge->ops->write_ext;
+ cfgspace = NULL;
+ behavior = NULL;
}
- /* Keep all bits, except the RW bits */
- new = old & (~mask | ~behavior[reg / 4].rw);
+ if (behavior) {
+ /* Keep all bits, except the RW bits */
+ new = old & (~mask | ~behavior[reg / 4].rw);
- /* Update the value of the RW bits */
- new |= (value << shift) & (behavior[reg / 4].rw & mask);
+ /* Update the value of the RW bits */
+ new |= (value << shift) & (behavior[reg / 4].rw & mask);
- /* Clear the W1C bits */
- new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));
+ /* Clear the W1C bits */
+ new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));
+ } else {
+ new = old & ~mask;
+ new |= (value << shift) & mask;
+ }
- cfgspace[reg / 4] = cpu_to_le32(new);
+ if (cfgspace)
+ cfgspace[reg / 4] = cpu_to_le32(new);
if (write_op)
write_op(bridge, reg, old, new, mask);
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -90,6 +90,14 @@ struct pci_bridge_emul_ops {
*/
pci_bridge_emul_read_status_t (*read_pcie)(struct pci_bridge_emul *bridge,
int reg, u32 *value);
+
+ /*
+ * Same as ->read_base(), except it is for reading from the
+ * PCIe extended capability configuration space.
+ */
+ pci_bridge_emul_read_status_t (*read_ext)(struct pci_bridge_emul *bridge,
+ int reg, u32 *value);
+
/*
* Called when writing to the regular PCI bridge configuration
* space. old is the current value, new is the new value being
@@ -105,6 +113,13 @@ struct pci_bridge_emul_ops {
*/
void (*write_pcie)(struct pci_bridge_emul *bridge, int reg,
u32 old, u32 new, u32 mask);
+
+ /*
+ * Same as ->write_base(), except it is for writing from the
+ * PCIe extended capability configuration space.
+ */
+ void (*write_ext)(struct pci_bridge_emul *bridge, int reg,
+ u32 old, u32 new, u32 mask);
};
struct pci_bridge_reg_behavior;
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 013a47f587ce..26ee590caec0 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -578,6 +578,12 @@ static void pcie_aspm_cap_init(struct pc
@@ -578,6 +578,12 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap);
pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_lnkctl);
pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl);
@ -378,9 +221,11 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/*
* Setup L0s state
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index e1fed6649c41..a50dac9f8d39 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -325,6 +325,7 @@ int pcie_port_device_register(struct pci
@@ -322,6 +322,7 @@ int pcie_port_device_register(struct pci_dev *dev)
/* Get and check PCI Express port services */
capabilities = get_port_device_capability(dev);
@ -388,7 +233,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
if (!capabilities)
return 0;
@@ -337,6 +338,7 @@ int pcie_port_device_register(struct pci
@@ -334,6 +335,7 @@ int pcie_port_device_register(struct pci_dev *dev)
* if that is to be used.
*/
status = pcie_init_service_irqs(dev, irqs, capabilities);
@ -396,3 +241,6 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
if (status) {
capabilities &= PCIE_PORT_SERVICE_HP;
if (!capabilities)
--
cgit v1.2.3

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patch/kernel/archive/mvebu-5.14/12-net-dsa-mv88e6xxx.patch Normal file
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5567
patch/kernel/archive/mvebu-5.14/13-net-mvneta.patch Normal file
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patch/kernel/archive/mvebu-5.14/20-pcie-bridge-emul.patch Normal file
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@ -0,0 +1,104 @@
From a99411d3be343e87de6e89df7b96913d723b8b17 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Tue, 2 Feb 2021 13:45:28 +0000
Subject: PCI: pci-bridge-emul: re-arrange register tests
Re-arrange the tests for which sets of registers are being accessed
so that it is easier to add further regions later. No functional
change.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/pci/pci-bridge-emul.c | 53 ++++++++++++++++++++++---------------------
1 file changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index fdaf86a888b7..9988078e7b0e 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -328,25 +328,25 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
__le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) {
- *value = 0;
- return PCIBIOS_SUCCESSFUL;
- }
-
- if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END) {
+ if (reg < PCI_BRIDGE_CONF_END) {
+ /* Emulated PCI space */
+ read_op = bridge->ops->read_base;
+ cfgspace = (__le32 *) &bridge->conf;
+ behavior = bridge->pci_regs_behavior;
+ } else if (!bridge->has_pcie) {
+ /* PCIe space is not implemented, and no PCI capabilities */
*value = 0;
return PCIBIOS_SUCCESSFUL;
- }
-
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
+ } else if (reg < PCI_CAP_PCIE_END) {
+ /* Our emulated PCIe capability */
reg -= PCI_CAP_PCIE_START;
read_op = bridge->ops->read_pcie;
cfgspace = (__le32 *) &bridge->pcie_conf;
behavior = bridge->pcie_cap_regs_behavior;
} else {
- read_op = bridge->ops->read_base;
- cfgspace = (__le32 *) &bridge->conf;
- behavior = bridge->pci_regs_behavior;
+ /* Beyond our PCIe space */
+ *value = 0;
+ return PCIBIOS_SUCCESSFUL;
}
if (read_op)
@@ -390,11 +390,23 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
__le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END)
+ if (reg < PCI_BRIDGE_CONF_END) {
+ /* Emulated PCI space */
+ write_op = bridge->ops->write_base;
+ cfgspace = (__le32 *) &bridge->conf;
+ behavior = bridge->pci_regs_behavior;
+ } else if (!bridge->has_pcie) {
+ /* PCIe space is not implemented, and no PCI capabilities */
return PCIBIOS_SUCCESSFUL;
-
- if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END)
+ } else if (reg < PCI_CAP_PCIE_END) {
+ /* Our emulated PCIe capability */
+ reg -= PCI_CAP_PCIE_START;
+ write_op = bridge->ops->write_pcie;
+ cfgspace = (__le32 *) &bridge->pcie_conf;
+ behavior = bridge->pcie_cap_regs_behavior;
+ } else {
return PCIBIOS_SUCCESSFUL;
+ }
shift = (where & 0x3) * 8;
@@ -411,17 +423,6 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
if (ret != PCIBIOS_SUCCESSFUL)
return ret;
- if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
- reg -= PCI_CAP_PCIE_START;
- write_op = bridge->ops->write_pcie;
- cfgspace = (__le32 *) &bridge->pcie_conf;
- behavior = bridge->pcie_cap_regs_behavior;
- } else {
- write_op = bridge->ops->write_base;
- cfgspace = (__le32 *) &bridge->conf;
- behavior = bridge->pci_regs_behavior;
- }
-
/* Keep all bits, except the RW bits */
new = old & (~mask | ~behavior[reg / 4].rw);
--
cgit v1.2.3

145
patch/kernel/archive/mvebu-5.14/21-pcie-bridge-emul.patch Normal file
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@ -0,0 +1,145 @@
From bab91927c8694e5f3a7e834343d2ec7163da4988 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Tue, 2 Feb 2021 13:57:04 +0000
Subject: PCI: pci-bridge-emul: add support for PCIe extended capabilities
Add support for PCIe extended capabilities, which we just redirect to
the emulating driver.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/pci/pci-bridge-emul.c | 52 +++++++++++++++++++++++++++++++------------
drivers/pci/pci-bridge-emul.h | 15 +++++++++++++
2 files changed, 53 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 9988078e7b0e..fbff7da94245 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -343,10 +343,16 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
read_op = bridge->ops->read_pcie;
cfgspace = (__le32 *) &bridge->pcie_conf;
behavior = bridge->pcie_cap_regs_behavior;
- } else {
- /* Beyond our PCIe space */
+ } else if (reg < PCI_CFG_SPACE_SIZE) {
+ /* Rest of PCI space not implemented */
*value = 0;
return PCIBIOS_SUCCESSFUL;
+ } else {
+ /* PCIe extended capability space */
+ reg -= PCI_CFG_SPACE_SIZE;
+ read_op = bridge->ops->read_ext;
+ cfgspace = NULL;
+ behavior = NULL;
}
if (read_op)
@@ -354,15 +360,20 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
else
ret = PCI_BRIDGE_EMUL_NOT_HANDLED;
- if (ret == PCI_BRIDGE_EMUL_NOT_HANDLED)
- *value = le32_to_cpu(cfgspace[reg / 4]);
+ if (ret == PCI_BRIDGE_EMUL_NOT_HANDLED) {
+ if (cfgspace)
+ *value = le32_to_cpu(cfgspace[reg / 4]);
+ else
+ *value = 0;
+ }
/*
* Make sure we never return any reserved bit with a value
* different from 0.
*/
- *value &= behavior[reg / 4].ro | behavior[reg / 4].rw |
- behavior[reg / 4].w1c;
+ if (behavior)
+ *value &= behavior[reg / 4].ro | behavior[reg / 4].rw |
+ behavior[reg / 4].w1c;
if (size == 1)
*value = (*value >> (8 * (where & 3))) & 0xff;
@@ -404,8 +415,15 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
write_op = bridge->ops->write_pcie;
cfgspace = (__le32 *) &bridge->pcie_conf;
behavior = bridge->pcie_cap_regs_behavior;
- } else {
+ } else if (reg < PCI_CFG_SPACE_SIZE) {
+ /* Rest of PCI space not implemented */
return PCIBIOS_SUCCESSFUL;
+ } else {
+ /* PCIe extended capability space */
+ reg -= PCI_CFG_SPACE_SIZE;
+ write_op = bridge->ops->write_ext;
+ cfgspace = NULL;
+ behavior = NULL;
}
shift = (where & 0x3) * 8;
@@ -423,16 +441,22 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
if (ret != PCIBIOS_SUCCESSFUL)
return ret;
- /* Keep all bits, except the RW bits */
- new = old & (~mask | ~behavior[reg / 4].rw);
+ if (behavior) {
+ /* Keep all bits, except the RW bits */
+ new = old & (~mask | ~behavior[reg / 4].rw);
- /* Update the value of the RW bits */
- new |= (value << shift) & (behavior[reg / 4].rw & mask);
+ /* Update the value of the RW bits */
+ new |= (value << shift) & (behavior[reg / 4].rw & mask);
- /* Clear the W1C bits */
- new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));
+ /* Clear the W1C bits */
+ new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));
+ } else {
+ new = old & ~mask;
+ new |= (value << shift) & mask;
+ }
- cfgspace[reg / 4] = cpu_to_le32(new);
+ if (cfgspace)
+ cfgspace[reg / 4] = cpu_to_le32(new);
if (write_op)
write_op(bridge, reg, old, new, mask);
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index b31883022a8e..5f64560aaa26 100644
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -90,6 +90,14 @@ struct pci_bridge_emul_ops {
*/
pci_bridge_emul_read_status_t (*read_pcie)(struct pci_bridge_emul *bridge,
int reg, u32 *value);
+
+ /*
+ * Same as ->read_base(), except it is for reading from the
+ * PCIe extended capability configuration space.
+ */
+ pci_bridge_emul_read_status_t (*read_ext)(struct pci_bridge_emul *bridge,
+ int reg, u32 *value);
+
/*
* Called when writing to the regular PCI bridge configuration
* space. old is the current value, new is the new value being
@@ -105,6 +113,13 @@ struct pci_bridge_emul_ops {
*/
void (*write_pcie)(struct pci_bridge_emul *bridge, int reg,
u32 old, u32 new, u32 mask);
+
+ /*
+ * Same as ->write_base(), except it is for writing from the
+ * PCIe extended capability configuration space.
+ */
+ void (*write_ext)(struct pci_bridge_emul *bridge, int reg,
+ u32 old, u32 new, u32 mask);
};
struct pci_bridge_reg_behavior;
--
cgit v1.2.3

432
patch/kernel/archive/mvebu-5.14/402-sfp-display-SFP-module-information.patch
View File

@ -1,432 +0,0 @@
From 88e942a0b703fe54dad925f27f033869e4f10fba Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Sun, 13 Sep 2015 01:06:31 +0100
Subject: [PATCH] net: sfp: display SFP module information [*not for
mainline*]
Display SFP module information verbosely, splitting the generic parts
into a separate file.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
drivers/net/phy/Makefile | 2 +-
drivers/net/phy/sff.c | 114 ++++++++++++++++++++
drivers/net/phy/sff.h | 16 +++
drivers/net/phy/sfp.c | 228 +++++++++++++++++++++++++++++++++++++--
4 files changed, 349 insertions(+), 11 deletions(-)
create mode 100644 drivers/net/phy/sff.c
create mode 100644 drivers/net/phy/sff.h
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_PHYLIB) += libphy.o
obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o
-obj-$(CONFIG_SFP) += sfp.o
+obj-$(CONFIG_SFP) += sff.o sfp.o
sfp-obj-$(CONFIG_SFP) += sfp-bus.o
obj-y += $(sfp-obj-y) $(sfp-obj-m)
--- /dev/null
+++ b/drivers/net/phy/sff.c
@@ -0,0 +1,114 @@
+#include <linux/kernel.h>
+#include <linux/sfp.h>
+#include "sff.h"
+
+const char *sff_link_len(char *buf, size_t size, unsigned int length,
+ unsigned int multiplier)
+{
+ if (length == 0)
+ return "unsupported/unspecified";
+
+ if (length == 255) {
+ *buf++ = '>';
+ size -= 1;
+ length -= 1;
+ }
+
+ length *= multiplier;
+
+ if (length >= 1000)
+ snprintf(buf, size, "%u.%0*ukm",
+ length / 1000,
+ multiplier > 100 ? 1 :
+ multiplier > 10 ? 2 : 3,
+ length % 1000);
+ else
+ snprintf(buf, size, "%um", length);
+
+ return buf;
+}
+EXPORT_SYMBOL_GPL(sff_link_len);
+
+const char *sff_bitfield(char *buf, size_t size,
+ const struct sff_bitfield *bits, unsigned int val)
+{
+ char *p = buf;
+ int n;
+
+ *p = '\0';
+ while (bits->mask) {
+ if ((val & bits->mask) == bits->val) {
+ n = snprintf(p, size, "%s%s",
+ buf != p ? ", " : "",
+ bits->str);
+ if (n == size)
+ break;
+ p += n;
+ size -= n;
+ }
+ bits++;
+ }
+
+ return buf;
+}
+EXPORT_SYMBOL_GPL(sff_bitfield);
+
+const char *sff_connector(unsigned int connector)
+{
+ switch (connector) {
+ case SFF8024_CONNECTOR_UNSPEC:
+ return "unknown/unspecified";
+ case SFF8024_CONNECTOR_SC:
+ return "SC";
+ case SFF8024_CONNECTOR_FIBERJACK:
+ return "Fiberjack";
+ case SFF8024_CONNECTOR_LC:
+ return "LC";
+ case SFF8024_CONNECTOR_MT_RJ:
+ return "MT-RJ";
+ case SFF8024_CONNECTOR_MU:
+ return "MU";
+ case SFF8024_CONNECTOR_SG:
+ return "SG";
+ case SFF8024_CONNECTOR_OPTICAL_PIGTAIL:
+ return "Optical pigtail";
+ case SFF8024_CONNECTOR_MPO_1X12:
+ return "MPO 1X12";
+ case SFF8024_CONNECTOR_MPO_2X16:
+ return "MPO 2X16";
+ case SFF8024_CONNECTOR_HSSDC_II:
+ return "HSSDC II";
+ case SFF8024_CONNECTOR_COPPER_PIGTAIL:
+ return "Copper pigtail";
+ case SFF8024_CONNECTOR_RJ45:
+ return "RJ45";
+ case SFF8024_CONNECTOR_MXC_2X16:
+ return "MXC 2X16";
+ default:
+ return "unknown";
+ }
+}
+EXPORT_SYMBOL_GPL(sff_connector);
+
+const char *sff_encoding(unsigned int encoding)
+{
+ switch (encoding) {
+ case SFF8024_ENCODING_UNSPEC:
+ return "unspecified";
+ case SFF8024_ENCODING_8472_64B66B:
+ return "64b66b";
+ case SFF8024_ENCODING_8B10B:
+ return "8b10b";
+ case SFF8024_ENCODING_4B5B:
+ return "4b5b";
+ case SFF8024_ENCODING_NRZ:
+ return "NRZ";
+ case SFF8024_ENCODING_8472_MANCHESTER:
+ return "MANCHESTER";
+ default:
+ return "unknown";
+ }
+}
+EXPORT_SYMBOL_GPL(sff_encoding);
+
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/net/phy/sff.h
@@ -0,0 +1,16 @@
+#ifndef SFF_H
+#define SFF_H
+
+struct sff_bitfield {
+ unsigned int mask;
+ unsigned int val;
+ const char *str;
+};
+
+const char *sff_link_len(char *buf, size_t size, unsigned int length,
+ unsigned int multiplier);
+const char *sff_bitfield(char *buf, size_t size,
+ const struct sff_bitfield *bits, unsigned int val);
+const char *sff_connector(unsigned int connector);
+const char *sff_encoding(unsigned int encoding);
+#endif
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -17,6 +17,7 @@
#include <linux/slab.h>
#include <linux/workqueue.h>
+#include "sff.h"
#include "sfp.h"
#include "swphy.h"
@@ -1363,6 +1364,114 @@ static void sfp_hwmon_exit(struct sfp *s
}
#endif
+static const struct sff_bitfield sfp_options[] = {
+ {
+ .mask = SFP_OPTIONS_HIGH_POWER_LEVEL,
+ .val = SFP_OPTIONS_HIGH_POWER_LEVEL,
+ .str = "hpl",
+ }, {
+ .mask = SFP_OPTIONS_PAGING_A2,
+ .val = SFP_OPTIONS_PAGING_A2,
+ .str = "paginga2",
+ }, {
+ .mask = SFP_OPTIONS_RETIMER,
+ .val = SFP_OPTIONS_RETIMER,
+ .str = "retimer",
+ }, {
+ .mask = SFP_OPTIONS_COOLED_XCVR,
+ .val = SFP_OPTIONS_COOLED_XCVR,
+ .str = "cooled",
+ }, {
+ .mask = SFP_OPTIONS_POWER_DECL,
+ .val = SFP_OPTIONS_POWER_DECL,
+ .str = "powerdecl",
+ }, {
+ .mask = SFP_OPTIONS_RX_LINEAR_OUT,
+ .val = SFP_OPTIONS_RX_LINEAR_OUT,
+ .str = "rxlinear",
+ }, {
+ .mask = SFP_OPTIONS_RX_DECISION_THRESH,
+ .val = SFP_OPTIONS_RX_DECISION_THRESH,
+ .str = "rxthresh",
+ }, {
+ .mask = SFP_OPTIONS_TUNABLE_TX,
+ .val = SFP_OPTIONS_TUNABLE_TX,
+ .str = "tunabletx",
+ }, {
+ .mask = SFP_OPTIONS_RATE_SELECT,
+ .val = SFP_OPTIONS_RATE_SELECT,
+ .str = "ratesel",
+ }, {
+ .mask = SFP_OPTIONS_TX_DISABLE,
+ .val = SFP_OPTIONS_TX_DISABLE,
+ .str = "txdisable",
+ }, {
+ .mask = SFP_OPTIONS_TX_FAULT,
+ .val = SFP_OPTIONS_TX_FAULT,
+ .str = "txfault",
+ }, {
+ .mask = SFP_OPTIONS_LOS_INVERTED,
+ .val = SFP_OPTIONS_LOS_INVERTED,
+ .str = "los-",
+ }, {
+ .mask = SFP_OPTIONS_LOS_NORMAL,
+ .val = SFP_OPTIONS_LOS_NORMAL,
+ .str = "los+",
+ }, { }
+};
+
+static const struct sff_bitfield diagmon[] = {
+ {
+ .mask = SFP_DIAGMON_DDM,
+ .val = SFP_DIAGMON_DDM,
+ .str = "ddm",
+ }, {
+ .mask = SFP_DIAGMON_INT_CAL,
+ .val = SFP_DIAGMON_INT_CAL,
+ .str = "intcal",
+ }, {
+ .mask = SFP_DIAGMON_EXT_CAL,
+ .val = SFP_DIAGMON_EXT_CAL,
+ .str = "extcal",
+ }, {
+ .mask = SFP_DIAGMON_RXPWR_AVG,
+ .val = SFP_DIAGMON_RXPWR_AVG,
+ .str = "rxpwravg",
+ }, { }
+};
+
+static const struct sff_bitfield sfp_enhopts[] = {
+ {
+ .mask = SFP_ENHOPTS_ALARMWARN,
+ .val = SFP_ENHOPTS_ALARMWARN,
+ .str = "alarmwarn",
+ }, {
+ .mask = SFP_ENHOPTS_SOFT_TX_DISABLE,
+ .val = SFP_ENHOPTS_SOFT_TX_DISABLE,
+ .str = "soft_tx_dis",
+ }, {
+ .mask = SFP_ENHOPTS_SOFT_TX_FAULT,
+ .val = SFP_ENHOPTS_SOFT_TX_FAULT,
+ .str = "soft_tx_fault",
+ }, {
+ .mask = SFP_ENHOPTS_SOFT_RX_LOS,
+ .val = SFP_ENHOPTS_SOFT_RX_LOS,
+ .str = "soft_rx_los",
+ }, {
+ .mask = SFP_ENHOPTS_SOFT_RATE_SELECT,
+ .val = SFP_ENHOPTS_SOFT_RATE_SELECT,
+ .str = "soft_rs",
+ }, {
+ .mask = SFP_ENHOPTS_APP_SELECT_SFF8079,
+ .val = SFP_ENHOPTS_APP_SELECT_SFF8079,
+ .str = "app_sel",
+ }, {
+ .mask = SFP_ENHOPTS_SOFT_RATE_SFF8431,
+ .val = SFP_ENHOPTS_SOFT_RATE_SFF8431,
+ .str = "soft_r8431",
+ }, { }
+};
+
/* Helpers */
static void sfp_module_tx_disable(struct sfp *sfp)
{
@@ -1664,6 +1773,110 @@ static int sfp_cotsworks_fixup_check(str
return 0;
}
+static void sfp_print_module_info(struct sfp *sfp, const struct sfp_eeprom_id *id, bool cotsworks)
+{
+ unsigned int br_nom, br_min, br_max;
+ char date[9];
+ char options[80];
+
+ /* Cotsworks also gets the date code wrong. */
+ date[0] = id->ext.datecode[4 - 2 * cotsworks];
+ date[1] = id->ext.datecode[5 - 2 * cotsworks];
+ date[2] = '-';
+ date[3] = id->ext.datecode[2 + 2 * cotsworks];
+ date[4] = id->ext.datecode[3 + 2 * cotsworks];
+ date[5] = '-';
+ date[6] = id->ext.datecode[0];
+ date[7] = id->ext.datecode[1];
+ date[8] = '\0';
+
+ if (id->base.br_nominal == 0) {
+ br_min = br_nom = br_max = 0;
+ } else if (id->base.br_nominal == 255) {
+ br_nom = 250 * id->ext.br_max;
+ br_max = br_nom + br_nom * id->ext.br_min / 100;
+ br_min = br_nom - br_nom * id->ext.br_min / 100;
+ } else {
+ br_nom = id->base.br_nominal * 100;
+ br_min = br_nom - id->base.br_nominal * id->ext.br_min;
+ br_max = br_nom + id->base.br_nominal * id->ext.br_max;
+ }
+
+ dev_info(sfp->dev, "module %.*s %.*s rev %.*s sn %.*s dc %s\n",
+ (int)sizeof(id->base.vendor_name), id->base.vendor_name,
+ (int)sizeof(id->base.vendor_pn), id->base.vendor_pn,
+ (int)sizeof(id->base.vendor_rev), id->base.vendor_rev,
+ (int)sizeof(id->ext.vendor_sn), id->ext.vendor_sn, date);
+ dev_info(sfp->dev, " %s connector, encoding %s, bitrate %u.%03u (%u.%03u-%u.%03u) Gbps\n",
+ sff_connector(id->base.connector),
+ sff_encoding(id->base.encoding),
+ br_nom / 1000, br_nom % 1000,
+ br_min / 1000, br_min % 1000, br_max / 1000, br_max % 1000);
+ dev_info(sfp->dev, " 1000BaseSX%c 1000BaseLX%c 1000BaseCX%c 1000BaseT%c 100BaseLX%c 100BaseFX%c BaseBX10%c BasePX%c\n",
+ id->base.e1000_base_sx ? '+' : '-',
+ id->base.e1000_base_lx ? '+' : '-',
+ id->base.e1000_base_cx ? '+' : '-',
+ id->base.e1000_base_t ? '+' : '-',
+ id->base.e100_base_lx ? '+' : '-',
+ id->base.e100_base_fx ? '+' : '-',
+ id->base.e_base_bx10 ? '+' : '-',
+ id->base.e_base_px ? '+' : '-');
+ dev_info(sfp->dev, " 10GBaseSR%c 10GBaseLR%c 10GBaseLRM%c 10GBaseER%c\n",
+ id->base.e10g_base_sr ? '+' : '-',
+ id->base.e10g_base_lr ? '+' : '-',
+ id->base.e10g_base_lrm ? '+' : '-',
+ id->base.e10g_base_er ? '+' : '-');
+
+ if (!id->base.sfp_ct_passive && !id->base.sfp_ct_active &&
+ !id->base.e1000_base_t) {
+ char len_9um[16], len_om[16];
+
+ dev_info(sfp->dev, " Wavelength %unm, fiber lengths:\n",
+ be16_to_cpup(&id->base.optical_wavelength));
+
+ if (id->base.link_len[0] == 255)
+ strcpy(len_9um, ">254km");
+ else if (id->base.link_len[1] && id->base.link_len[1] != 255)
+ sprintf(len_9um, "%um",
+ id->base.link_len[1] * 100);
+ else if (id->base.link_len[0])
+ sprintf(len_9um, "%ukm", id->base.link_len[0]);
+ else if (id->base.link_len[1] == 255)
+ strcpy(len_9um, ">25.4km");
+ else
+ strcpy(len_9um, "unsupported");
+
+ dev_info(sfp->dev, " 9µm SM : %s\n", len_9um);
+ dev_info(sfp->dev, " 62.5µm MM OM1: %s\n",
+ sff_link_len(len_om, sizeof(len_om),
+ id->base.link_len[3], 10));
+ dev_info(sfp->dev, " 50µm MM OM2: %s\n",
+ sff_link_len(len_om, sizeof(len_om),
+ id->base.link_len[2], 10));
+ dev_info(sfp->dev, " 50µm MM OM3: %s\n",
+ sff_link_len(len_om, sizeof(len_om),
+ id->base.link_len[5], 10));
+ dev_info(sfp->dev, " 50µm MM OM4: %s\n",
+ sff_link_len(len_om, sizeof(len_om),
+ id->base.link_len[4], 10));
+ } else {
+ char len[16];
+ dev_info(sfp->dev, " Copper length: %s\n",
+ sff_link_len(len, sizeof(len),
+ id->base.link_len[4], 1));
+ }
+
+ dev_info(sfp->dev, " Options: %s\n",
+ sff_bitfield(options, sizeof(options), sfp_options,
+ be16_to_cpu(id->ext.options)));
+ dev_info(sfp->dev, " Diagnostics: %s\n",
+ sff_bitfield(options, sizeof(options), diagmon,
+ id->ext.diagmon));
+ dev_info(sfp->dev, " EnhOpts: %s\n",
+ sff_bitfield(options, sizeof(options), sfp_enhopts,
+ id->ext.enhopts));
+}
+
static int sfp_sm_mod_probe(struct sfp *sfp, bool report)
{
/* SFP module inserted - read I2C data */
@@ -1685,9 +1898,9 @@ static int sfp_sm_mod_probe(struct sfp *
return -EAGAIN;
}
- /* Cotsworks do not seem to update the checksums when they
- * do the final programming with the final module part number,
- * serial number and date code.
+ /* Cotsworks do not seem to update the checksums when they update the
+ * module part number, serial number and date code. They also format
+ * the date code incorrectly.
*/
cotsworks = !memcmp(id.base.vendor_name, "COTSWORKS ", 16);
cotsworks_sfbg = !memcmp(id.base.vendor_pn, "SFBG", 4);
@@ -1735,14 +1948,9 @@ static int sfp_sm_mod_probe(struct sfp *
}
}
- sfp->id = id;
+ sfp_print_module_info(sfp, &id, cotsworks);
- dev_info(sfp->dev, "module %.*s %.*s rev %.*s sn %.*s dc %.*s\n",
- (int)sizeof(id.base.vendor_name), id.base.vendor_name,
- (int)sizeof(id.base.vendor_pn), id.base.vendor_pn,
- (int)sizeof(id.base.vendor_rev), id.base.vendor_rev,
- (int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn,
- (int)sizeof(id.ext.datecode), id.ext.datecode);
+ sfp->id = id;
/* Check whether we support this module */
if (!sfp->type->module_supported(&id)) {