toggle rk3588 new legacy kernel (#4888)
* toggle rk3588 new legacy kernel * enable additional drivers from radxa * change R8125 builtin * fix orangepi5 uboot build target
This commit is contained in:
Jianfeng Liu
GitHub
parent
ee11f5dbd9
commit
d3c036be10
@ -2,15 +2,16 @@
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# Automatically generated file; DO NOT EDIT.
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# Linux/arm64 5.10.110 Kernel Configuration
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#
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CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
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CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
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CONFIG_CC_IS_GCC=y
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CONFIG_GCC_VERSION=80300
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CONFIG_LD_VERSION=232000000
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CONFIG_GCC_VERSION=110300
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CONFIG_LD_VERSION=238000000
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CONFIG_CLANG_VERSION=0
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CONFIG_LLD_VERSION=0
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CONFIG_CC_CAN_LINK=y
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CONFIG_CC_CAN_LINK_STATIC=y
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CONFIG_CC_HAS_ASM_GOTO=y
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CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
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CONFIG_CC_HAS_ASM_INLINE=y
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CONFIG_IRQ_WORK=y
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CONFIG_BUILDTIME_TABLE_SORT=y
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@ -447,8 +448,10 @@ CONFIG_ARM64_CNP=y
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# ARMv8.3 architectural features
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#
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CONFIG_ARM64_PTR_AUTH=y
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CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y
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CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y
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CONFIG_AS_HAS_PAC=y
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CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y
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# end of ARMv8.3 architectural features
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#
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@ -464,8 +467,12 @@ CONFIG_ARM64_TLB_RANGE=y
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#
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CONFIG_AS_HAS_ARMV8_5=y
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CONFIG_ARM64_BTI=y
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CONFIG_ARM64_BTI_KERNEL=y
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CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y
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CONFIG_ARM64_E0PD=y
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CONFIG_ARCH_RANDOM=y
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CONFIG_ARM64_AS_HAS_MTE=y
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CONFIG_ARM64_MTE=y
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# end of ARMv8.5 architectural features
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CONFIG_ARM64_SVE=y
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@ -475,6 +482,8 @@ CONFIG_ARM64_PSEUDO_NMI=y
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CONFIG_RELOCATABLE=y
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CONFIG_RANDOMIZE_BASE=y
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CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
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CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
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CONFIG_STACKPROTECTOR_PER_TASK=y
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# end of Kernel Features
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#
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@ -567,7 +576,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
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# CPU frequency scaling drivers
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#
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CONFIG_CPUFREQ_DT=y
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CONFIG_CPUFREQ_DT_PLATDEV=y
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# CONFIG_CPUFREQ_DUMMY is not set
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CONFIG_ARM_ROCKCHIP_CPUFREQ=y
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# CONFIG_ARM_SCMI_CPUFREQ is not set
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@ -746,10 +754,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
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# end of GCOV-based kernel profiling
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CONFIG_HAVE_GCC_PLUGINS=y
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CONFIG_GCC_PLUGINS=y
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# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set
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# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
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# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
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# end of General architecture-dependent options
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CONFIG_RT_MUTEXES=y
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@ -947,6 +951,7 @@ CONFIG_GENERIC_EARLY_IOREMAP=y
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# CONFIG_IDLE_PAGE_TRACKING is not set
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CONFIG_ARCH_HAS_PTE_DEVMAP=y
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CONFIG_FRAME_VECTOR=y
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CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
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# CONFIG_PERCPU_STATS is not set
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CONFIG_ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT=y
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CONFIG_SPECULATIVE_PAGE_FAULT=y
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@ -1855,6 +1860,7 @@ CONFIG_DST_CACHE=y
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CONFIG_GRO_CELLS=y
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CONFIG_SOCK_VALIDATE_XMIT=y
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CONFIG_NET_SOCK_MSG=y
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CONFIG_NET_DEVLINK=y
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CONFIG_PAGE_POOL=y
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# CONFIG_FAILOVER is not set
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CONFIG_ETHTOOL_NETLINK=y
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@ -1918,6 +1924,7 @@ CONFIG_PCIE_DW_HOST=y
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CONFIG_PCIE_DW_ROCKCHIP=y
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CONFIG_PCIE_RK_THREADED_INIT=y
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# CONFIG_PCIE_DW_DMATEST is not set
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# CONFIG_PCIE_DW_ROCKCHIP_EP is not set
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# CONFIG_PCI_HISI is not set
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# CONFIG_PCIE_KIRIN is not set
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# CONFIG_PCI_MESON is not set
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@ -2099,6 +2106,7 @@ CONFIG_MTD_NAND_BBT_USING_FLASH=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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# CONFIG_MTD_SPI_NOR_MISC is not set
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_BEB_LIMIT=20
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@ -2723,6 +2731,7 @@ CONFIG_AT76C50X_USB=m
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CONFIG_WLAN_VENDOR_BROADCOM=y
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# CONFIG_B43 is not set
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# CONFIG_B43LEGACY is not set
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# CONFIG_BRCMSMAC is not set
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# CONFIG_BRCMFMAC is not set
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CONFIG_WLAN_VENDOR_CISCO=y
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CONFIG_WLAN_VENDOR_INTEL=y
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@ -2766,12 +2775,22 @@ CONFIG_MWIFIEX_USB=m
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# CONFIG_MWL8K is not set
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CONFIG_WLAN_VENDOR_MEDIATEK=y
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CONFIG_MT7601U=m
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CONFIG_MT76_CORE=m
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CONFIG_MT76_LEDS=y
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CONFIG_MT76_USB=m
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CONFIG_MT76_SDIO=m
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CONFIG_MT76x02_LIB=m
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CONFIG_MT76x02_USB=m
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CONFIG_MT76x0_COMMON=m
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CONFIG_MT76x0U=m
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CONFIG_MT76x0E=m
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CONFIG_MT76x2_COMMON=m
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CONFIG_MT76x2E=m
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CONFIG_MT76x2U=m
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CONFIG_MT7603E=m
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CONFIG_MT7615_COMMON=m
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CONFIG_MT7615E=m
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CONFIG_MT7663_USB_SDIO_COMMON=m
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CONFIG_MT7663U=m
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CONFIG_MT7663S=m
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CONFIG_MT7915E=m
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@ -3031,7 +3050,7 @@ CONFIG_TOUCHSCREEN_GOODIX=y
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CONFIG_TOUCHSCREEN_GSL3673=y
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# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
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CONFIG_TOUCHSCREEN_GT1X=y
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# CONFIG_TOUCHSCREEN_GT9XX is not set
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CONFIG_TOUCHSCREEN_GT9XX=y
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# CONFIG_TOUCHSCREEN_HIDEEP is not set
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# CONFIG_TOUCHSCREEN_ILI210X is not set
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# CONFIG_TOUCHSCREEN_S6SY761 is not set
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@ -3052,7 +3071,7 @@ CONFIG_TOUCHSCREEN_ELAN=y
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# CONFIG_TOUCHSCREEN_MK712 is not set
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# CONFIG_TOUCHSCREEN_PENMOUNT is not set
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# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
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# CONFIG_TOUCHSCREEN_RASPITS_FT5426 is not set
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CONFIG_TOUCHSCREEN_RASPITS_FT5426=y
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# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
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# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
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# CONFIG_TOUCHSCREEN_PIXCIR is not set
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@ -3740,7 +3759,7 @@ CONFIG_HWMON=y
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# CONFIG_SENSORS_OCC_P8_I2C is not set
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# CONFIG_SENSORS_PCF8591 is not set
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# CONFIG_PMBUS is not set
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# CONFIG_SENSORS_PWM_FAN is not set
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CONFIG_SENSORS_PWM_FAN=y
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# CONFIG_SENSORS_SHT15 is not set
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# CONFIG_SENSORS_SHT21 is not set
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# CONFIG_SENSORS_SHT3x is not set
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@ -3901,9 +3920,7 @@ CONFIG_MFD_CORE=y
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# CONFIG_MFD_MAX8997 is not set
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# CONFIG_MFD_MAX8998 is not set
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# CONFIG_MFD_MAX96745 is not set
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# CONFIG_MFD_MAX96752F is not set
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# CONFIG_MFD_MAX96755F is not set
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# CONFIG_MFD_MAX96776 is not set
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# CONFIG_MFD_MT6360 is not set
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# CONFIG_MFD_MT6397 is not set
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# CONFIG_MFD_MENF21BMC is not set
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@ -4261,6 +4278,7 @@ CONFIG_MEDIA_ATTACH=y
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# CONFIG_VIDEO_KS0127 is not set
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# CONFIG_VIDEO_IT6616 is not set
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CONFIG_VIDEO_LT6911UXC=y
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# CONFIG_VIDEO_LT6911UXE is not set
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CONFIG_VIDEO_LT7911D=y
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# CONFIG_VIDEO_LT7911UXC is not set
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# CONFIG_VIDEO_LT8619C is not set
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@ -4347,10 +4365,12 @@ CONFIG_VIDEO_RK_IRCUT=y
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# CONFIG_VIDEO_AR0230 is not set
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# CONFIG_VIDEO_GC02M2 is not set
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# CONFIG_VIDEO_GC08A3 is not set
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# CONFIG_VIDEO_GC1084 is not set
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# CONFIG_VIDEO_GC2053 is not set
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# CONFIG_VIDEO_GC2093 is not set
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# CONFIG_VIDEO_GC2145 is not set
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# CONFIG_VIDEO_GC2385 is not set
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# CONFIG_VIDEO_GC3003 is not set
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# CONFIG_VIDEO_GC4023 is not set
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# CONFIG_VIDEO_GC4653 is not set
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# CONFIG_VIDEO_GC4663 is not set
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@ -4386,6 +4406,7 @@ CONFIG_VIDEO_OS04A10=y
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# CONFIG_VIDEO_OS08A20 is not set
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# CONFIG_VIDEO_OV02B10 is not set
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# CONFIG_VIDEO_OV02K10 is not set
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# CONFIG_VIDEO_OV16A10 is not set
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# CONFIG_VIDEO_OV2640 is not set
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# CONFIG_VIDEO_OV2659 is not set
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# CONFIG_VIDEO_OV2680 is not set
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@ -4435,6 +4456,7 @@ CONFIG_VIDEO_OV13855=y
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# CONFIG_VIDEO_SC2239 is not set
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# CONFIG_VIDEO_SC230AI is not set
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# CONFIG_VIDEO_SC2310 is not set
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# CONFIG_VIDEO_SC2336 is not set
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# CONFIG_VIDEO_SC301IOT is not set
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# CONFIG_VIDEO_SC3336 is not set
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# CONFIG_VIDEO_SC3338 is not set
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@ -4719,7 +4741,7 @@ CONFIG_DVB_SP2=m
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# CONFIG_VGA_ARB is not set
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CONFIG_DRM=y
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CONFIG_DRM_EDID=y
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CONFIG_DRM_IGNORE_IOTCL_PERMIT=y
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# CONFIG_DRM_IGNORE_IOTCL_PERMIT is not set
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CONFIG_DRM_MIPI_DSI=y
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CONFIG_DRM_DP=y
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CONFIG_DRM_DP_AUX_CHARDEV=y
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@ -4767,6 +4789,7 @@ CONFIG_ROCKCHIP_VOP=y
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CONFIG_ROCKCHIP_VOP2=y
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CONFIG_ROCKCHIP_ANALOGIX_DP=y
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CONFIG_ROCKCHIP_CDN_DP=y
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# CONFIG_ROCKCHIP_DRM_TVE is not set
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CONFIG_ROCKCHIP_DW_HDMI=y
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CONFIG_ROCKCHIP_DW_MIPI_DSI=y
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CONFIG_ROCKCHIP_DW_DP=y
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@ -4801,7 +4824,7 @@ CONFIG_DRM_PANEL_SIMPLE=y
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# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
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# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
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# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
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# CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set
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CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
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# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
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# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
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# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set
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@ -4818,7 +4841,7 @@ CONFIG_DRM_PANEL_SIMPLE=y
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# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
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# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
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# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
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# CONFIG_DRM_PANEL_RADXA_DISPLAY_8HD is not set
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CONFIG_DRM_PANEL_RADXA_DISPLAY_8HD=y
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# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
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# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
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# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
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@ -4859,9 +4882,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y
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# CONFIG_DRM_LONTIUM_LT9611 is not set
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# CONFIG_DRM_LVDS_CODEC is not set
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# CONFIG_DRM_MAXIM_MAX96745 is not set
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# CONFIG_DRM_MAXIM_MAX96752F is not set
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# CONFIG_DRM_MAXIM_MAX96755F is not set
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# CONFIG_DRM_MAXIM_MAX96776 is not set
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# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
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# CONFIG_DRM_NWL_MIPI_DSI is not set
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# CONFIG_DRM_NXP_PTN3460 is not set
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@ -4957,7 +4978,6 @@ CONFIG_MALI_CSF_SUPPORT=y
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CONFIG_MALI_BIFROST_DEVFREQ=y
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CONFIG_MALI_BIFROST_GATOR_SUPPORT=y
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CONFIG_MALI_BIFROST_ENABLE_TRACE=y
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# CONFIG_MALI_BIFROST_DMA_FENCE is not set
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# CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND is not set
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# CONFIG_MALI_DMA_BUF_LEGACY_COMPAT is not set
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CONFIG_MALI_BIFROST_EXPERT=y
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@ -5224,6 +5244,7 @@ CONFIG_SND_SOC_ROCKCHIP_I2S=y
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CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
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# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set
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CONFIG_SND_SOC_ROCKCHIP_PDM=y
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# CONFIG_SND_SOC_ROCKCHIP_SAI is not set
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CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
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CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=y
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# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
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@ -5336,6 +5357,7 @@ CONFIG_SND_SOC_MAX98090=y
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# CONFIG_SND_SOC_RK3228 is not set
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CONFIG_SND_SOC_RK3308=y
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CONFIG_SND_SOC_RK3328=y
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# CONFIG_SND_SOC_RK730 is not set
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CONFIG_SND_SOC_RK817=y
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CONFIG_SND_SOC_RK_CODEC_DIGITAL=y
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CONFIG_SND_SOC_RL6231=y
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@ -5955,7 +5977,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
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# CONFIG_MMC_USHC is not set
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# CONFIG_MMC_USDHI6ROL0 is not set
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CONFIG_MMC_CQHCI=y
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# CONFIG_MMC_HSQ is not set
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CONFIG_MMC_HSQ=y
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# CONFIG_MMC_TOSHIBA_PCI is not set
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# CONFIG_MMC_MTK is not set
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# CONFIG_MMC_SDHCI_XENON is not set
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@ -6206,6 +6228,7 @@ CONFIG_DMABUF_HEAPS_DEFERRED_FREE=y
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CONFIG_DMABUF_HEAPS_PAGE_POOL=y
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CONFIG_DMABUF_HEAPS_SYSTEM=y
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CONFIG_DMABUF_HEAPS_CMA=y
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# CONFIG_DMABUF_HEAPS_SRAM is not set
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# CONFIG_DMABUF_HEAPS_ROCKCHIP is not set
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# end of DMABUF options
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@ -6534,6 +6557,7 @@ CONFIG_CPU_RK1808=y
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CONFIG_CPU_RK3328=y
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# CONFIG_CPU_RK3368 is not set
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CONFIG_CPU_RK3399=y
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# CONFIG_CPU_RK3528 is not set
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CONFIG_CPU_RK3568=y
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CONFIG_CPU_RK3588=y
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# end of Rockchip CPU selection
|
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@ -6608,7 +6632,7 @@ CONFIG_EXTCON=y
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# CONFIG_EXTCON_RT8973A is not set
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# CONFIG_EXTCON_SM5502 is not set
|
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# CONFIG_EXTCON_USB_GPIO is not set
|
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# CONFIG_EXTCON_USBC_VIRTUAL_PD is not set
|
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CONFIG_EXTCON_USBC_VIRTUAL_PD=y
|
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# CONFIG_MEMORY is not set
|
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CONFIG_IIO=y
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CONFIG_IIO_BUFFER=y
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@ -7613,10 +7637,6 @@ CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf"
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# Memory initialization
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#
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CONFIG_INIT_STACK_NONE=y
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||||
# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set
|
||||
# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set
|
||||
# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set
|
||||
# CONFIG_GCC_PLUGIN_STACKLEAK is not set
|
||||
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
|
||||
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
|
||||
# end of Memory initialization
|
||||
@ -7953,6 +7973,7 @@ CONFIG_NLATTR=y
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CONFIG_CLZ_TAB=y
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# CONFIG_IRQ_POLL is not set
|
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CONFIG_MPILIB=y
|
||||
CONFIG_DIMLIB=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_OID_REGISTRY=y
|
||||
CONFIG_UCS2_STRING=y
|
||||
@ -8021,6 +8042,7 @@ CONFIG_HAVE_ARCH_KGDB=y
|
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# CONFIG_KGDB is not set
|
||||
CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_HAVE_KCSAN_COMPILER=y
|
||||
# end of Generic Kernel Debugging Instruments
|
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|
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CONFIG_DEBUG_KERNEL=y
|
||||
@ -8056,8 +8078,10 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
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# CONFIG_DEBUG_PER_CPU_MAPS is not set
|
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CONFIG_HAVE_ARCH_KASAN=y
|
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CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
|
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CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y
|
||||
CONFIG_HAVE_ARCH_KASAN_VMALLOC=y
|
||||
CONFIG_CC_HAS_KASAN_GENERIC=y
|
||||
CONFIG_CC_HAS_KASAN_SW_TAGS=y
|
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CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
|
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# CONFIG_KASAN is not set
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CONFIG_HAVE_ARCH_KFENCE=y
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|
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@ -185,7 +185,7 @@ prepare_boot_configuration() {
|
||||
|
||||
if [[ $BOOT_SUPPORT_SPI == yes ]]; then
|
||||
|
||||
if [[ $BOARD != "rock-3a" ]] && [[ $BOARD != "rock-5b" ]]; then
|
||||
if [[ $BOARD != "rock-3a" ]] && [[ $BOARD != "rock-5b" ]] && [[ $BOARD != "orangepi5" ]]; then
|
||||
UBOOT_TARGET_MAP="BL31=$RKBIN_DIR/$BL31_BLOB tpl/u-boot-tpl.bin spl/u-boot-spl.bin u-boot.itb ${UBOOT_TARGET_MAP} rkspi_loader.img"
|
||||
else
|
||||
UBOOT_TARGET_MAP="${UBOOT_TARGET_MAP} rkspi_loader.img"
|
||||
|
||||
@ -21,9 +21,9 @@ case $BRANCH in
|
||||
UBOOT_USE_GCC='< 8.0'
|
||||
BOOTDIR='u-boot-rockchip64'
|
||||
KERNELDIR='linux-rockchip64'
|
||||
KERNELSOURCE='https://github.com/radxa/kernel'
|
||||
KERNELSOURCE='https://github.com/armbian/linux-rockchip'
|
||||
export KERNEL_MAJOR_MINOR="5.10" # Major and minor versions of this kernel.
|
||||
KERNELBRANCH='branch:linux-5.10-gen-rkr3.4'
|
||||
KERNELBRANCH='branch:rockchip-5.10'
|
||||
KERNELPATCHDIR='rockchip-rk3588-legacy'
|
||||
;;
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,65 +0,0 @@
|
||||
From 486523a71ed52556a9240b51d4ec9a1abb4711f8 Mon Sep 17 00:00:00 2001
|
||||
From: Ricardo Pardini <ricardo@pardini.net>
|
||||
Date: Sun, 18 Dec 2022 04:02:23 +0100
|
||||
Subject: OrangePi5; dubious `tcpm` stuff extracted from Xunlong tree
|
||||
|
||||
---
|
||||
drivers/usb/typec/tcpm/tcpm.c | 15 ++++------
|
||||
1 file changed, 6 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c
|
||||
index 4714f7cd59e7..bf84a1ef4a3d 100644
|
||||
--- a/drivers/usb/typec/tcpm/tcpm.c
|
||||
+++ b/drivers/usb/typec/tcpm/tcpm.c
|
||||
@@ -2944,18 +2944,15 @@ static void tcpm_pd_rx_handler(struct kthread_work *work)
|
||||
(port->data_role == TYPEC_HOST)) {
|
||||
tcpm_log(port,
|
||||
"Data role mismatch, initiating error recovery");
|
||||
- port->data_role = (port->data_role == TYPEC_DEVICE) ? TYPEC_HOST : TYPEC_DEVICE;
|
||||
- tcpm_set_attached_state(port, true);
|
||||
- }
|
||||
-// tcpm_set_state(port, ERROR_RECOVERY, 0);
|
||||
-// } else {
|
||||
+ tcpm_set_state(port, ERROR_RECOVERY, 0);
|
||||
+ } else {
|
||||
if (le16_to_cpu(msg->header) & PD_HEADER_EXT_HDR)
|
||||
tcpm_pd_ext_msg_request(port, msg);
|
||||
else if (cnt)
|
||||
tcpm_pd_data_request(port, msg);
|
||||
else
|
||||
tcpm_pd_ctrl_request(port, msg);
|
||||
-// }
|
||||
+ }
|
||||
}
|
||||
|
||||
done:
|
||||
@@ -4440,7 +4437,7 @@ static void run_state_machine(struct tcpm_port *port)
|
||||
* For now, this driver only supports SOP for DISCOVER_IDENTITY, thus using
|
||||
* port->explicit_contract.
|
||||
*/
|
||||
- if (port->explicit_contract && port->data_role == TYPEC_HOST)
|
||||
+ if (port->explicit_contract)
|
||||
mod_send_discover_delayed_work(port, 0);
|
||||
else
|
||||
port->send_discover = false;
|
||||
@@ -5967,7 +5964,7 @@ static void tcpm_init(struct tcpm_port *port)
|
||||
* Should possibly wait for VBUS to settle if it was enabled locally
|
||||
* since tcpm_reset_port() will disable VBUS.
|
||||
*/
|
||||
- port->vbus_present = true;
|
||||
+ port->vbus_present = port->tcpc->get_vbus(port->tcpc);
|
||||
if (port->vbus_present)
|
||||
port->vbus_never_low = true;
|
||||
|
||||
@@ -5998,7 +5995,7 @@ static void tcpm_init(struct tcpm_port *port)
|
||||
* Some adapters need a clean slate at startup, and won't recover
|
||||
* otherwise. So do not try to be fancy and force a clean disconnect.
|
||||
*/
|
||||
- //tcpm_set_state(port, PORT_RESET, 0);
|
||||
+ tcpm_set_state(port, PORT_RESET, 0);
|
||||
}
|
||||
|
||||
static int tcpm_port_type_set(struct typec_port *p, enum typec_port_type type)
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -1,77 +0,0 @@
|
||||
From 97a2a58f07231ce6df61ebad890306f392b34d68 Mon Sep 17 00:00:00 2001
|
||||
From: Muhammed Efe Cetin <efectn@protonmail.com>
|
||||
Date: Tue, 31 Jan 2023 23:51:40 +0300
|
||||
Subject: [PATCH] Variously HDMI improvements for OPi 5
|
||||
|
||||
---
|
||||
.../boot/dts/rockchip/rk3588s-orangepi-5.dts | 15 +++++++++++----
|
||||
.../arm64/boot/dts/rockchip/rk3588s-orangepi.dtsi | 10 ++++++++++
|
||||
2 files changed, 21 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
|
||||
index 09762fd1d..da2bf4d91 100755
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
|
||||
@@ -41,6 +41,16 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
+ hdmi0_sound: hdmi0-sound {
|
||||
+ status = "okay";
|
||||
+ compatible = "rockchip,hdmi";
|
||||
+ rockchip,mclk-fs = <128>;
|
||||
+ rockchip,card-name = "rockchip-hdmi0";
|
||||
+ rockchip,cpu = <&i2s5_8ch>;
|
||||
+ rockchip,codec = <&hdmi0>;
|
||||
+ rockchip,jack-det;
|
||||
+ };
|
||||
+
|
||||
leds: gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
@@ -90,16 +100,13 @@ rgmii_phy1: phy@1 {
|
||||
&hdmi0 {
|
||||
enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
+ cec-enable = "true";
|
||||
};
|
||||
|
||||
&hdmi0_in_vp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
-&hdmi0_sound {
|
||||
- status = "okay";
|
||||
-};
|
||||
-
|
||||
&hdptxphy_hdmi0 {
|
||||
status = "okay";
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi.dtsi
|
||||
index 28ad1d366..af25013fc 100755
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi.dtsi
|
||||
@@ -205,6 +205,10 @@ vcc5v0_usb: vcc5v0-usb {
|
||||
};
|
||||
};
|
||||
|
||||
+&av1d {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&av1d_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -594,3 +598,9 @@ &vp3 {
|
||||
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
|
||||
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
|
||||
};
|
||||
+
|
||||
+/* Fix tty terminal out of screen, and most dclk of resolutions was not supported in hdmiphy clock from parent clock by default */
|
||||
+&display_subsystem {
|
||||
+ clocks = <&hdptxphy_hdmi_clk0>;
|
||||
+ clock-names = "hdmi0_phy_pll";
|
||||
+};
|
||||
--
|
||||
2.39.1
|
||||
|
||||
@ -1,54 +0,0 @@
|
||||
From fe5717078ecc8ec52d40ba56f403803bdfaff2cd Mon Sep 17 00:00:00 2001
|
||||
From: danielpinto8zz6 <danielpinto8zz6@gmail.com>
|
||||
Date: Sat, 7 Jan 2023 15:14:14 +0000
|
||||
Subject: [PATCH] Add sata support on Orange Pi 5
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 +
|
||||
.../overlay/rockchip-rk3588-opi5-sata.dts | 21 +++++++++++++++++++
|
||||
2 files changed, 22 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-sata.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
index b4a72136bdfc..5cac681ba8a5 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
@@ -43,6 +43,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rock-5b-radxa-display-10hd.dtbo \
|
||||
rock-5b-rpi-camera-v2.dtbo \
|
||||
rock-5b-sata.dtbo \
|
||||
+ rockchip-rk3588-opi5-sata.dtbo \
|
||||
|
||||
dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
README.rockchip-overlays
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-sata.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-sata.dts
|
||||
new file mode 100644
|
||||
index 000000000000..a6cbe3106e4b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-sata.dts
|
||||
@@ -0,0 +1,21 @@
|
||||
+// Orange Pi 5 Pcie M.2 to sata
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&sata0>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@1 {
|
||||
+ target = <&pcie2x1l2>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
\ No newline at end of file
|
||||
--
|
||||
2.39.0
|
||||
|
||||
@ -1,607 +0,0 @@
|
||||
From 385db1021fd42090f6c298d79c084ec60d454f28 Mon Sep 17 00:00:00 2001
|
||||
From: Muhammed Efe Cetin <efectn@protonmail.com>
|
||||
Date: Wed, 18 Jan 2023 23:20:55 +0300
|
||||
Subject: [PATCH] Add missing I2C, SPI, PWM, UART, LCD overlays to Orange Pi 5.
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/overlay/Makefile | 19 ++++
|
||||
.../overlay/rockchip-rk3588-opi5-can1-m1.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-can2-m1.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-i2c1-m2.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-i2c1-m4.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-i2c3-m0.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-i2c5-m3.dts | 14 +++
|
||||
.../overlay/rockchip-rk3588-opi5-lcd1.dts | 88 +++++++++++++++++++
|
||||
.../overlay/rockchip-rk3588-opi5-lcd2.dts | 88 +++++++++++++++++++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm0-m1.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm1-m1.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm1-m2.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm15-m2.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm3-m0.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-pwm3-m2.dts | 13 +++
|
||||
...ockchip-rk3588-opi5-spi4-m0-cs1-spidev.dts | 23 +++++
|
||||
.../overlay/rockchip-rk3588-opi5-uart0-m2.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-uart1-m1.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-uart3-m0.dts | 13 +++
|
||||
.../overlay/rockchip-rk3588-opi5-uart4-m0.dts | 13 +++
|
||||
20 files changed, 432 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can1-m1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can2-m1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m4.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c3-m0.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c5-m3.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm0-m1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm15-m2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m0.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart0-m2.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart1-m1.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart3-m0.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart4-m0.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
index be299b03a..8e347afbf 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
@@ -51,6 +51,25 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rock-5b-rpi-camera-v2.dtbo \
|
||||
rock-5b-sata.dtbo \
|
||||
rockchip-rk3588-opi5-sata.dtbo \
|
||||
+ rockchip-rk3588-opi5-can1-m1.dtbo \
|
||||
+ rockchip-rk3588-opi5-can2-m1.dtbo \
|
||||
+ rockchip-rk3588-opi5-i2c1-m2.dtbo \
|
||||
+ rockchip-rk3588-opi5-i2c1-m4.dtbo \
|
||||
+ rockchip-rk3588-opi5-i2c3-m0.dtbo \
|
||||
+ rockchip-rk3588-opi5-i2c5-m3.dtbo \
|
||||
+ rockchip-rk3588-opi5-lcd1.dtbo \
|
||||
+ rockchip-rk3588-opi5-lcd2.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm0-m1.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm1-m1.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm1-m2.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm3-m0.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm3-m2.dtbo \
|
||||
+ rockchip-rk3588-opi5-pwm15-m2.dtbo \
|
||||
+ rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dtbo \
|
||||
+ rockchip-rk3588-opi5-uart0-m2.dtbo \
|
||||
+ rockchip-rk3588-opi5-uart1-m1.dtbo \
|
||||
+ rockchip-rk3588-opi5-uart3-m0.dtbo \
|
||||
+ rockchip-rk3588-opi5-uart4-m0.dtbo \
|
||||
|
||||
dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
README.rockchip-overlays
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can1-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can1-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000..b470f1e0f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can1-m1.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&can1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&can1m1_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can2-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can2-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000..075686874
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-can2-m1.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&can2>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&can2m1_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m2.dts
|
||||
new file mode 100644
|
||||
index 000000000..5d8e3104f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m2.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&i2c1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c1m2_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m4.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m4.dts
|
||||
new file mode 100644
|
||||
index 000000000..e581359fe
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c1-m4.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&i2c1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c1m4_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c3-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c3-m0.dts
|
||||
new file mode 100644
|
||||
index 000000000..c9fb6b4e5
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c3-m0.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&i2c3>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c3m0_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c5-m3.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c5-m3.dts
|
||||
new file mode 100644
|
||||
index 000000000..be0f852b7
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-i2c5-m3.dts
|
||||
@@ -0,0 +1,14 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&i2c5>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c5m3_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd1.dts
|
||||
new file mode 100644
|
||||
index 000000000..04ece31f0
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd1.dts
|
||||
@@ -0,0 +1,88 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&dsi1>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@1 {
|
||||
+ target = <&dsi1_panel>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@2 {
|
||||
+ target = <&dsi1_in_vp3>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@3 {
|
||||
+ target = <&hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@4 {
|
||||
+ target = <&hdmi0_sound>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@5 {
|
||||
+ target = <&hdptxphy_hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@6 {
|
||||
+ target = <&route_hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@7 {
|
||||
+ target = <&dp0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@8 {
|
||||
+ target = <&dp0_in_vp1>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@9 {
|
||||
+ target = <&dp0_in_vp2>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@10 {
|
||||
+ target = <&dp0_sound>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@11 {
|
||||
+ target = <&spdif_tx2>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd2.dts
|
||||
new file mode 100644
|
||||
index 000000000..30765cc8f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-lcd2.dts
|
||||
@@ -0,0 +1,88 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&dsi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@1 {
|
||||
+ target = <&dsi0_panel>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@2 {
|
||||
+ target = <&dsi0_in_vp2>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@3 {
|
||||
+ target = <&hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@4 {
|
||||
+ target = <&hdmi0_sound>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@5 {
|
||||
+ target = <&hdptxphy_hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@6 {
|
||||
+ target = <&route_hdmi0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@7 {
|
||||
+ target = <&dp0>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@8 {
|
||||
+ target = <&dp0_in_vp1>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@9 {
|
||||
+ target = <&dp0_in_vp2>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@10 {
|
||||
+ target = <&dp0_sound>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@11 {
|
||||
+ target = <&spdif_tx2>;
|
||||
+ __overlay__ {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm0-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm0-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000..353162ec7
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm0-m1.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm0>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm0m1_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000..e93513502
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m1.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm1m1_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m2.dts
|
||||
new file mode 100644
|
||||
index 000000000..155d0bd41
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm1-m2.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm1m2_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm15-m2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm15-m2.dts
|
||||
new file mode 100644
|
||||
index 000000000..c1b2aea10
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm15-m2.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm15>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm15m2_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m0.dts
|
||||
new file mode 100644
|
||||
index 000000000..a6a9181ab
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m0.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm3>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm3m0_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m2.dts
|
||||
new file mode 100644
|
||||
index 000000000..b70d2097e
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-pwm3-m2.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&pwm3>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm3m2_pins>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dts
|
||||
new file mode 100644
|
||||
index 000000000..513502e3d
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dts
|
||||
@@ -0,0 +1,23 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&spi4>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&spi4m0_cs1 &spi4m0_pins>;
|
||||
+
|
||||
+ spidev@0 {
|
||||
+ compatible = "rockchip,spidev";
|
||||
+ status = "okay";
|
||||
+ reg = <0>;
|
||||
+ spi-max-frequency = <50000000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart0-m2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart0-m2.dts
|
||||
new file mode 100644
|
||||
index 000000000..1d36d889d
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart0-m2.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&uart0>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart0m2_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart1-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart1-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000..909f6058f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart1-m1.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&uart1>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart1m1_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart3-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart3-m0.dts
|
||||
new file mode 100644
|
||||
index 000000000..c2e98cb61
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart3-m0.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&uart3>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart3m0_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart4-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart4-m0.dts
|
||||
new file mode 100644
|
||||
index 000000000..f47090664
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-uart4-m0.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ fragment@0 {
|
||||
+ target = <&uart4>;
|
||||
+
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart4m0_xfer>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.39.0
|
||||
|
||||
@ -1,388 +0,0 @@
|
||||
From e25ddaf6ecf5675e4e593cc69d65fcdef74279a6 Mon Sep 17 00:00:00 2001
|
||||
From: Muhammed Efe Cetin <efectn@protonmail.com>
|
||||
Date: Mon, 23 Jan 2023 22:55:55 +0300
|
||||
Subject: [PATCH] Add rockchip-rk3588-opp-oc-24ghz overlay for RK3588 boards
|
||||
|
||||
Add rockchip-rk3588-opp-oc-24ghz overlay for RK3588 boards
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 +
|
||||
.../overlay/rockchip-rk3588-opp-oc-24ghz.dts | 355 ++++++++++++++++++
|
||||
2 files changed, 356 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opp-oc-24ghz.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
index 8e347afbf..c7d53ef22 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
@@ -70,6 +70,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rockchip-rk3588-opi5-uart1-m1.dtbo \
|
||||
rockchip-rk3588-opi5-uart3-m0.dtbo \
|
||||
rockchip-rk3588-opi5-uart4-m0.dtbo \
|
||||
+ rockchip-rk3588-opp-oc-24ghz.dtbo \
|
||||
|
||||
dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
README.rockchip-overlays
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opp-oc-24ghz.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opp-oc-24ghz.dts
|
||||
new file mode 100644
|
||||
index 000000000..d329e22a3
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opp-oc-24ghz.dts
|
||||
@@ -0,0 +1,355 @@
|
||||
+// RK3588 CPU Overclock to 2.4 GHz
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ metadata {
|
||||
+ title ="Overclock Big Cores to 2.4 GHz on RK3588/RK3588S boards";
|
||||
+ compatible = "rockchip,rk3588";
|
||||
+ category = "misc";
|
||||
+ description = "Overclock Big Cores to 2.4 GHz on RK3588/RK3588S boards";
|
||||
+ };
|
||||
+
|
||||
+ fragment@0 {
|
||||
+ target = <&cluster1_opp_table>;
|
||||
+ __overlay__ {
|
||||
+ opp-408000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <408000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ opp-suspend;
|
||||
+ };
|
||||
+ opp-600000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <600000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-816000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <816000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1008000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1008000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1200000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1200000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1416000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1416000000>;
|
||||
+ opp-microvolt = <725000 725000 1050000>,
|
||||
+ <725000 725000 1050000>;
|
||||
+ opp-microvolt-L2 = <712500 712500 1050000>,
|
||||
+ <712500 712500 1050000>;
|
||||
+ opp-microvolt-L3 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L4 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L5 = <687500 687500 1050000>,
|
||||
+ <687500 687500 1050000>;
|
||||
+ opp-microvolt-L6 = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ opp-microvolt-L7 = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1608000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1608000000>;
|
||||
+ opp-microvolt = <762500 762500 1050000>,
|
||||
+ <762500 762500 1050000>;
|
||||
+ opp-microvolt-L2 = <750000 750000 1050000>,
|
||||
+ <750000 750000 1050000>;
|
||||
+ opp-microvolt-L3 = <737500 737500 1050000>,
|
||||
+ <737500 737500 1050000>;
|
||||
+ opp-microvolt-L4 = <725000 725000 1050000>,
|
||||
+ <725000 725000 1050000>;
|
||||
+ opp-microvolt-L5 = <712500 712500 1050000>,
|
||||
+ <712500 712500 1050000>;
|
||||
+ opp-microvolt-L6 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L7 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1800000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1800000000>;
|
||||
+ opp-microvolt = <850000 850000 1050000>,
|
||||
+ <850000 850000 1050000>;
|
||||
+ opp-microvolt-L1 = <837500 837500 1050000>,
|
||||
+ <837500 837500 1050000>;
|
||||
+ opp-microvolt-L2 = <825000 825000 1050000>,
|
||||
+ <825000 825000 1050000>;
|
||||
+ opp-microvolt-L3 = <812500 812500 1050000>,
|
||||
+ <812500 812500 1050000>;
|
||||
+ opp-microvolt-L4 = <800000 800000 1050000>,
|
||||
+ <800000 800000 1050000>;
|
||||
+ opp-microvolt-L5 = <787500 787500 1050000>,
|
||||
+ <787500 787500 1050000>;
|
||||
+ opp-microvolt-L6 = <775000 775000 1050000>,
|
||||
+ <775000 775000 1050000>;
|
||||
+ opp-microvolt-L7 = <762500 762500 1050000>,
|
||||
+ <762500 762500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2016000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2016000000>;
|
||||
+ opp-microvolt = <925000 925000 1050000>,
|
||||
+ <925000 925000 1050000>;
|
||||
+ opp-microvolt-L1 = <912500 912500 1050000>,
|
||||
+ <912500 912500 1050000>;
|
||||
+ opp-microvolt-L2 = <900000 900000 1050000>,
|
||||
+ <900000 900000 1050000>;
|
||||
+ opp-microvolt-L3 = <887500 887500 1050000>,
|
||||
+ <887500 887500 1050000>;
|
||||
+ opp-microvolt-L4 = <875000 875000 1050000>,
|
||||
+ <875000 875000 1050000>;
|
||||
+ opp-microvolt-L5 = <862500 862500 1050000>,
|
||||
+ <862500 862500 1050000>;
|
||||
+ opp-microvolt-L6 = <850000 850000 1050000>,
|
||||
+ <850000 850000 1050000>;
|
||||
+ opp-microvolt-L7 = <837500 837500 1050000>,
|
||||
+ <837500 837500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2208000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2208000000>;
|
||||
+ opp-microvolt = <987500 987500 1050000>,
|
||||
+ <987500 987500 1050000>;
|
||||
+ opp-microvolt-L1 = <975000 975000 1050000>,
|
||||
+ <975000 975000 1050000>;
|
||||
+ opp-microvolt-L2 = <962500 962500 1050000>,
|
||||
+ <962500 962500 1050000>;
|
||||
+ opp-microvolt-L3 = <950000 950000 1050000>,
|
||||
+ <950000 950000 1050000>;
|
||||
+ opp-microvolt-L4 = <962500 962500 1050000>,
|
||||
+ <962500 962500 1050000>;
|
||||
+ opp-microvolt-L5 = <950000 950000 1050000>,
|
||||
+ <950000 950000 1050000>;
|
||||
+ opp-microvolt-L6 = <925000 925000 1050000>,
|
||||
+ <925000 925000 1050000>;
|
||||
+ opp-microvolt-L7 = <912500 912500 1050000>,
|
||||
+ <912500 912500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2256000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2256000000>;
|
||||
+ opp-microvolt = <1000000 1000000 1050000>,
|
||||
+ <1000000 1000000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2304000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2304000000>;
|
||||
+ opp-microvolt = <1030000 1000000 1050000>,
|
||||
+ <1030000 1000000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2352000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2352000000>;
|
||||
+ opp-microvolt = <1040000 1010000 1050000>,
|
||||
+ <1040000 1010000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2400000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2400000000>;
|
||||
+ opp-microvolt = <1050000 1020000 1050000>,
|
||||
+ <1050000 1020000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@1 {
|
||||
+ target = <&cluster2_opp_table>;
|
||||
+ __overlay__ {
|
||||
+ opp-408000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <408000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ opp-suspend;
|
||||
+ };
|
||||
+ opp-600000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <600000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-816000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <816000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1008000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1008000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1200000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1200000000>;
|
||||
+ opp-microvolt = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1416000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1416000000>;
|
||||
+ opp-microvolt = <725000 725000 1050000>,
|
||||
+ <725000 725000 1050000>;
|
||||
+ opp-microvolt-L2 = <712500 712500 1050000>,
|
||||
+ <712500 712500 1050000>;
|
||||
+ opp-microvolt-L3 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L4 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L5 = <687500 687500 1050000>,
|
||||
+ <687500 687500 1050000>;
|
||||
+ opp-microvolt-L6 = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ opp-microvolt-L7 = <675000 675000 1050000>,
|
||||
+ <675000 675000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1608000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1608000000>;
|
||||
+ opp-microvolt = <762500 762500 1050000>,
|
||||
+ <762500 762500 1050000>;
|
||||
+ opp-microvolt-L2 = <750000 750000 1050000>,
|
||||
+ <750000 750000 1050000>;
|
||||
+ opp-microvolt-L3 = <737500 737500 1050000>,
|
||||
+ <737500 737500 1050000>;
|
||||
+ opp-microvolt-L4 = <725000 725000 1050000>,
|
||||
+ <725000 725000 1050000>;
|
||||
+ opp-microvolt-L5 = <712500 712500 1050000>,
|
||||
+ <712500 712500 1050000>;
|
||||
+ opp-microvolt-L6 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ opp-microvolt-L7 = <700000 700000 1050000>,
|
||||
+ <700000 700000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-1800000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <1800000000>;
|
||||
+ opp-microvolt = <850000 850000 1050000>,
|
||||
+ <850000 850000 1050000>;
|
||||
+ opp-microvolt-L1 = <837500 837500 1050000>,
|
||||
+ <837500 837500 1050000>;
|
||||
+ opp-microvolt-L2 = <825000 825000 1050000>,
|
||||
+ <825000 825000 1050000>;
|
||||
+ opp-microvolt-L3 = <812500 812500 1050000>,
|
||||
+ <812500 812500 1050000>;
|
||||
+ opp-microvolt-L4 = <800000 800000 1050000>,
|
||||
+ <800000 800000 1050000>;
|
||||
+ opp-microvolt-L5 = <787500 787500 1050000>,
|
||||
+ <787500 787500 1050000>;
|
||||
+ opp-microvolt-L6 = <775000 775000 1050000>,
|
||||
+ <775000 775000 1050000>;
|
||||
+ opp-microvolt-L7 = <762500 762500 1050000>,
|
||||
+ <762500 762500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2016000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2016000000>;
|
||||
+ opp-microvolt = <925000 925000 1050000>,
|
||||
+ <925000 925000 1050000>;
|
||||
+ opp-microvolt-L1 = <912500 912500 1050000>,
|
||||
+ <912500 912500 1050000>;
|
||||
+ opp-microvolt-L2 = <900000 900000 1050000>,
|
||||
+ <900000 900000 1050000>;
|
||||
+ opp-microvolt-L3 = <887500 887500 1050000>,
|
||||
+ <887500 887500 1050000>;
|
||||
+ opp-microvolt-L4 = <875000 875000 1050000>,
|
||||
+ <875000 875000 1050000>;
|
||||
+ opp-microvolt-L5 = <862500 862500 1050000>,
|
||||
+ <862500 862500 1050000>;
|
||||
+ opp-microvolt-L6 = <850000 850000 1050000>,
|
||||
+ <850000 850000 1050000>;
|
||||
+ opp-microvolt-L7 = <837500 837500 1050000>,
|
||||
+ <837500 837500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2208000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2208000000>;
|
||||
+ opp-microvolt = <987500 987500 1050000>,
|
||||
+ <987500 987500 1050000>;
|
||||
+ opp-microvolt-L1 = <975000 975000 1050000>,
|
||||
+ <975000 975000 1050000>;
|
||||
+ opp-microvolt-L2 = <962500 962500 1050000>,
|
||||
+ <962500 962500 1050000>;
|
||||
+ opp-microvolt-L3 = <950000 950000 1050000>,
|
||||
+ <950000 950000 1050000>;
|
||||
+ opp-microvolt-L4 = <962500 962500 1050000>,
|
||||
+ <962500 962500 1050000>;
|
||||
+ opp-microvolt-L5 = <950000 950000 1050000>,
|
||||
+ <950000 950000 1050000>;
|
||||
+ opp-microvolt-L6 = <925000 925000 1050000>,
|
||||
+ <925000 925000 1050000>;
|
||||
+ opp-microvolt-L7 = <912500 912500 1050000>,
|
||||
+ <912500 912500 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2256000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2256000000>;
|
||||
+ opp-microvolt = <1000000 1000000 1050000>,
|
||||
+ <1000000 1000000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2304000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2304000000>;
|
||||
+ opp-microvolt = <1030000 1000000 1050000>,
|
||||
+ <1030000 1000000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2352000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2352000000>;
|
||||
+ opp-microvolt = <1040000 1010000 1050000>,
|
||||
+ <1040000 1010000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ opp-2400000000 {
|
||||
+ opp-supported-hw = <0xff 0xffff>;
|
||||
+ opp-hz = /bits/ 64 <2400000000>;
|
||||
+ opp-microvolt = <1050000 1020000 1050000>,
|
||||
+ <1050000 1020000 1050000>;
|
||||
+ clock-latency-ns = <40000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.39.0
|
||||
|
||||
@ -1,42 +0,0 @@
|
||||
From 714cb0284e185509cd94f96732a4e51e23d4d22c Mon Sep 17 00:00:00 2001
|
||||
From: Muhammed Efe Cetin <efectn@protonmail.com>
|
||||
Date: Tue, 31 Jan 2023 23:55:05 +0300
|
||||
Subject: [PATCH] Disable hardware cursor for Rock 5B
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 4 ----
|
||||
1 file changed, 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||
index 8611a5a7e..3665b85c6 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||
@@ -670,25 +670,21 @@ &vepu {
|
||||
&vp0 {
|
||||
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
|
||||
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
|
||||
- cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
|
||||
};
|
||||
|
||||
&vp1 {
|
||||
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
|
||||
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
|
||||
- cursor-win-id = <ROCKCHIP_VOP2_CLUSTER1>;
|
||||
};
|
||||
|
||||
&vp2 {
|
||||
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
|
||||
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
|
||||
- cursor-win-id = <ROCKCHIP_VOP2_CLUSTER2>;
|
||||
};
|
||||
|
||||
&vp3 {
|
||||
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
|
||||
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
|
||||
- cursor-win-id = <ROCKCHIP_VOP2_CLUSTER3>;
|
||||
};
|
||||
|
||||
&u2phy2 {
|
||||
--
|
||||
2.39.1
|
||||
|
||||
@ -1,58 +0,0 @@
|
||||
From 6bcfc3bfbe91cb3999cb6cd7de5b8fc1a1132f97 Mon Sep 17 00:00:00 2001
|
||||
From: Muhammed Efe Cetin <efectn@protonmail.com>
|
||||
Date: Sun, 12 Feb 2023 11:51:18 +0300
|
||||
Subject: [PATCH] Add AP6275P overlay for Orange Pi 5
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 +
|
||||
.../rockchip-rk3588-opi5-wifi-ap6275p.dts | 25 +++++++++++++++++++
|
||||
2 files changed, 26 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-wifi-ap6275p.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
index 0c6205e2a..8f4ba408e 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
|
||||
@@ -86,6 +86,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rockchip-rk3588-opi5-uart3-m0.dtbo \
|
||||
rockchip-rk3588-opi5-uart4-m0.dtbo \
|
||||
rockchip-rk3588-opp-oc-24ghz.dtbo \
|
||||
+ rockchip-rk3588-opi5-wifi-ap6275p.dtbo \
|
||||
|
||||
dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
README.rockchip-overlays
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-wifi-ap6275p.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-wifi-ap6275p.dts
|
||||
new file mode 100644
|
||||
index 000000000..8735633ec
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3588-opi5-wifi-ap6275p.dts
|
||||
@@ -0,0 +1,25 @@
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+/ {
|
||||
+ metadata {
|
||||
+ title ="Enable AP6275P PCIe wireless module on Orange Pi 5";
|
||||
+ compatible = "rockchip,rk3588", "rockchip,rk3588s-orangepi-5";
|
||||
+ category = "misc";
|
||||
+ description = "Enable AP6275P PCIe wireless module on Orange Pi 5";
|
||||
+ };
|
||||
+
|
||||
+ fragment@0 {
|
||||
+ target = <&wireless_bluetooth>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fragment@1 {
|
||||
+ target = <&wireless_wlan>;
|
||||
+ __overlay__ {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
\ No newline at end of file
|
||||
--
|
||||
2.39.1
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-linux.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-linux.dtsi
|
||||
index d8c7c2465f77..97de58e8970f 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-linux.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-linux.dtsi
|
||||
@@ -11,9 +11,9 @@ aliases {
|
||||
mmc2 = &sdio;
|
||||
};
|
||||
|
||||
- chosen: chosen {
|
||||
- bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTUUID=614e0000-0000 rw rootwait";
|
||||
- };
|
||||
+ //chosen: chosen {
|
||||
+ // bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTUUID=614e0000-0000 rw rootwait";
|
||||
+ //};
|
||||
|
||||
cspmu: cspmu@fd10c000 {
|
||||
compatible = "rockchip,cspmu";
|
||||
Loading…
Reference in New Issue
Block a user