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sunxi-6.15: remove unused megous patches

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The-going 2025-05-31 11:51:04 +03:00 committed by Igor
parent 32aeb71980
commit d08fea5232
17 changed files with 74 additions and 1384 deletions
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45
patch/kernel/archive/sunxi-6.15/patches.megous/ASoC-rockchip-Fix-doubling-of-playback-speed-after-system-sleep.patch
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@ -1,45 +0,0 @@
From 84fb06fc26b9378299e4efcb78f406151adc658a Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Mon, 15 Aug 2022 02:23:37 +0200
Subject: ASoC: rockchip: Fix doubling of playback speed after system sleep
There is some issue with CRU on RK3399 that can be reproduced by:
- playing some audio and stopping the playback (so that runtime PM suspends I2S)
- putting system to deep sleep and resuming it (using mainline TF-A)
- playing some audio (audio plays at 2x the normal speed)
If the audio is kept playing during system sleep cycle, the issue
does not manifest. Relevant registers in CRU are identical in bug/
no-bug scenarios, so this patch is just touching the CRU registers
without actually changing anything in the end. Touching the registers
fixes the playback speed, though.
Inspired by: https://github.com/djselbeck/linux/commit/cb4be5dec3fa18c4b344c11fed3fc57aa3bea424
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
sound/soc/rockchip/rockchip_i2s.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 0a0a95b4f520..6dce1db85427 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -114,6 +114,13 @@ static int i2s_runtime_resume(struct device *dev)
if (ret)
clk_disable_unprepare(i2s->mclk);
+ if (ret == 0) {
+ unsigned long rate = clk_get_rate(i2s->mclk);
+
+ clk_set_rate(i2s->mclk, rate - 1);
+ clk_set_rate(i2s->mclk, rate);
+ }
+
return ret;
}
--
2.35.3

215
patch/kernel/archive/sunxi-6.15/patches.megous/Add-README.md-with-information-and-u-boot-patches.patch
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@ -1,215 +0,0 @@
From f2edc1414ea37037b7952e5564769cc3ac48e8f2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
Date: Tue, 22 Nov 2016 01:01:49 +0100
Subject: Add README.md with information and u-boot patches
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
...Fix-PLL1-setup-to-never-use-dividers.patch | 33 ++++
README.md | 154 ++++++++++++++++++
2 files changed, 187 insertions(+)
create mode 100644 0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch
create mode 100644 README.md
diff --git a/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch b/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch
new file mode 100644
index 000000000000..2b892e805a2b
--- /dev/null
+++ b/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch
@@ -0,0 +1,33 @@
+From 7f5071f906f79bdc99d6b4b0ccf0cb280abe740b Mon Sep 17 00:00:00 2001
+From: Ondrej Jirman <megi@xff.cz>
+Date: Tue, 20 Dec 2016 11:25:12 +0100
+Subject: [PATCH] sunxi: h3: Fix PLL1 setup to never use dividers
+
+Kernel would lower the divider on first CLK change and cause the
+lock up.
+---
+ arch/arm/mach-sunxi/clock_sun6i.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
+index 50fb302a19..91aa2a0478 100644
+--- a/arch/arm/mach-sunxi/clock_sun6i.c
++++ b/arch/arm/mach-sunxi/clock_sun6i.c
+@@ -94,11 +94,10 @@ void clock_set_pll1(unsigned int clk)
+ int k = 1;
+ int m = 1;
+
+- if (clk > 1152000000) {
+- k = 2;
+- } else if (clk > 768000000) {
++ if (clk >= 1368000000) {
+ k = 3;
+- m = 2;
++ } else if (clk >= 768000000) {
++ k = 2;
+ }
+
+ /* Switch to 24MHz clock while changing PLL1 */
+--
+2.11.0
+
diff --git a/README.md b/README.md
new file mode 100644
index 000000000000..74c4c16416d3
--- /dev/null
+++ b/README.md
@@ -0,0 +1,154 @@
+Mainline linux kernel for Orange Pi PC/PC2/PC3/One, TBS A711, PinePhone (Pro), PocketBook Touch Lux 3
+------------------------------------------------------------------------------------------------------
+
+This kernel tree is meant for:
+
+- Orange Pi One
+- Orange Pi PC
+- Orange Pi PC 2
+- Orange Pi 3
+- PinePhone 1.0, 1.1 and 1.2(a/b)
+- TBS A711 Tablet
+- PocketBook Touch Lux 3
+- Pinebook Pro
+- Pinephone Pro
+
+Features in addition to mainline:
+
+- [Orange Pi One/PC/PC2] More aggressive OPPs for CPU
+- [All] Mark one of DRM planes as a cursor plane, speeding up Xorg based desktop with modesetting driver
+- [Orange Pi One/PC/PC2] Configure on-board micro-switches to perform system power off function
+- [Orange Pi One/PC/PC2/3] HDMI audio
+- [Orange Pi 3] Ethernet
+- [TBS A711] HM5065 (back camera) / GC2145 (front camera)
+- [PinePhone] WiFi, Bluetooth, Audio, Modem power, HDMI out over USB-C, USB-C support, cameras, PMIC improvements, power management, fixes here and there
+- [PocketBook Touch Lux 3] Display and Touchscreen support
+- [Pinephone Pro] Everything
+
+Pre-built u-boot and kernels are available at https://xff.cz/kernels/
+
+You may need some firmware files for some part of the functionality. Those are
+available at: https://megous.com/git/linux-firmware
+
+If you want to reproduce my pre-built kernels exactly, you'll need to uncomment
+CONFIG_EXTRA_FIRMWARE_DIR and CONFIG_EXTRA_FIRMWARE in the defconfigs, and
+point CONFIG_EXTRA_FIRMWARE_DIR to a directory on your computer where the
+clone of https://megous.com/git/linux-firmware resides.
+
+You can also leave those two config options commented out, and copy the contents
+of https://megous.com/git/linux-firmware to /lib/firmware/ on the target device.
+
+You can use this kernel to run a desktop environment on Orange Pi SBCs,
+Arch Linux on your Pinephone, or to have a completely opensource OS on
+a Pocketbook e-ink book reader.
+
+Have fun!
+
+
+Build instructions
+------------------
+
+These are rudimentary instructions and you need to understand what you're doing.
+These are just core steps required to build the ATF/u-boot/kernel. Downloading,
+verifying, renaming to correct directories is not described or mentioned. You
+should be able to infer missing necessary steps yourself for your particular needs.
+
+Get necessary toolchains from:
+
+- https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-linux-gnu/ for 64bit Orange Pi PC2 and Orange Pi 3, PinePhone
+- https://releases.linaro.org/components/toolchain/binaries/latest/arm-linux-gnueabihf/ for 32bit Orange Pis, Pocketbook, TBS tablet
+
+Extract toolchains and prepare the environment:
+
+ CWD=`pwd`
+ OUT=$CWD/builds
+ SRC=$CWD/u-boot
+ export PATH="$PATH:$CWD/Toolchains/arm/bin:$CWD/Toolchains/aarch64/bin"
+
+For Orange Pi PC2, Orange Pi 3 or PinePhone:
+
+ export CROSS_COMPILE=aarch64-linux-gnu-
+ export KBUILD_OUTPUT=$OUT/.tmp/uboot-pc2
+ rm -rf "$KBUILD_OUTPUT"
+ mkdir -p $KBUILD_OUTPUT $OUT/pc2
+
+Get and build ATF from https://github.com/ARM-software/arm-trusted-firmware:
+
+ make -C "$CWD/arm-trusted-firmware" PLAT=sun50i_a64 DEBUG=1 bl31
+ cp "$CWD/arm-trusted-firmware/build/sun50i_a64/debug/bl31.bin" "$KBUILD_OUTPUT"
+
+Use sun50i_a64 for Orange Pi PC2 or PinePhone and sun50i_h6 for Orange Pi 3.
+
+Build u-boot from https://megous.com/git/u-boot/ (opi-v2020.04 branch) with appropriate
+defconfig (orangepi_one_defconfig, orangepi_pc2_defconfig, orangepi_pc_defconfig, orangepi_3_defconfig, tbs_a711_defconfig, pinephone_defconfig).
+
+My u-boot branch already has all the necessary patches integrated and is configured for quick u-boot/kernel startup.
+
+ make -C u-boot orangepi_pc2_defconfig
+ make -C u-boot -j5
+
+ cp $KBUILD_OUTPUT/.config $OUT/pc2/uboot.config
+ cat $KBUILD_OUTPUT/{spl/sunxi-spl.bin,u-boot.itb} > $OUT/pc2/uboot.bin
+
+Get kernel from this repository and checkout the latest orange-pi-5.18 branch.
+
+Build the kernel for 64-bit boards:
+
+ export ARCH=arm64
+ export CROSS_COMPILE=aarch64-linux-gnu-
+ export KBUILD_OUTPUT=$OUT/.tmp/linux-arm64
+ mkdir -p $KBUILD_OUTPUT $OUT/pc2
+
+ make -C linux orangepi_defconfig
+ # or make -C linux pocketbook_touch_lux_3_defconfig
+ # or make -C linux tbs_a711_defconfig
+ make -C linux -j5 clean
+ make -C linux -j5 Image dtbs
+
+ cp -f $KBUILD_OUTPUT/arch/arm64/boot/Image $OUT/pc2/
+ cp -f $KBUILD_OUTPUT/.config $OUT/pc2/linux.config
+ cp -f $KBUILD_OUTPUT/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dtb $OUT/pc2/board.dtb
+
+Build the kernel for 32-bit boards:
+
+ export ARCH=arm
+ export CROSS_COMPILE=arm-linux-gnueabihf-
+ export KBUILD_OUTPUT=$OUT/.tmp/linux-arm
+ mkdir -p $KBUILD_OUTPUT $OUT/pc
+
+ make orangepi_defconfig
+ # or make pinephone_defconfig
+ make -C linux orangepi_defconfig
+ make -C linux -j5 clean
+ make -C linux -j5 zImage dtbs
+
+ cp -f $KBUILD_OUTPUT/arch/arm/boot/zImage $OUT/pc/
+ cp -f $KBUILD_OUTPUT/.config $OUT/pc/linux.config
+ cp -f $KBUILD_OUTPUT/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dtb $OUT/pc/board.dtb
+ # Or use sun8i-h3-orangepi-one.dtb for Orange Pi One
+
+
+PinePhone
+---------
+
+I don't run u-boot on PinePhone, so my pre-built kernel packages don't come
+with u-boot built for PinePhone.
+
+
+Kernel lockup issues
+--------------------
+
+*If you're getting lockups on boot or later during thermal regulation,
+you're missing an u-boot patch.*
+
+This patch is necessary to run this kernel!
+
+These lockups are caused by improper NKMP clock factors selection
+in u-boot for PLL_CPUX. (M divider should not be used. P divider
+should be used only for frequencies below 240MHz.)
+
+This patch for u-boot fixes it:
+
+ 0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch
+
+Kernel side is already fixed in this kernel tree.
--
2.35.3

62
patch/kernel/archive/sunxi-6.15/patches.megous/arm64-dts-rk3399-Add-dmc_opp_table.patch
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@ -1,62 +0,0 @@
From dcc2d5c015437e964ae788fe7194c55f30821ff0 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Fri, 22 Nov 2024 23:41:48 +0100
Subject: arm64: dts: rk3399: Add dmc_opp_table
This was removed in v6.12. Re-add it with original values.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 ++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6bc1249d99e6..bb9205bebf9f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -104,6 +104,31 @@ opp05 {
opp-microvolt = <1100000 1100000 1150000>;
};
};
+
+ dmc_opp_table: opp-table-3 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <328000000>;
+ opp-microvolt = <900000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <416000000>;
+ opp-microvolt = <900000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <666000000>;
+ opp-microvolt = <900000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <856000000>;
+ opp-microvolt = <900000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <928000000>;
+ opp-microvolt = <925000>;
+ };
+ };
};
&cpu_l0 {
@@ -130,6 +155,10 @@ &cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
+&dmc {
+ operating-points-v2 = <&dmc_opp_table>;
+};
+
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};
--
2.35.3

62
patch/kernel/archive/sunxi-6.15/patches.megous/arm64-dts-rockchip-rk3399-s-Add-DMC-table.patch
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@ -1,62 +0,0 @@
From a87e1d370b405cd4b4a02947fa63c0204baacdba Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Thu, 28 Nov 2024 11:16:31 +0100
Subject: arm64: dts: rockchip: rk3399-s: Add DMC table
This is used by Pinephone Pro.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
arch/arm64/boot/dts/rockchip/rk3399-s.dtsi | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi
index e54f451af9f3..82b941720294 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi
@@ -92,6 +92,31 @@ opp05 {
opp-microvolt = <1100000 1100000 1150000>;
};
};
+
+ dmc_opp_table: opp-table-3 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <328000000>;
+ opp-microvolt = <900000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <416000000>;
+ opp-microvolt = <900000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <666000000>;
+ opp-microvolt = <900000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <856000000>;
+ opp-microvolt = <900000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <928000000>;
+ opp-microvolt = <925000>;
+ };
+ };
};
&cpu_l0 {
@@ -118,6 +143,10 @@ &cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
+&dmc {
+ operating-points-v2 = <&dmc_opp_table>;
+};
+
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};
--
2.35.3

47
patch/kernel/archive/sunxi-6.15/patches.megous/arm64-dts-rockchip-rk356x-Fix-PCIe-register-map-and-ranges.patch
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@ -1,47 +0,0 @@
From c9a97f85e94afeaaa9138bf8b5af053311b7de3a Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sat, 24 Sep 2022 21:59:07 +0200
Subject: arm64: dts: rockchip: rk356x: Fix PCIe register map and ranges
I have two Realtek PCIe wifi cards connected over the 4 port PCIe bridge
to Quartz64-A. The cards fail to work, when nvme SSD is connected at the
same time to the bridge. Without nvme connected, cards work fine. The
issue seems to be related to mixed use of devices which make use of I/O
ranges and memory ranges.
This patch changes I/O, MEM and config mappings so that config and I/O
mappings use the 0xf4000000 outbound address space, and MEM range uses
the whole 0x300000000 outbound space.
These values were suggested by pgwipeout:
https://lore.kernel.org/lkml/875ygbsrf3.fsf@bloch.sibelius.xs4all.nl/T/#m84b5f6992cc26dffe0d3783c0d8c9c86e5e10c10
This is identical to how BSP does the mappings.
This change to the regs/ranges makes the issue go away and both nvme and
wifi cards work when connected at the same time to the bridge. I tested
the nvme with large amount of reads/writes, both behind the PCIe bridge
and when directly connected to Quartz64-A board.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index fd2214b6fad4..53d7bd65f9e6 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -966,7 +966,7 @@ pcie2x1: pcie@fe260000 {
<0 0 0 4 &pcie_intc 3>;
linux,pci-domain = <0>;
num-ib-windows = <6>;
- num-ob-windows = <2>;
+ num-ob-windows = <8>;
max-link-speed = <2>;
msi-map = <0x0 &its 0x0 0x1000>;
num-lanes = <1>;
--
2.35.3

22
patch/kernel/archive/sunxi-6.15/patches.megous/clk-sunxi-ng-sun50i-a64-Switch-parent-of-MIPI-DSI-to-periph0-1x.patch
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@ -1,4 +1,4 @@
From 0a1a1377e3e696ee888618e8a130bc210a108b94 Mon Sep 17 00:00:00 2001
From ca29006df14a1f3d0f292e207753bd5925604259 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
Date: Mon, 14 Aug 2023 07:28:11 +0200
Subject: clk: sunxi-ng: sun50i-a64: Switch parent of MIPI-DSI to periph0(1x)
@ -9,11 +9,11 @@ and HDMI output at once.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index c8cdb342b1a0..e76a1c10f390 100644
index 4b3068bdfdf2..e76a1c10f390 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -962,6 +962,8 @@ static struct ccu_mux_nb sun50i_a64_cpu_nb = {
@ -25,24 +25,24 @@ index c8cdb342b1a0..e76a1c10f390 100644
static int sun50i_a64_ccu_probe(struct platform_device *pdev)
{
void __iomem *reg;
@@ -981,9 +983,16 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
@@ -980,7 +982,16 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
/* Decrease the PLL AUDIO bias current to reduce noise. */
writel(0x10040000, reg + SUN50I_A64_PLL_AUDIO_BIAS_REG);
ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &val);
- if (ret)
- writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &val);
+ if (ret) {
writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+
+ /* Set MIPI-DSI clock parent to periph0(1x), so that video0(1x) is free to change. */
+ val = readl(reg + CCU_MIPI_DSI_CLK);
+ val &= 0x30f;
+ val |= (2 << 8) | ((4 - 1) << 0); /* M-1 */
+ writel(val, reg + CCU_MIPI_DSI_CLK);
+ }
+
ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc);
if (ret)
return ret;
--
2.35.3

36
patch/kernel/archive/sunxi-6.15/patches.megous/drm-rockchip-Fix-panic-on-reboot-when-DRM-device-fails-to-bind.patch
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@ -1,36 +0,0 @@
From c6b961241e3b8f62f28ab011bc72347b79e2cef1 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sat, 24 Sep 2022 21:54:23 +0200
Subject: drm: rockchip: Fix panic on reboot when DRM device fails to bind
When DRM device is freed, we need to clear the drvdata pointer, because
it now points to invalid memory.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 180fad5d49ad..04e829553c14 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -206,6 +206,7 @@ static int rockchip_drm_bind(struct device *dev)
component_unbind_all(dev, drm_dev);
err_free:
drm_dev_put(drm_dev);
+ dev_set_drvdata(dev, NULL);
return ret;
}
@@ -222,6 +223,7 @@ static void rockchip_drm_unbind(struct device *dev)
rockchip_iommu_cleanup(drm_dev);
drm_dev_put(drm_dev);
+ dev_set_drvdata(dev, NULL);
}
DEFINE_DRM_GEM_FOPS(rockchip_drm_driver_fops);
--
2.35.3

35
patch/kernel/archive/sunxi-6.15/patches.megous/drm-rockchip-dw-mipi-dsi-rockchip-Fix-ISP1-PHY-initialization.patch
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@ -1,35 +0,0 @@
From a2562ea36163448cb1cc336127beafdffc11a76c Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sun, 9 Jun 2024 14:30:12 +0200
Subject: drm: rockchip: dw-mipi-dsi-rockchip: Fix ISP1 PHY initialization
After suspend/resume cycle, ISP1 would stop receiving data.
Re-initializing DPHY during PHY power on fixes the issue.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 3398160ad75e..471851879947 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -1245,6 +1245,14 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy)
goto err_phy_cfg_clk;
}
+ if (dsi->cdata->dphy_rx_init) {
+ ret = dsi->cdata->dphy_rx_init(phy);
+ if (ret < 0) {
+ DRM_DEV_ERROR(dsi->dev, "hardware-specific phy init failed: %d\n", ret);
+ goto err_pwr_on;
+ }
+ }
+
/* do soc-variant specific init */
if (dsi->cdata->dphy_rx_power_on) {
ret = dsi->cdata->dphy_rx_power_on(phy);
--
2.35.3

131
patch/kernel/archive/sunxi-6.15/patches.megous/drm-sun4i-Implement-gamma-correction.patch
View File

@ -1,131 +0,0 @@
From 86672bffdbcfdd69af1125a34c2534225a941d3d Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 13 Mar 2019 19:50:17 -0700
Subject: drm/sun4i: Implement gamma correction
Add support for gamma corretion to sun4i TCON driver. Its LUT has 256
entries and can be updated only when gamma correction is disabled.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 14 +++++++++++++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 33 ++++++++++++++++++++++++++++++
drivers/gpu/drm/sun4i/sun4i_tcon.h | 12 ++++++++++-
3 files changed, 58 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c
index 18e74047b0f5..a09944a49e89 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
@@ -103,6 +103,20 @@ static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
drm_crtc_send_vblank_event(crtc, event);
spin_unlock_irq(&crtc->dev->event_lock);
}
+
+ if (crtc->state->color_mgmt_changed) {
+ if (crtc->state->gamma_lut) {
+ /* LUT can be only updated when gamma correction is
+ * disabled
+ */
+ sun4i_tcon_enable_gamma(scrtc->tcon, false);
+ sun4i_tcon_load_gamma_lut(scrtc->tcon,
+ crtc->state->gamma_lut->data);
+ sun4i_tcon_enable_gamma(scrtc->tcon, true);
+ } else
+ sun4i_tcon_enable_gamma(scrtc->tcon, false);
+ }
+
}
static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index fca95b76e258..ac6ad2ed1cc0 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -240,6 +240,34 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable)
}
EXPORT_SYMBOL(sun4i_tcon_enable_vblank);
+void sun4i_tcon_load_gamma_lut(struct sun4i_tcon *tcon,
+ struct drm_color_lut *lut)
+{
+ int i;
+
+ for (i = 0; i < SUN4I_TCON_GAMMA_LUT_SIZE; i++) {
+ u32 r, g, b;
+
+ r = drm_color_lut_extract(lut[i].red, 8);
+ g = drm_color_lut_extract(lut[i].green, 8);
+ b = drm_color_lut_extract(lut[i].blue, 8);
+
+ regmap_write(tcon->regs, SUN4I_TCON_GAMMA_TABLE_REG + 4 * i,
+ SUN4I_TCON_GAMMA_TABLE_R(r) |
+ SUN4I_TCON_GAMMA_TABLE_G(g) |
+ SUN4I_TCON_GAMMA_TABLE_B(b));
+ }
+}
+EXPORT_SYMBOL(sun4i_tcon_load_gamma_lut);
+
+void sun4i_tcon_enable_gamma(struct sun4i_tcon *tcon, bool enable)
+{
+ regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
+ SUN4I_TCON_GCTL_GAMMA_ENABLE,
+ enable ? SUN4I_TCON_GCTL_GAMMA_ENABLE : 0);
+}
+EXPORT_SYMBOL(sun4i_tcon_enable_gamma);
+
/*
* This function is a helper for TCON output muxing. The TCON output
* muxing control register in earlier SoCs (without the TCON TOP block)
@@ -1288,6 +1316,11 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
list_add_tail(&tcon->list, &drv->tcon_list);
+ drm_mode_crtc_set_gamma_size(&tcon->crtc->crtc,
+ SUN4I_TCON_GAMMA_LUT_SIZE);
+ drm_crtc_enable_color_mgmt(&tcon->crtc->crtc, 0, false,
+ tcon->crtc->crtc.gamma_size);
+
return 0;
err_free_dclk:
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index fa23aa23fe4a..97df39db2a31 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -19,6 +19,7 @@
#define SUN4I_TCON_GCTL_REG 0x0
#define SUN4I_TCON_GCTL_TCON_ENABLE BIT(31)
+#define SUN4I_TCON_GCTL_GAMMA_ENABLE BIT(30)
#define SUN4I_TCON_GCTL_IOMAP_MASK BIT(0)
#define SUN4I_TCON_GCTL_IOMAP_TCON1 (1 << 0)
#define SUN4I_TCON_GCTL_IOMAP_TCON0 (0 << 0)
@@ -229,7 +230,13 @@
#define SUN4I_TCON1_FILL_BEG2_REG 0x31c
#define SUN4I_TCON1_FILL_END2_REG 0x320
#define SUN4I_TCON1_FILL_DATA2_REG 0x324
-#define SUN4I_TCON1_GAMMA_TABLE_REG 0x400
+
+#define SUN4I_TCON_GAMMA_TABLE_REG 0x400
+#define SUN4I_TCON_GAMMA_TABLE_B(x) ((x) & 0xff)
+#define SUN4I_TCON_GAMMA_TABLE_G(x) (((x) & 0xff) << 8)
+#define SUN4I_TCON_GAMMA_TABLE_R(x) (((x) & 0xff) << 16)
+
+#define SUN4I_TCON_GAMMA_LUT_SIZE 256
#define SUN4I_TCON_MAX_CHANNELS 2
@@ -297,6 +304,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
const struct drm_display_mode *mode);
void sun4i_tcon_set_status(struct sun4i_tcon *crtc,
const struct drm_encoder *encoder, bool enable);
+void sun4i_tcon_load_gamma_lut(struct sun4i_tcon *tcon,
+ struct drm_color_lut *lut);
+void sun4i_tcon_enable_gamma(struct sun4i_tcon *tcon, bool enable);
extern const struct of_device_id sun4i_tcon_of_table[];
--
2.35.3

73
patch/kernel/archive/sunxi-6.15/patches.megous/drm-sun4i-Mark-one-of-the-UI-planes-as-a-cursor-one.patch
View File

@ -1,73 +0,0 @@
From 5155193c30ee60f6e3cedbc37a14d4a2b13747f0 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Mon, 31 Oct 2022 03:23:11 +0100
Subject: drm/sun4i: Mark one of the UI planes as a cursor one
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 ++++++-
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 7 ++-----
drivers/gpu/drm/sun4i/sun8i_ui_layer.h | 4 +++-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 8b41d33baa30..03dd180a4c31 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -349,8 +349,13 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm,
for (i = 0; i < mixer->cfg->ui_num; i++) {
struct sun8i_layer *layer;
+ enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY;
+ if (i == 0)
+ type = DRM_PLANE_TYPE_PRIMARY;
+ else if (i == (mixer->cfg->ui_num - 1))
+ type = DRM_PLANE_TYPE_CURSOR;
- layer = sun8i_ui_layer_init_one(drm, mixer, i);
+ layer = sun8i_ui_layer_init_one(drm, mixer, i, type);
if (IS_ERR(layer)) {
dev_err(drm->dev, "Couldn't initialize %s plane\n",
i ? "overlay" : "primary");
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
index b90e5edef4e8..0349e8bdffd6 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
@@ -277,9 +277,9 @@ static const uint64_t sun8i_layer_modifiers[] = {
struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
struct sun8i_mixer *mixer,
- int index)
+ int index,
+ enum drm_plane_type type)
{
- enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY;
int channel = mixer->cfg->vi_num + index;
struct sun8i_layer *layer;
unsigned int plane_cnt;
@@ -289,9 +289,6 @@ struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
if (!layer)
return ERR_PTR(-ENOMEM);
- if (index == 0)
- type = DRM_PLANE_TYPE_PRIMARY;
-
/* possible crtcs are set later */
ret = drm_universal_plane_init(drm, &layer->plane, 0,
&sun8i_ui_layer_funcs,
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
index 83892f6ff211..d4530e9f64e0 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
@@ -51,5 +51,7 @@ struct sun8i_layer;
struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
struct sun8i_mixer *mixer,
- int index);
+ int index,
+ enum drm_plane_type type);
+
#endif /* _SUN8I_UI_LAYER_H_ */
--
2.35.3

547
patch/kernel/archive/sunxi-6.15/patches.megous/drm-sun4i-Support-taking-over-display-pipeline-state-from-p-boo.patch
View File

@ -1,547 +0,0 @@
From beb2ba652db9f9fe90d9b30c29791ddb2c422cfd Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sun, 30 Apr 2023 18:19:16 +0200
Subject: drm/sun4i: Support taking over display pipeline state from p-boot
For perfect, flickerless and fast boot.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 4 +-
drivers/gpu/drm/drm_fbdev_ttm.c | 14 +++++
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 17 ++++++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 23 ++++++++
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 +
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 13 +++++
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 2 +
drivers/gpu/drm/sun4i/sun8i_mixer.c | 52 +++++++++++++++++++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 3 ++
drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 14 +++++
drivers/video/backlight/pwm_bl.c | 25 ++++++++-
11 files changed, 167 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 4b3068bdfdf2..c8cdb342b1a0 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -980,7 +980,9 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
/* Decrease the PLL AUDIO bias current to reduce noise. */
writel(0x10040000, reg + SUN50I_A64_PLL_AUDIO_BIAS_REG);
- writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &val);
+ if (ret)
+ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc);
if (ret)
diff --git a/drivers/gpu/drm/drm_fbdev_ttm.c b/drivers/gpu/drm/drm_fbdev_ttm.c
index 73d35d59590c..f9d71d285e2f 100644
--- a/drivers/gpu/drm/drm_fbdev_ttm.c
+++ b/drivers/gpu/drm/drm_fbdev_ttm.c
@@ -179,6 +179,7 @@ int drm_fbdev_ttm_driver_fbdev_probe(struct drm_fb_helper *fb_helper,
struct fb_info *info;
size_t screen_size;
void *screen_buffer;
+ u32 fb_start;
u32 format;
int ret;
@@ -228,6 +229,19 @@ int drm_fbdev_ttm_driver_fbdev_probe(struct drm_fb_helper *fb_helper,
if (ret)
goto err_drm_fb_helper_release_info;
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ // copy framebuffer contents from p-boot if reasonable
+ if (screen_size != 720 * 1440 * 4) {
+ drm_err(dev, "surface width(%d), height(%d) and bpp(%d) does not match p-boot requirements\n",
+ sizes->surface_width, sizes->surface_height,
+ sizes->surface_bpp);
+ return 0;
+ }
+
+ memcpy(screen_buffer, __va(fb_start), screen_size);
+ }
+
return 0;
err_drm_fb_helper_release_info:
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 6d3ad83be141..8e359c9e0a09 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -62,6 +62,7 @@ struct st7703 {
struct dentry *debugfs;
const struct st7703_panel_desc *desc;
enum drm_panel_orientation orientation;
+ bool hw_preenabled;
};
struct st7703_panel_desc {
@@ -679,6 +680,11 @@ static int st7703_enable(struct drm_panel *panel)
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi};
+ if (ctx->hw_preenabled) {
+ ctx->hw_preenabled = false;
+ return 0;
+ }
+
ctx->desc->init_sequence(&dsi_ctx);
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
@@ -726,8 +732,10 @@ static int st7703_prepare(struct drm_panel *panel)
struct st7703 *ctx = panel_to_st7703(panel);
int ret;
+ if (!ctx->hw_preenabled) {
dev_dbg(ctx->dev, "Resetting the panel\n");
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ }
ret = regulator_enable(ctx->iovcc);
if (ret < 0) {
@@ -743,10 +751,12 @@ static int st7703_prepare(struct drm_panel *panel)
}
/* Give power supplies time to stabilize before deasserting reset. */
+ if (!ctx->hw_preenabled) {
usleep_range(10000, 20000);
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
usleep_range(15000, 20000);
+ }
return 0;
}
@@ -844,12 +854,19 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
{
struct device *dev = &dsi->dev;
struct st7703 *ctx;
+ u32 fb_start;
int ret;
ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
if (!ctx)
return -ENOMEM;
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ /* the display pipeline is already initialized by p-boot */
+ ctx->hw_preenabled = true;
+ }
+
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(ctx->reset_gpio))
return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "Failed to get reset gpio\n");
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index ac6ad2ed1cc0..b36c1ea0948c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -40,6 +40,8 @@
#include "sun8i_tcon_top.h"
#include "sunxi_engine.h"
+static bool hw_preconfigured;
+
static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder)
{
struct drm_connector *connector;
@@ -743,6 +745,13 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder,
const struct drm_display_mode *mode)
{
+ if (tcon->hw_preconfigured) {
+ // avoid the first modeset
+ tcon->hw_preconfigured = false;
+ hw_preconfigured = false;
+ return;
+ }
+
switch (encoder->encoder_type) {
case DRM_MODE_ENCODER_DSI:
/* DSI is tied to special case of CPU interface */
@@ -883,6 +892,7 @@ static int sun4i_tcon_init_regmap(struct device *dev,
return PTR_ERR(tcon->regs);
}
+ if (!tcon->hw_preconfigured) {
/* Make sure the TCON is disabled and all IRQs are off */
regmap_write(tcon->regs, SUN4I_TCON_GCTL_REG, 0);
regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, 0);
@@ -891,6 +901,7 @@ static int sun4i_tcon_init_regmap(struct device *dev,
/* Disable IO lines and set them to tristate */
regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, ~0);
regmap_write(tcon->regs, SUN4I_TCON1_IO_TRI_REG, ~0);
+ }
return 0;
}
@@ -1162,6 +1173,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
tcon->dev = dev;
tcon->id = engine->id;
tcon->quirks = of_device_get_match_data(dev);
+
+ if (tcon->id == 0)
+ tcon->hw_preconfigured = hw_preconfigured;
tcon->lcd_rst = devm_reset_control_get(dev, "lcd");
if (IS_ERR(tcon->lcd_rst)) {
@@ -1183,12 +1197,14 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
}
}
+ if (!tcon->hw_preconfigured) {
/* Make sure our TCON is reset */
ret = reset_control_reset(tcon->lcd_rst);
if (ret) {
dev_err(dev, "Couldn't deassert our reset line\n");
return ret;
}
+ }
if (tcon->quirks->supports_lvds) {
/*
@@ -1352,8 +1368,15 @@ static int sun4i_tcon_probe(struct platform_device *pdev)
const struct sun4i_tcon_quirks *quirks;
struct drm_bridge *bridge;
struct drm_panel *panel;
+ u32 fb_start;
int ret;
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ /* the display pipeline is already initialized by p-boot */
+ hw_preconfigured = true;
+ }
+
quirks = of_device_get_match_data(&pdev->dev);
/* panels and bridges are present only on TCONs with channel 0 */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 97df39db2a31..864d70b9d242 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -293,6 +293,8 @@ struct sun4i_tcon {
/* TCON list management */
struct list_head list;
+
+ bool hw_preconfigured;
};
struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node);
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index c35b70d83e53..3644db360a30 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -732,6 +732,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
reset_control_deassert(dsi->reset);
clk_prepare_enable(dsi->mod_clk);
+ if (!dsi->hw_preconfigured) {
/*
* Enable the DSI block.
*/
@@ -758,6 +759,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
sun6i_dsi_setup_inst_loop(dsi, mode);
sun6i_dsi_setup_format(dsi, mode);
sun6i_dsi_setup_timings(dsi, mode);
+ }
phy_init(dsi->dphy);
@@ -787,11 +789,15 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
if (dsi->panel)
drm_panel_enable(dsi->panel);
+ if (!dsi->hw_preconfigured) {
sun6i_dsi_start(dsi, DSI_START_HSC);
udelay(1000);
sun6i_dsi_start(dsi, DSI_START_HSD);
+ }
+
+ dsi->hw_preconfigured = false;
}
static void sun6i_dsi_encoder_disable(struct drm_encoder *encoder)
@@ -1105,6 +1111,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct sun6i_dsi *dsi;
void __iomem *base;
+ u32 fb_start;
int ret;
variant = device_get_match_data(dev);
@@ -1120,6 +1127,12 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
dsi->host.dev = dev;
dsi->variant = variant;
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ /* the display pipeline is already initialized by p-boot */
+ dsi->hw_preconfigured = true;
+ }
+
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base)) {
dev_err(dev, "Couldn't map the DSI encoder registers\n");
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
index f1ddefe0f554..958c2997ab43 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
@@ -38,6 +38,8 @@ struct sun6i_dsi {
struct drm_panel *panel;
const struct sun6i_dsi_variant *variant;
+
+ bool hw_preconfigured;
};
static inline struct sun6i_dsi *host_to_sun6i_dsi(struct mipi_dsi_host *host)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 03dd180a4c31..20a78d48ccdf 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -24,6 +24,7 @@
#include <drm/drm_probe_helper.h>
#include "sun4i_drv.h"
+#include "sun4i_tcon.h"
#include "sun8i_mixer.h"
#include "sun8i_ui_layer.h"
#include "sun8i_vi_layer.h"
@@ -34,6 +35,8 @@ struct de2_fmt_info {
u32 de2_fmt;
};
+static bool hw_preconfigured;
+
static const struct de2_fmt_info de2_formats[] = {
{
.drm_fmt = DRM_FORMAT_ARGB8888,
@@ -278,6 +281,33 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine,
struct drm_plane *plane;
u32 route = 0, pipe_en = 0;
+ if (mixer->hw_preconfigured && engine->id == 0) {
+ struct sun4i_tcon* tcon;
+ u32 val, saved;
+
+ /*
+ * This is the first commit, wait for vblank on tcon0 before continuing.
+ */
+ list_for_each_entry(tcon, &mixer->drv->tcon_list, list) {
+ if (tcon->id == 0) {
+ regmap_read(tcon->regs, SUN4I_TCON_GINT0_REG, &saved);
+ saved &= 0xffff0000;
+
+ regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, 0);
+
+ regmap_read_poll_timeout(tcon->regs, SUN4I_TCON_GINT0_REG, val,
+ val & (SUN4I_TCON_GINT0_VBLANK_INT(0) |
+ SUN4I_TCON_GINT0_VBLANK_INT(1) |
+ SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT),
+ 100, 40000);
+
+ regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, saved);
+ }
+ }
+
+ mixer->hw_preconfigured = false;
+ }
+
DRM_DEBUG_DRIVER("Committing changes\n");
drm_for_each_plane(plane, state->dev) {
@@ -461,6 +491,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
dev_set_drvdata(dev, mixer);
mixer->engine.ops = &sun8i_engine_ops;
mixer->engine.node = dev->of_node;
+ mixer->drv = drv;
if (of_property_present(dev->of_node, "iommus")) {
/*
@@ -485,6 +516,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
*/
mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);
+ if (mixer->engine.id == 0) {
+ mixer->hw_preconfigured = hw_preconfigured;
+ hw_preconfigured = false;
+ }
+
mixer->cfg = of_device_get_match_data(dev);
if (!mixer->cfg)
return -EINVAL;
@@ -532,8 +568,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
* reason for the mixer to be functional. Make sure it's the
* case.
*/
+
+ if (!mixer->hw_preconfigured) {
if (mixer->cfg->mod_rate)
clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
+ }
clk_prepare_enable(mixer->mod_clk);
@@ -541,6 +580,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
base = sun8i_blender_base(mixer);
+ if (!mixer->hw_preconfigured) {
/* Reset registers and disable unused sub-engines */
if (mixer->cfg->is_de3) {
for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4)
@@ -572,6 +612,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
/* Enable the mixer */
regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL,
SUN8I_MIXER_GLOBAL_CTL_RT_EN);
+ } /* hw_preconfigured */
/* Set background color to black */
regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base),
@@ -592,8 +633,10 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
SUN8I_MIXER_BLEND_MODE(base, i),
SUN8I_MIXER_BLEND_MODE_DEF);
+ if (!mixer->hw_preconfigured) {
regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),
SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0);
+ }
return 0;
@@ -623,6 +666,15 @@ static const struct component_ops sun8i_mixer_ops = {
static int sun8i_mixer_probe(struct platform_device *pdev)
{
+ int ret;
+ u32 fb_start;
+
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ /* the display pipeline is already initialized by p-boot */
+ hw_preconfigured = true;
+ }
+
return component_add(&pdev->dev, &sun8i_mixer_ops);
}
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index d7898c9c9cc0..68e2741b0962 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -184,6 +184,9 @@ struct sun8i_mixer {
struct clk *bus_clk;
struct clk *mod_clk;
+
+ struct sun4i_drv *drv;
+ bool hw_preconfigured;
};
enum {
diff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
index 36eab95271b2..a19a27cea860 100644
--- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
@@ -195,6 +195,8 @@ struct sun6i_dphy {
const struct sun6i_dphy_variant *variant;
enum sun6i_dphy_direction direction;
+
+ bool hw_preconfigured;
};
static int sun6i_dphy_init(struct phy *phy)
@@ -226,6 +228,11 @@ static void sun6i_a31_mipi_dphy_tx_power_on(struct sun6i_dphy *dphy)
{
u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
+ if (dphy->hw_preconfigured) {
+ dphy->hw_preconfigured = false;
+ return;
+ }
+
regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG,
SUN6I_DPHY_ANA0_REG_PWS |
SUN6I_DPHY_ANA0_REG_DMPC |
@@ -551,6 +558,7 @@ static int sun6i_dphy_probe(struct platform_device *pdev)
struct sun6i_dphy *dphy;
const char *direction;
void __iomem *regs;
+ u32 fb_start;
int ret;
dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL);
@@ -561,6 +569,12 @@ static int sun6i_dphy_probe(struct platform_device *pdev)
if (!dphy->variant)
return -EINVAL;
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start);
+ if (ret == 0) {
+ /* the display pipeline is already initialized by p-boot */
+ dphy->hw_preconfigured = true;
+ }
+
regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(regs)) {
dev_err(&pdev->dev, "Couldn't map the DPHY encoder registers\n");
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 237d3d3f3bb1..f7d9d8813d92 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -444,7 +444,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
struct backlight_properties props;
struct backlight_device *bl;
struct pwm_bl_data *pb;
- struct pwm_state state;
+ struct pwm_state state, state_real;
unsigned int i;
int ret;
@@ -509,6 +509,11 @@ static int pwm_backlight_probe(struct platform_device *pdev)
/* Sync up PWM state. */
pwm_init_state(pb->pwm, &state);
+ /* Read real state, but only if the PWM is enabled. */
+ pwm_get_state(pb->pwm, &state_real);
+ if (state_real.enabled)
+ state = state_real;
+
/*
* The DT case will set the pwm_period_ns field to 0 and store the
* period, parsed from the DT, in the PWM device. For the non-DT case,
@@ -601,6 +606,24 @@ static int pwm_backlight_probe(struct platform_device *pdev)
bl->props.brightness = data->dft_brightness;
bl->props.power = pwm_backlight_initial_power_state(pb);
+ if (bl->props.power == FB_BLANK_UNBLANK && pb->levels) {
+ u64 level;
+
+ /* If the backlight is already on, determine the default
+ * brightness from PWM duty cycle instead of forcing
+ * the brightness determined by the driver
+ */
+ pwm_get_state(pb->pwm, &state);
+ level = (u64)state.duty_cycle * pb->scale;
+ do_div(level, (u64)state.period);
+
+ for (i = 0; i <= data->max_brightness; i++) {
+ if (data->levels[i] > level) {
+ bl->props.brightness = i;
+ break;
+ }
+ }
+ }
backlight_update_status(bl);
platform_set_drvdata(pdev, bl);
--
2.35.3

24
patch/kernel/archive/sunxi-6.15/patches.megous/drm-sun4i-tcon-Support-keeping-dclk-rate-upon-ancestor-clock-ch.patch
View File

@ -1,4 +1,4 @@
From 66069bff9a2a0e81523f39b716afe14f8cdb6d2c Mon Sep 17 00:00:00 2001
From 9a81dc42297b8d3afe929ea9dac2e500ce323ed5 Mon Sep 17 00:00:00 2001
From: Frank Oltmanns <frank@oltmanns.dev>
Date: Sun, 10 Mar 2024 14:32:29 +0100
Subject: drm/sun4i: tcon: Support keeping dclk rate upon ancestor clock
@ -23,10 +23,10 @@ Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
2 files changed, 76 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index b36c1ea0948c..221df37406d8 100644
index fca95b76e258..0a493142b100 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -110,9 +110,11 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
@@ -108,9 +108,11 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
if (enabled) {
clk_prepare_enable(clk);
@ -40,7 +40,7 @@ index b36c1ea0948c..221df37406d8 100644
clk_disable_unprepare(clk);
}
}
@@ -373,6 +375,53 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
@@ -343,6 +345,53 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
regmap_write(tcon->regs, SUN4I_TCON_FRM_CTL_REG, val);
}
@ -94,7 +94,7 @@ index b36c1ea0948c..221df37406d8 100644
static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder,
const struct drm_display_mode *mode)
@@ -390,8 +439,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
@@ -360,8 +409,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
*/
tcon->dclk_min_div = SUN6I_DSI_TCON_DIV;
tcon->dclk_max_div = SUN6I_DSI_TCON_DIV;
@ -105,7 +105,7 @@ index b36c1ea0948c..221df37406d8 100644
/* Set the resolution */
regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
@@ -464,7 +513,7 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
@@ -434,7 +483,7 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
tcon->dclk_min_div = 7;
tcon->dclk_max_div = 7;
@ -114,7 +114,7 @@ index b36c1ea0948c..221df37406d8 100644
/* Set the resolution */
regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
@@ -548,7 +597,7 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
@@ -518,7 +567,7 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
tcon->dclk_min_div = tcon->quirks->dclk_min_div;
tcon->dclk_max_div = 127;
@ -123,7 +123,7 @@ index b36c1ea0948c..221df37406d8 100644
/* Set the resolution */
regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
@@ -1561,6 +1610,14 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
@@ -1505,6 +1554,14 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
.supports_lvds = true,
};
@ -138,7 +138,7 @@ index b36c1ea0948c..221df37406d8 100644
static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = {
.supports_lvds = true,
.has_channel_0 = true,
@@ -1619,6 +1676,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
@@ -1563,6 +1620,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
{ .compatible = "allwinner,sun9i-a80-tcon-tv", .data = &sun9i_a80_tcon_tv_quirks },
{ .compatible = "allwinner,sun20i-d1-tcon-lcd", .data = &sun20i_d1_lcd_quirks },
{ .compatible = "allwinner,sun20i-d1-tcon-tv", .data = &sun8i_r40_tv_quirks },
@ -147,10 +147,10 @@ index b36c1ea0948c..221df37406d8 100644
};
MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table);
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 864d70b9d242..729d64b78846 100644
index fa23aa23fe4a..bd4abc90062b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -250,6 +250,7 @@ struct sun4i_tcon_quirks {
@@ -243,6 +243,7 @@ struct sun4i_tcon_quirks {
bool needs_edp_reset; /* a80 edp reset needed for tcon0 access */
bool supports_lvds; /* Does the TCON support an LVDS output? */
bool polarity_in_ch0; /* some tcon1 channels have polarity bits in tcon0 pol register */
@ -158,7 +158,7 @@ index 864d70b9d242..729d64b78846 100644
u8 dclk_min_div; /* minimum divider for TCON0 DCLK */
/* callback to handle tcon muxing options */
@@ -312,4 +313,15 @@ void sun4i_tcon_enable_gamma(struct sun4i_tcon *tcon, bool enable);
@@ -300,4 +301,15 @@ void sun4i_tcon_set_status(struct sun4i_tcon *crtc,
extern const struct of_device_id sun4i_tcon_of_table[];

52
patch/kernel/archive/sunxi-6.15/patches.megous/mmc-dw-mmc-rockchip-fix-sdmmc-after-soft-reboot.patch
View File

@ -1,52 +0,0 @@
From f1aae0d6c671fdba0580d827743fe78f00dce4c4 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Sat, 22 Jan 2022 20:35:39 +0000
Subject: mmc: dw-mmc-rockchip: fix sdmmc after soft reboot
During shutdown the dw-mmc driver shuts down the vqmmc regulator.
This leads to situations where the sdmmc is unavailable after a soft
reboot.
Fix this by ensuring the vqmmc regulator is powered up on kernel
shutdown.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
drivers/mmc/host/dw_mmc-rockchip.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index baa23b517731..42edf219623b 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -10,6 +10,7 @@
#include <linux/of_address.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include "dw_mmc.h"
@@ -575,9 +576,20 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
NULL)
};
+static void dw_mci_rockchip_shutdown(struct platform_device *pdev)
+{
+ struct dw_mci *host = dev_get_drvdata(&pdev->dev);
+ struct mmc_host *mmc = host->slot->mmc;
+
+ if (!IS_ERR(mmc->supply.vqmmc) && !(host->vqmmc_enabled))
+ if(!regulator_enable(mmc->supply.vqmmc))
+ host->vqmmc_enabled = true;
+}
+
static struct platform_driver dw_mci_rockchip_pltfm_driver = {
.probe = dw_mci_rockchip_probe,
.remove = dw_mci_rockchip_remove,
+ .shutdown = dw_mci_rockchip_shutdown,
.driver = {
.name = "dwmmc_rockchip",
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
--
2.35.3

32
patch/kernel/archive/sunxi-6.15/patches.megous/pci-Workaround-ITS-timeouts-on-poweroff-reboot-on-Orange-Pi-5-P.patch
View File

@ -1,32 +0,0 @@
From dd97603b78306299dfcf583a2f15d2576e4ba2cc Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Wed, 14 Jun 2023 00:48:21 +0200
Subject: pci: Workaround ITS timeouts on poweroff/reboot on Orange Pi 5 Plus
Call to pci_free_irq_vectors on PCIE2x ports causes ITS timeout messages
and delayed shutdown/reboot (by up to a minute).
The root cause will be elsewhere. This is not for upstream. Anyway,
there should be no harm from this, since we're shutting down anyway.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/pci/pcie/portdrv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index e8318fd5f6ed..22d65c83396e 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c
@@ -743,7 +743,7 @@ static void pcie_portdrv_shutdown(struct pci_dev *dev)
pm_runtime_dont_use_autosuspend(&dev->dev);
}
- pcie_port_device_remove(dev);
+ device_for_each_child(&dev->dev, NULL, remove_iter);
}
static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
--
2.35.3

10
patch/kernel/archive/sunxi-6.15/patches.megous/sunxi-Use-dev_err_probe-to-handle-EPROBE_DEFER-errors.patch
View File

@ -1,4 +1,4 @@
From 3c7d53495a3f7b3288c9861e42054a43db2a57f2 Mon Sep 17 00:00:00 2001
From ce8b984be644b942b6462e4e76fd42fa0a672724 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
Date: Mon, 2 Sep 2019 14:51:17 +0200
Subject: sunxi: Use dev_err_probe to handle EPROBE_DEFER errors
@ -28,10 +28,10 @@ index 2336ee2aa44a..20efde3cb1c2 100644
}
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 8e359c9e0a09..ff6871e93730 100644
index 6d3ad83be141..18afc2aff29c 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -904,7 +904,7 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
@@ -887,7 +887,7 @@ static int st7703_probe(struct mipi_dsi_device *dsi)
ret = mipi_dsi_attach(dsi);
if (ret < 0) {
@ -124,10 +124,10 @@ index 3a42865f9a5b..3d8d94594bc5 100644
}
diff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
index a19a27cea860..0107514e7d2b 100644
index 36eab95271b2..f83df7554aac 100644
--- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
@@ -584,13 +584,15 @@ static int sun6i_dphy_probe(struct platform_device *pdev)
@@ -570,13 +570,15 @@ static int sun6i_dphy_probe(struct platform_device *pdev)
dphy->regs = devm_regmap_init_mmio_clk(&pdev->dev, "bus",
regs, &sun6i_dphy_regmap_config);
if (IS_ERR(dphy->regs)) {

53
patch/kernel/archive/sunxi-6.15/patches.megous/video-pwm_bl-Allow-to-change-lth_brightness-via-sysfs.patch
View File

@ -1,4 +1,4 @@
From 254b402c1a8495c7db29328c9f0605c98f172def Mon Sep 17 00:00:00 2001
From 472bb85c925dd230c6e5e9123b739fd6901722c0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
Date: Mon, 7 Jun 2021 20:27:07 +0200
Subject: video: pwm_bl: Allow to change lth_brightness via sysfs
@ -21,11 +21,11 @@ Then make sure to restore this value after each boot by writing it to
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/video/backlight/pwm_bl.c | 72 +++++++++++++++++++++++++++++++-
1 file changed, 70 insertions(+), 2 deletions(-)
drivers/video/backlight/pwm_bl.c | 97 +++++++++++++++++++++++++++++++-
1 file changed, 94 insertions(+), 3 deletions(-)
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index f7d9d8813d92..8a7a158dc1f6 100644
index 237d3d3f3bb1..9f96bdd82a87 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -437,6 +437,61 @@ static int pwm_backlight_initial_power_state(const struct pwm_bl_data *pb)
@ -90,15 +90,29 @@ index f7d9d8813d92..8a7a158dc1f6 100644
static int pwm_backlight_probe(struct platform_device *pdev)
{
struct platform_pwm_backlight_data *data = dev_get_platdata(&pdev->dev);
@@ -445,6 +500,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
@@ -444,7 +499,8 @@ static int pwm_backlight_probe(struct platform_device *pdev)
struct backlight_properties props;
struct backlight_device *bl;
struct pwm_bl_data *pb;
struct pwm_state state, state_real;
- struct pwm_state state;
+ struct pwm_state state, state_real;
+ u32 lth_brightness;
unsigned int i;
int ret;
@@ -584,8 +640,20 @@ static int pwm_backlight_probe(struct platform_device *pdev)
@@ -509,6 +565,11 @@ static int pwm_backlight_probe(struct platform_device *pdev)
/* Sync up PWM state. */
pwm_init_state(pb->pwm, &state);
+ /* Read real state, but only if the PWM is enabled. */
+ pwm_get_state(pb->pwm, &state_real);
+ if (state_real.enabled)
+ state = state_real;
+
/*
* The DT case will set the pwm_period_ns field to 0 and store the
* period, parsed from the DT, in the PWM device. For the non-DT case,
@@ -579,8 +640,20 @@ static int pwm_backlight_probe(struct platform_device *pdev)
pb->scale = data->max_brightness;
}
@ -121,6 +135,31 @@ index f7d9d8813d92..8a7a158dc1f6 100644
props.type = BACKLIGHT_RAW;
props.max_brightness = data->max_brightness;
@@ -601,6 +674,24 @@ static int pwm_backlight_probe(struct platform_device *pdev)
bl->props.brightness = data->dft_brightness;
bl->props.power = pwm_backlight_initial_power_state(pb);
+ if (bl->props.power == FB_BLANK_UNBLANK && pb->levels) {
+ u64 level;
+
+ /* If the backlight is already on, determine the default
+ * brightness from PWM duty cycle instead of forcing
+ * the brightness determined by the driver
+ */
+ pwm_get_state(pb->pwm, &state);
+ level = (u64)state.duty_cycle * pb->scale;
+ do_div(level, (u64)state.period);
+
+ for (i = 0; i <= data->max_brightness; i++) {
+ if (data->levels[i] > level) {
+ bl->props.brightness = i;
+ break;
+ }
+ }
+ }
backlight_update_status(bl);
platform_set_drvdata(pdev, bl);
--
2.35.3

12
patch/kernel/archive/sunxi-6.15/series.megous
View File

@ -159,31 +159,20 @@
patches.megous/arm64-dts-sun50i-h5-Add-missing-GPU-trip-point.patch
patches.megous/arm64-dts-allwinner-a64-Fix-LRADC-compatible.patch
patches.megous/media-cedrus-Fix-failure-to-clean-up-hardware-on-probe-failure.patch
patches.megous/ASoC-rockchip-Fix-doubling-of-playback-speed-after-system-sleep.patch
patches.megous/usb-musb-sunxi-Avoid-enabling-host-side-code-on-SoCs-where-it-s.patch
patches.megous/arm64-dts-allwinner-Enforce-consistent-MMC-numbering.patch
patches.megous/ARM-dts-sunxi-Add-aliases-for-MMC.patch
patches.megous/drm-rockchip-Fix-panic-on-reboot-when-DRM-device-fails-to-bind.patch
patches.megous/usb-gadget-Fix-dangling-pointer-in-netdev-private-data.patch
patches.megous/mmc-dw-mmc-rockchip-fix-sdmmc-after-soft-reboot.patch
patches.megous/Revert-drm-sun4i-lvds-Invert-the-LVDS-polarity.patch
patches.megous/of-property-fw_devlink-Support-allwinner-sram-links.patch
patches.megous/Fix-broken-allwinner-sram-dependency-on-h616-h618.patch
patches.megous/arm64-dts-rockchip-rk356x-Fix-PCIe-register-map-and-ranges.patch
patches.megous/Fix-intptr_t-typedef.patch
patches.megous/mmc-sunxi-mmc-Remove-runtime-PM.patch
patches.megous/pci-Workaround-ITS-timeouts-on-poweroff-reboot-on-Orange-Pi-5-P.patch
patches.megous/usb-serial-option-add-reset_resume-callback-for-WWAN-devices.patch
patches.megous/media-ov5648-Fix-call-to-pm_runtime_set_suspended.patch
patches.megous/drm-rockchip-dw-mipi-dsi-rockchip-Fix-ISP1-PHY-initialization.patch
patches.megous/arm64-dts-rk3399-Add-dmc_opp_table.patch
patches.megous/arm64-dts-rockchip-rk3399-s-Add-DMC-table.patch
patches.megous/wifi-rtw89-Fix-inadverent-sharing-of-struct-ieee80211_supported.patch
patches.megous/bluetooth-h5-Don-t-re-initialize-rtl8723cs-on-resume.patch
patches.megous/drm-sun4i-Mark-one-of-the-UI-planes-as-a-cursor-one.patch
patches.megous/drm-sun4i-Implement-gamma-correction.patch
patches.megous/drm-panel-st7703-Fix-xbd599-timings-to-make-refresh-rate-exactl.patch
patches.megous/drm-sun4i-Support-taking-over-display-pipeline-state-from-p-boo.patch
patches.megous/video-pwm_bl-Allow-to-change-lth_brightness-via-sysfs.patch
patches.megous/clk-sunxi-ng-sun50i-a64-Switch-parent-of-MIPI-DSI-to-periph0-1x.patch
patches.megous/drm-sun4i-tcon-Support-keeping-dclk-rate-upon-ancestor-clock-ch.patch
@ -243,5 +232,4 @@
patches.megous/Add-support-for-my-private-Sapomat-device.patch
patches.megous/ARM-dts-sun8i-h3-orange-pi-one-Enable-all-gpio-header-UARTs.patch
patches.megous/mtd-spi-nor-Add-Alliance-memory-support.patch
patches.megous/Add-README.md-with-information-and-u-boot-patches.patch
patches.megous/Defconfigs-for-all-my-devices.patch