rk322x: device tree tidying up, add cooling maps and ir remote maps (#4126)

* tidy up rk322x dtb for edge, add cooling maps

* tidy up rk322x dtb for current, add cooling maps

* add rk322x tvbox remote keymap for current kernel
This commit is contained in:
Paolo 2022-09-01 23:07:00 +02:00 committed by GitHub
parent b887204a44
commit cd58683a75
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
13 changed files with 1008 additions and 1602 deletions

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.15.51 Kernel Configuration
# Linux/arm 5.15.63 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@ -598,7 +598,7 @@ CONFIG_CRYPTO_SHA1_ARM_CE=m
CONFIG_CRYPTO_SHA2_ARM_CE=m
CONFIG_CRYPTO_SHA256_ARM=m
CONFIG_CRYPTO_SHA512_ARM=m
CONFIG_CRYPTO_BLAKE2S_ARM=m
CONFIG_CRYPTO_BLAKE2S_ARM=y
CONFIG_CRYPTO_BLAKE2B_NEON=m
CONFIG_CRYPTO_AES_ARM=m
CONFIG_CRYPTO_AES_ARM_BS=m
@ -2313,7 +2313,7 @@ CONFIG_USB_SIERRA_NET=m
CONFIG_USB_VL600=m
CONFIG_USB_NET_CH9200=m
CONFIG_USB_NET_AQC111=m
# CONFIG_USB_RTL8153_ECM is not set
CONFIG_USB_RTL8153_ECM=m
CONFIG_WLAN=y
CONFIG_SSV6051=m
CONFIG_WLAN_VENDOR_ADMTEK=y
@ -3333,7 +3333,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_USER_SPACE is not set
CONFIG_CPU_THERMAL=y
CONFIG_CPU_FREQ_THERMAL=y
# CONFIG_DEVFREQ_THERMAL is not set
CONFIG_DEVFREQ_THERMAL=y
# CONFIG_THERMAL_EMULATION is not set
CONFIG_THERMAL_MMIO=m
CONFIG_ROCKCHIP_THERMAL=m
@ -6956,7 +6956,6 @@ CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_BLAKE2S=m
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_POLY1305=m
@ -7077,7 +7076,6 @@ CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=y
CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m
CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m
CONFIG_CRYPTO_LIB_CHACHA=m

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.19.0 Kernel Configuration
# Linux/arm 5.19.4 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@ -591,7 +591,7 @@ CONFIG_CRYPTO_SHA1_ARM_CE=m
CONFIG_CRYPTO_SHA2_ARM_CE=m
CONFIG_CRYPTO_SHA256_ARM=m
CONFIG_CRYPTO_SHA512_ARM=m
CONFIG_CRYPTO_BLAKE2S_ARM=m
CONFIG_CRYPTO_BLAKE2S_ARM=y
CONFIG_CRYPTO_BLAKE2B_NEON=m
CONFIG_CRYPTO_AES_ARM=m
CONFIG_CRYPTO_AES_ARM_BS=m
@ -2358,7 +2358,7 @@ CONFIG_USB_SIERRA_NET=m
CONFIG_USB_VL600=m
CONFIG_USB_NET_CH9200=m
CONFIG_USB_NET_AQC111=m
# CONFIG_USB_RTL8153_ECM is not set
CONFIG_USB_RTL8153_ECM=m
CONFIG_WLAN=y
CONFIG_SSV6051=m
CONFIG_WLAN_VENDOR_ADMTEK=y
@ -3397,7 +3397,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_USER_SPACE is not set
CONFIG_CPU_THERMAL=y
CONFIG_CPU_FREQ_THERMAL=y
# CONFIG_DEVFREQ_THERMAL is not set
CONFIG_DEVFREQ_THERMAL=y
# CONFIG_THERMAL_EMULATION is not set
CONFIG_THERMAL_MMIO=m
CONFIG_ROCKCHIP_THERMAL=m
@ -4556,7 +4556,6 @@ CONFIG_DRM_PANEL_BRIDGE=y
# CONFIG_DRM_CHIPONE_ICN6211 is not set
# CONFIG_DRM_CHRONTEL_CH7033 is not set
CONFIG_DRM_DISPLAY_CONNECTOR=m
# CONFIG_DRM_FSL_LDB is not set
# CONFIG_DRM_ITE_IT6505 is not set
# CONFIG_DRM_LONTIUM_LT8912B is not set
# CONFIG_DRM_LONTIUM_LT9211 is not set
@ -4687,10 +4686,10 @@ CONFIG_HDMI=y
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
CONFIG_BOOTSPLASH=y
# end of Console display driver support
CONFIG_LOGO=y
@ -5739,6 +5738,7 @@ CONFIG_DMABUF_SYSFS_STATS=y
# CONFIG_UIO is not set
# CONFIG_VFIO is not set
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO_ANCHOR=y
CONFIG_VIRTIO=m
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VDPA is not set
@ -6912,6 +6912,24 @@ CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=m
CONFIG_NFS_V2=m
@ -7184,7 +7202,6 @@ CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_BLAKE2S=m
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_CRC64_ROCKSOFT=y
CONFIG_CRYPTO_GHASH=y
@ -7309,7 +7326,6 @@ CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=y
CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m
CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m
CONFIG_CRYPTO_LIB_CHACHA=m

View File

@ -1,889 +0,0 @@
From 61d802c2e9a20880995d9dc77de2b2a4a5d59e58 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Thu, 9 Sep 2021 16:55:05 +0000
Subject: [PATCH 4/4] 01-linux-9000-rk322x-box-DTs
---
arch/arm/boot/dts/Makefile | 4 +
arch/arm/boot/dts/rk3228a-box-h96mini.dts | 115 +++++++++
arch/arm/boot/dts/rk3228a-box.dts | 47 ++++
arch/arm/boot/dts/rk3228a-box.dtsi | 12 +
arch/arm/boot/dts/rk3229-box-a95xr1.dts | 57 +++++
arch/arm/boot/dts/rk3229-box.dts | 50 ++++
arch/arm/boot/dts/rk3229-box.dtsi | 13 +
arch/arm/boot/dts/rk3229-cpu-opp.dtsi | 50 ++++
arch/arm/boot/dts/rk322x-box-dcdc.dtsi | 163 +++++++++++++
arch/arm/boot/dts/rk322x-box.dtsi | 282 ++++++++++++++++++++++
10 files changed, 793 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3228a-box-h96mini.dts
create mode 100644 arch/arm/boot/dts/rk3228a-box.dts
create mode 100644 arch/arm/boot/dts/rk3228a-box.dtsi
create mode 100644 arch/arm/boot/dts/rk3229-box-a95xr1.dts
create mode 100644 arch/arm/boot/dts/rk3229-box.dts
create mode 100644 arch/arm/boot/dts/rk3229-box.dtsi
create mode 100644 arch/arm/boot/dts/rk3229-cpu-opp.dtsi
create mode 100644 arch/arm/boot/dts/rk322x-box-dcdc.dtsi
create mode 100644 arch/arm/boot/dts/rk322x-box.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 863347b6b..1aa5b839f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1008,7 +1008,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-bqedison2qc.dtb \
rk3188-px3-evb.dtb \
rk3188-radxarock.dtb \
+ rk3228a-box.dtb \
+ rk3228a-box-h96mini.dtb \
rk3228-evb.dtb \
+ rk3229-box.dtb \
+ rk3229-box-a95xr1.dtb \
rk3229-evb.dtb \
rk3229-xms6.dtb \
rk3288-evb-act8846.dtb \
diff --git a/arch/arm/boot/dts/rk3228a-box-h96mini.dts b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
new file mode 100644
index 000000000..1041b6737
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3228a-box.dtsi"
+
+/ {
+ compatible = "eledvb,h96mini", "rockchip,rk3228a-box", "rockchip,rk3229";
+ model = "Rockchip RK3228A Box H96 mini";
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_green {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led_red {
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ openvfd {
+ compatible = "open,vfd";
+ dev_name = "openvfd";
+ openvfd_gpio_clk = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ openvfd_gpio_dat = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ openvfd_display_type = <0x06000100>;
+ openvfd_dot_bits = [00 01 03 02 04 05 06];
+ };
+
+};
+
+&emmc {
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&gmac {
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&pinctrl {
+ wifi {
+ wifi_host_wake_l: wifi-host-wake-l {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ bt {
+ bt_host_wake_l: bt-host-wake-l {
+ rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_reg_on_h: bt-reg-on-h {
+ rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_l: bt-wake-l {
+ rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&power_key {
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD4 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ brcm,drive-strength = <5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake_l>;
+ };
+};
+
+&sdmmc {
+ disable-wp;
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ host-wakeup-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+ max-speed = <4000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
+ };
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/rk3228a-box.dts b/arch/arm/boot/dts/rk3228a-box.dts
new file mode 100644
index 000000000..e68ef44b9
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include "rk3228a-box.dtsi"
+
+/ {
+ model = "Rockchip RK3228A Box";
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_blue {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led_red {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+};
+
+&emmc {
+ status = "okay";
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&sdio {
+ status = "okay";
+};
+
+&sdmmc {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/rk3228a-box.dtsi b/arch/arm/boot/dts/rk3228a-box.dtsi
new file mode 100644
index 000000000..056945c6c
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk322x-box-dcdc.dtsi"
+
+/ {
+
+ model = "Rockchip RK3228A Box";
+ compatible = "rockchip,rk3228a-box", "rockchip,rk3229";
+
+};
diff --git a/arch/arm/boot/dts/rk3229-box-a95xr1.dts b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
new file mode 100644
index 000000000..b3695fb0b
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3229-box.dtsi"
+
+/ {
+ model = "Rockchip RK3229 Box A95X-R1";
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_blue {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led_red {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "rc-feedback";
+ };
+ };
+
+};
+
+&emmc {
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&gmac {
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&power_key {
+ status = "okay";
+};
+
+&sdio {
+ status = "okay";
+};
+
+&sdmmc {
+ disable-wp;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/rk3229-box.dts b/arch/arm/boot/dts/rk3229-box.dts
new file mode 100644
index 000000000..b63e61cda
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include "rk3229-box.dtsi"
+
+/ {
+ model = "Rockchip RK3229 Box";
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_green {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led_red {
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+&emmc {
+ status = "okay";
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&power_key {
+ status = "okay";
+};
+
+&sdio {
+ status = "okay";
+};
+
+&sdmmc {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
diff --git a/arch/arm/boot/dts/rk3229-box.dtsi b/arch/arm/boot/dts/rk3229-box.dtsi
new file mode 100644
index 000000000..4499b8535
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk322x-box-dcdc.dtsi"
+#include "rk3229-cpu-opp.dtsi"
+
+/ {
+
+ model = "Rockchip RK3229 Box";
+ compatible = "rockchip,rk3229-box", "rockchip,rk3229";
+
+};
diff --git a/arch/arm/boot/dts/rk3229-cpu-opp.dtsi b/arch/arm/boot/dts/rk3229-cpu-opp.dtsi
new file mode 100644
index 000000000..c1c7613ba
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-cpu-opp.dtsi
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/ {
+ compatible = "rockchip,rk3229";
+
+ /delete-node/ opp-table0;
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <950000 950000 1400000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000 975000 1400000>;
+ };
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000 1000000 1400000>;
+ };
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000 1175000 1400000>;
+ };
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000 1275000 1400000>;
+ };
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1325000 1325000 1400000>;
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1350000 1350000 1400000>;
+ };
+ opp-1464000000 {
+ opp-hz = /bits/ 64 <1464000000>;
+ opp-microvolt = <1400000 1400000 1400000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/rk322x-box-dcdc.dtsi b/arch/arm/boot/dts/rk322x-box-dcdc.dtsi
new file mode 100644
index 000000000..34273f3ff
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box-dcdc.dtsi
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk322x-box.dtsi"
+
+/ {
+
+ vcc_host: vcc-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc_host";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+
+ vcc_otg: vcc-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
+ regulator-name = "vcc_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-name = "vcc_phy";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vccio_1v8>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vdd_arm: vdd-arm-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 2000 0>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <90 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 0>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <100 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&gmac {
+ phy-supply = <&vcc_phy>;
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_down>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-0 = <&pwm2_pin_pull_up>;
+ status = "okay";
+};
+
+&u2phy0 {
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy1 {
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
new file mode 100644
index 000000000..ef5fa28d8
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/clock/rk3228-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk322x.dtsi"
+
+/ {
+ model = "Rockchip RK322x Box";
+ compatible = "rockchip,rk3229";
+
+ chosen {
+ bootargs = "earlyprintk=uart8250,mmio32,0x11030000";
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ power_key: power-key {
+ label = "GPIO Key Power";
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <100>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
+ ir_receiver: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x40000000>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+ };
+
+ timer {
+ /delete-property/ arm,cpu-registers-not-fw-configured;
+ };
+};
+
+&cpu_alert1 {
+ temperature = <105000>;
+};
+
+&cpu_crit {
+ temperature = <115000>;
+};
+
+&cpu_thermal {
+ cooling-maps {
+ /delete-node/ map0;
+ };
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_GPLL>, <&cru ARMCLK>,
+ <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_VOP>;
+
+ assigned-clock-rates = <1200000000>, <816000000>,
+ <500000000>, <150000000>,
+ <150000000>, <75000000>,
+ <150000000>, <150000000>,
+ <75000000>, <400000000>;
+};
+
+&emmc {
+ cap-mmc-highspeed;
+ keep-power-in-suspend;
+ non-removable;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC_SRC>;
+ assigned-clock-rates = <50000000>;
+ clock_in_out = "output";
+ phy-handle = <&phy>;
+ phy-mode = "rmii";
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: phy@0 {
+ compatible = "ethernet-phy-id1234.d400",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ clocks = <&cru SCLK_MAC_PHY>;
+ phy-is-integrated;
+ resets = <&cru SRST_MACPHY>;
+ };
+ };
+};
+
+&gpu {
+ assigned-clocks = <&cru ACLK_GPU>;
+ assigned-clock-rates = <300000000>;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&hdmi_phy {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&pinctrl {
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_down: pwm1-pin-pull-down {
+ rockchip,pins = <0 RK_PD6 2 &pcfg_pull_down>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin_pull_up: pwm2-pin-pull-up {
+ rockchip,pins = <1 RK_PB4 2 &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ non-removable;
+ no-sd;
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ no-sdio;
+};
+
+&tsadc {
+ rockchip,grf = <&grf>;
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <1>;
+ rockchip,hw-tshut-temp = <120000>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart11_xfer &uart11_rts &uart11_cts>;
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_ehci {
+ status = "okay";
+};
+
+&usb_host2_ohci {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP>;
+ assigned-clock-parents = <&cru SCLK_HDMI_PHY>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
--
2.25.1

View File

@ -1,14 +0,0 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
index 6da7f7666..f9a8dcc2a 100644
--- a/arch/arm/boot/dts/rk322x-box.dtsi
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -66,9 +66,6 @@
reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
};
- timer {
- /delete-property/ arm,cpu-registers-not-fw-configured;
- };
};
&cpu_alert1 {

View File

@ -1,15 +0,0 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
index 44fb2f4ea..15d07a736 100644
--- a/arch/arm/boot/dts/rk322x-box.dtsi
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -89,6 +89,10 @@
cap-mmc-highspeed;
keep-power-in-suspend;
non-removable;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ /delete-property/ default-sample-phase;
+ rockchip,default-sample-phase = <180>;
};
&gmac {

View File

@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..22c401d9c
index 000000000000..f6e249bf81b6
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,498 @@
@@ -0,0 +1,752 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
@ -11,21 +11,30 @@ index 000000000..22c401d9c
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk322x-box.dtsi"
+#include "rk322x.dtsi"
+
+/ {
+
+ model = "Generic RK322x Tv Box board";
+
+ /delete-node/ leds;
+ compatible = "rockchip,rk3229";
+
+ /*
+ No need to reserve memory manually as long as u-boot v2020.10 and
+ OPTEE autoconfigure the reserved zones
+ * No need to reserve memory manually as long as u-boot v2020.10 and
+ * OPTEE autoconfigure the reserved zones
+ */
+ /delete-node/ reserved-memory;
+
+ /*
+ * We rebuild the cpu-opp-table by ourselves
+ */
+ /delete-node/ opp_table0;
+
+ /*
+ * Rebuild the thermal zones and cooling maps ourselved
+ */
+ /delete-node/ thermal-zones;
+
+ /*
+ * Include the mmc devices into aliases table
+ */
+ aliases {
@ -34,6 +43,52 @@ index 000000000..22c401d9c
+ mmc2 = &emmc;
+ };
+
+ analog-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "analog";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
+ chosen {
+ bootargs = "earlyprintk=uart8250,mmio32,0x11030000";
+ };
+
+ cpu0_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+ gpio_leds: gpio-leds {
+
+ compatible = "gpio-leds";
@ -52,9 +107,6 @@ index 000000000..22c401d9c
+
+ };
+
+ // Remove the gpio-keys node from included dtsi
+ /delete-node/gpio_keys;
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
@ -64,6 +116,23 @@ index 000000000..22c401d9c
+
+ };
+
+ ir_receiver: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ status = "okay";
+ linux,rc-map-name = "rc-rk322x-tvbox";
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+ };
+
+
+ spdif_out: spdif-out {
+ status = "okay";
+ compatible = "linux,spdif-dit";
@ -82,20 +151,6 @@ index 000000000..22c401d9c
+ };
+ };
+
+ analog-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "analog";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
@ -182,48 +237,175 @@ index 000000000..22c401d9c
+ regulator-boot-on;
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /*
+ * The 408 Mhz node causes system instabilities on some systems.
+ * Remove it also because it is too slow.
+ */
+ /delete-node/opp-408000000;
+ thermal-sensors = <&tsadc 0>;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ trips {
+ cpu_alert0: cpu_alert0 {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_alert1: cpu_alert1 {
+ temperature = <95000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_crit: cpu_crit {
+ temperature = <105000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+
+ cpu_throttle_low: map-cpu-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT 1>,
+ <&cpu1 THERMAL_NO_LIMIT 1>,
+ <&cpu2 THERMAL_NO_LIMIT 1>,
+ <&cpu3 THERMAL_NO_LIMIT 1>;
+ };
+
+ cpu_throttle_high: map-cpu-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ gpu_throttle_low: map-gpu-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT 1>;
+ };
+
+ gpu_throttle_high: map-gpu-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ dmc_throttle_low: map-dmc-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device = <&dmc THERMAL_NO_LIMIT 1>;
+ };
+
+ dmc_throttle_high: map-dmc-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device = <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ };
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+};
+
+&codec {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_GPLL>, <&cru ARMCLK>,
+ <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_VOP>;
+
+ assigned-clock-rates = <1200000000>, <816000000>,
+ <500000000>, <150000000>,
+ <150000000>, <75000000>,
+ <150000000>, <150000000>,
+ <75000000>, <400000000>;
+};
+
+&dmc {
+ logic-supply = <&vdd_log>;
+};
+
+&emmc {
+ cap-mmc-highspeed;
+ keep-power-in-suspend;
+ non-removable;
+ status = "okay";
+ /delete-property/ mmc-ddr-1_8v;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ /delete-property/ rockchip,default-sample-phase;
+ rockchip,default-sample-phase = <180>;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC_SRC>;
+ assigned-clock-rates = <50000000>;
+ clock_in_out = "output";
+ phy-handle = <&phy>;
+ phy-mode = "rmii";
+ phy-supply = <&vcc_phy>;
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: phy@0 {
+ compatible = "ethernet-phy-id1234.d400",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ clocks = <&cru SCLK_MAC_PHY>;
+ phy-is-integrated;
+ resets = <&cru SRST_MACPHY>;
+ };
+ };
+};
+
+&gpu {
+ assigned-clocks = <&cru ACLK_GPU>;
+ assigned-clock-rates = <300000000>;
+ mali-supply = <&vdd_log>;
+};
+
+&gpu_opp_table {
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1100000 1000000 1200000>;
+ };
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&nfc {
@ -250,43 +432,6 @@ index 000000000..22c401d9c
+
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&dmc {
+ logic-supply = <&vdd_log>;
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&gmac {
+ phy-supply = <&vcc_phy>;
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&iep {
+ status = "okay";
+};
@ -303,59 +448,27 @@ index 000000000..22c401d9c
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&hdmi_phy {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&i2s1 {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&codec {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&u2phy0 {
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy1 {
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ status = "okay";
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ status = "okay";
+};
+
+&spdif {
+ status = "okay";
+};
+
+/** Integration to pin controller */
+&pinctrl {
+
@ -482,7 +595,6 @@ index 000000000..22c401d9c
+
+ };
+
+
+ gpio {
+ gpio_led_working: gpio-led-working {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
@ -495,6 +607,28 @@ index 000000000..22c401d9c
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_down: pwm1-pin-pull-down {
+ rockchip,pins = <0 RK_PD6 2 &pcfg_pull_down>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin_pull_up: pwm2-pin-pull-up {
+ rockchip,pins = <1 RK_PB4 2 &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -502,3 +636,123 @@ index 000000000..22c401d9c
+ };
+
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart11_xfer &uart11_rts &uart11_cts>;
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_ehci {
+ status = "okay";
+};
+
+&usb_host2_ohci {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ non-removable;
+ no-sd;
+ status = "okay";
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ no-sdio;
+ status = "okay";
+};
+
+&spdif {
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,grf = <&grf>;
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <1>;
+ rockchip,hw-tshut-temp = <110000>;
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP>;
+ assigned-clock-parents = <&cru SCLK_HDMI_PHY>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};

View File

@ -1,13 +1,13 @@
From 54e2037602d5adc04e3766e4ab50df18b60ef448 Mon Sep 17 00:00:00 2001
From 00fdb8cff230e2d6592e7eddb661e86a680154d9 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sun, 24 Jul 2022 15:09:13 +0000
Subject: [PATCH] Add rk322x overlays
Date: Sun, 28 Aug 2022 14:05:25 +0000
Subject: [PATCH] add rk322x overlays
---
arch/arm/boot/dts/overlay/Makefile | 38 ++++++
arch/arm/boot/dts/overlay/Makefile | 39 ++++++
.../boot/dts/overlay/README.rk322x-overlays | 90 ++++++++++++++
.../arm/boot/dts/overlay/rk322x-bt-8723cs.dts | 19 +++
.../arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts | 66 ++++++++++
.../arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts | 68 +++++++++++
arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts | 28 +++++
.../boot/dts/overlay/rk322x-cpu-stability.dts | 52 ++++++++
arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts | 28 +++++
@ -31,7 +31,7 @@ Subject: [PATCH] Add rk322x overlays
arch/arm/boot/dts/overlay/rk322x-nand.dts | 22 ++++
.../dts/overlay/rk322x-usb-otg-peripheral.dts | 11 ++
.../dts/overlay/rk322x-wlan-alt-wiring.dts | 67 ++++++++++
27 files changed, 1205 insertions(+)
27 files changed, 1208 insertions(+)
create mode 100755 arch/arm/boot/dts/overlay/Makefile
create mode 100755 arch/arm/boot/dts/overlay/README.rk322x-overlays
create mode 100644 arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
@ -62,7 +62,7 @@ Subject: [PATCH] Add rk322x overlays
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 00000000000..661081dcb6e
index 000000000000..36340c3162ce
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,39 @@
@ -107,7 +107,7 @@ index 00000000000..661081dcb6e
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100755
index 00000000000..1c366d80921
index 000000000000..1c366d809212
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,90 @@
@ -203,7 +203,7 @@ index 00000000000..1c366d80921
+of USB host
diff --git a/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
new file mode 100644
index 00000000000..48bb04f779f
index 000000000000..48bb04f779fa
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
@@ -0,0 +1,19 @@
@ -228,10 +228,10 @@ index 00000000000..48bb04f779f
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
new file mode 100755
index 00000000000..de3522e381c
index 000000000000..5f7d2dcf42d0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
@@ -0,0 +1,65 @@
@@ -0,0 +1,68 @@
+/dts-v1/;
+/plugin/;
+
@ -258,7 +258,7 @@ index 00000000000..de3522e381c
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1225000 1225000 1275000>;
+ opp-microvolt = <1225000 1225000 1275000>;
+ };
+ };
+ };
@ -272,6 +272,9 @@ index 00000000000..de3522e381c
+ opp-300000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
+ opp-400000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
+ opp-500000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
@ -299,7 +302,7 @@ index 00000000000..de3522e381c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
new file mode 100755
index 00000000000..1c2fc79e1cc
index 000000000000..1c2fc79e1ccf
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@@ -0,0 +1,28 @@
@ -333,7 +336,7 @@ index 00000000000..1c2fc79e1cc
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 00000000000..f434af9268f
index 000000000000..f434af9268fb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
@ -391,7 +394,7 @@ index 00000000000..f434af9268f
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
new file mode 100644
index 00000000000..78145548ed7
index 000000000000..78145548ed7c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
@@ -0,0 +1,28 @@
@ -425,7 +428,7 @@ index 00000000000..78145548ed7
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
new file mode 100644
index 00000000000..dbbd222dd8d
index 000000000000..dbbd222dd8df
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
@@ -0,0 +1,28 @@
@ -459,7 +462,7 @@ index 00000000000..dbbd222dd8d
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
new file mode 100644
index 00000000000..65b707515bf
index 000000000000..65b707515bfb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
@@ -0,0 +1,28 @@
@ -493,7 +496,7 @@ index 00000000000..65b707515bf
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
new file mode 100644
index 00000000000..7d11453adf9
index 000000000000..7d11453adf9d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
@@ -0,0 +1,28 @@
@ -527,7 +530,7 @@ index 00000000000..7d11453adf9
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
new file mode 100644
index 00000000000..4ba0afb8a3a
index 000000000000..4ba0afb8a3a4
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
@@ -0,0 +1,14 @@
@ -547,7 +550,7 @@ index 00000000000..4ba0afb8a3a
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
new file mode 100644
index 00000000000..73104525de5
index 000000000000..73104525de57
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
@@ -0,0 +1,14 @@
@ -567,7 +570,7 @@ index 00000000000..73104525de5
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
new file mode 100644
index 00000000000..6ea81f5e74b
index 000000000000..6ea81f5e74b0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
@@ -0,0 +1,13 @@
@ -586,7 +589,7 @@ index 00000000000..6ea81f5e74b
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
new file mode 100644
index 00000000000..0074d029ac8
index 000000000000..0074d029ac84
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
@@ -0,0 +1,22 @@
@ -614,7 +617,7 @@ index 00000000000..0074d029ac8
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
new file mode 100755
index 00000000000..0a59ee30e5e
index 000000000000..0a59ee30e5ee
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@@ -0,0 +1,20 @@
@ -640,7 +643,7 @@ index 00000000000..0a59ee30e5e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
new file mode 100755
index 00000000000..d4c39e20a3a
index 000000000000..d4c39e20a3a2
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@@ -0,0 +1,4 @@
@ -650,7 +653,7 @@ index 00000000000..d4c39e20a3a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
new file mode 100644
index 00000000000..7e4b35e333e
index 000000000000..7e4b35e333e7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
@@ -0,0 +1,22 @@
@ -678,7 +681,7 @@ index 00000000000..7e4b35e333e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100755
index 00000000000..6846109d300
index 000000000000..6846109d3008
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,64 @@
@ -748,7 +751,7 @@ index 00000000000..6846109d300
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100755
index 00000000000..40bdd5421d6
index 000000000000..40bdd5421d68
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,64 @@
@ -818,7 +821,7 @@ index 00000000000..40bdd5421d6
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
new file mode 100755
index 00000000000..03c99ef8b6a
index 000000000000..03c99ef8b6ad
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
@@ -0,0 +1,64 @@
@ -888,7 +891,7 @@ index 00000000000..03c99ef8b6a
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
new file mode 100644
index 00000000000..0ebd846ebef
index 000000000000..0ebd846ebefb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
@@ -0,0 +1,81 @@
@ -975,7 +978,7 @@ index 00000000000..0ebd846ebef
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
new file mode 100755
index 00000000000..f74687eedc9
index 000000000000..f74687eedc9e
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
@@ -0,0 +1,97 @@
@ -1078,7 +1081,7 @@ index 00000000000..f74687eedc9
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
new file mode 100644
index 00000000000..045ab24932c
index 000000000000..045ab24932c4
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
@@ -0,0 +1,115 @@
@ -1199,7 +1202,7 @@ index 00000000000..045ab24932c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
new file mode 100644
index 00000000000..dda826d6d6e
index 000000000000..dda826d6d6e9
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
@@ -0,0 +1,106 @@
@ -1311,7 +1314,7 @@ index 00000000000..dda826d6d6e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
new file mode 100755
index 00000000000..2a939ab492c
index 000000000000..2a939ab492c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@@ -0,0 +1,22 @@
@ -1339,7 +1342,7 @@ index 00000000000..2a939ab492c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
new file mode 100644
index 00000000000..01e03d816c1
index 000000000000..01e03d816c1d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
@@ -0,0 +1,11 @@
@ -1356,7 +1359,7 @@ index 00000000000..01e03d816c1
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
new file mode 100755
index 00000000000..f04c9ac166b
index 000000000000..f04c9ac166be
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
@@ -0,0 +1,67 @@

View File

@ -0,0 +1,119 @@
From f14539f8d08328ae5aad165a4deea25c7d6b09bf Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Mon, 25 Apr 2022 13:25:09 +0000
Subject: [PATCH] add generic rk322x tv box remote controller keymap
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-rk322x-tvbox.c | 74 ++++++++++++++++++++++
include/media/rc-map.h | 1 +
3 files changed, 77 insertions(+)
create mode 100644 drivers/media/rc/keymaps/rc-rk322x-tvbox.c
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 5fe5c9e1a46..1aa49b78a65 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-rc6-mce.o \
rc-real-audio-220-32-keys.o \
rc-reddo.o \
+ rc-rk322x-tvbox.o \
rc-snapstream-firefly.o \
rc-streamzap.o \
rc-tanix-tx3mini.o \
diff --git a/drivers/media/rc/keymaps/rc-rk322x-tvbox.c b/drivers/media/rc/keymaps/rc-rk322x-tvbox.c
new file mode 100644
index 00000000000..91e24ee52ee
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-rk322x-tvbox.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+
+// rc-rk322x-tvbox.c - Keytable for rk322x generic tv box remote controller
+//
+// keymap imported from ir-keymaps.c
+//
+// Copyright (c) 2022 Paolo Sabatino
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+/*
+
+*/
+
+static struct rc_map_table rk322x_tvbox[] = {
+
+ { 0x40400d, KEY_ENTER },
+ { 0x40404d, KEY_POWER },
+ { 0x40401e, KEY_PREVIOUSSONG },
+ { 0x40401f, KEY_NEXTSONG },
+ { 0x404001, KEY_1 },
+ { 0x404002, KEY_2 },
+ { 0x404003, KEY_3 },
+ { 0x404004, KEY_4 },
+ { 0x404005, KEY_5 },
+ { 0x404006, KEY_6 },
+ { 0x404007, KEY_7 },
+ { 0x404008, KEY_8 },
+ { 0x404009, KEY_9 },
+ { 0x404000, KEY_0 },
+ { 0x40400c, KEY_BACKSPACE },
+ { 0x404044, KEY_F6 },
+ { 0x40401a, KEY_HOME },
+ { 0x404042, KEY_BACK },
+ { 0x404045, KEY_MENU },
+ { 0x40400f, KEY_TEXT },
+ { 0x404010, KEY_LEFT },
+ { 0x404011, KEY_RIGHT },
+ { 0x40400e, KEY_DOWN },
+ { 0x40400b, KEY_UP },
+ { 0x40401c, KEY_VOLUMEDOWN },
+ { 0x404043, KEY_MUTE },
+ { 0x404015, KEY_VOLUMEUP },
+ { 0x404053, KEY_F1 },
+ { 0x40405b, KEY_F2 },
+ { 0x404057, KEY_F3 },
+ { 0x404054, KEY_F4 },
+
+};
+
+static struct rc_map_list rk322x_tvbox_map = {
+ .map = {
+ .scan = rk322x_tvbox,
+ .size = ARRAY_SIZE(rk322x_tvbox),
+ .rc_proto = RC_PROTO_NEC, /* Legacy IR type */
+ .name = RC_MAP_RK322X_TVBOX,
+ }
+};
+
+static int __init init_rc_map_rk322x_tvbox(void)
+{
+ return rc_map_register(&rk322x_tvbox_map);
+}
+
+static void __exit exit_rc_map_rk322x_tvbox(void)
+{
+ rc_map_unregister(&rk322x_tvbox_map);
+}
+
+module_init(init_rc_map_rk322x_tvbox)
+module_exit(exit_rc_map_rk322x_tvbox)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paolo Sabatino");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index 793b54342df..35aba84be9f 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -310,6 +310,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_RC6_MCE "rc-rc6-mce"
#define RC_MAP_REAL_AUDIO_220_32_KEYS "rc-real-audio-220-32-keys"
#define RC_MAP_REDDO "rc-reddo"
+#define RC_MAP_RK322X_TVBOX "rc-rk322x-tvbox"
#define RC_MAP_SNAPSTREAM_FIREFLY "rc-snapstream-firefly"
#define RC_MAP_STREAMZAP "rc-streamzap"
#define RC_MAP_SU3000 "rc-su3000"
--
2.30.2

View File

@ -1,291 +0,0 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
new file mode 100644
index 000000000..ef5fa28d8
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/clock/rk3228-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk322x.dtsi"
+
+/ {
+ model = "Rockchip RK322x Box";
+ compatible = "rockchip,rk3229";
+
+ chosen {
+ bootargs = "earlyprintk=uart8250,mmio32,0x11030000";
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ power_key: power-key {
+ label = "GPIO Key Power";
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <100>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
+ ir_receiver: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x40000000>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+ };
+
+ timer {
+ /delete-property/ arm,cpu-registers-not-fw-configured;
+ };
+};
+
+&cpu_alert1 {
+ temperature = <105000>;
+};
+
+&cpu_crit {
+ temperature = <115000>;
+};
+
+&cpu_thermal {
+ cooling-maps {
+ /delete-node/ map0;
+ };
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_GPLL>, <&cru ARMCLK>,
+ <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_VOP>;
+
+ assigned-clock-rates = <1200000000>, <816000000>,
+ <500000000>, <150000000>,
+ <150000000>, <75000000>,
+ <150000000>, <150000000>,
+ <75000000>, <400000000>;
+};
+
+&emmc {
+ cap-mmc-highspeed;
+ keep-power-in-suspend;
+ non-removable;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC_SRC>;
+ assigned-clock-rates = <50000000>;
+ clock_in_out = "output";
+ phy-handle = <&phy>;
+ phy-mode = "rmii";
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: phy@0 {
+ compatible = "ethernet-phy-id1234.d400",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ clocks = <&cru SCLK_MAC_PHY>;
+ phy-is-integrated;
+ resets = <&cru SRST_MACPHY>;
+ };
+ };
+};
+
+&gpu {
+ assigned-clocks = <&cru ACLK_GPU>;
+ assigned-clock-rates = <300000000>;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&hdmi_phy {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&pinctrl {
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_down: pwm1-pin-pull-down {
+ rockchip,pins = <0 RK_PD6 2 &pcfg_pull_down>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin_pull_up: pwm2-pin-pull-up {
+ rockchip,pins = <1 RK_PB4 2 &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ non-removable;
+ no-sd;
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ no-sdio;
+};
+
+&tsadc {
+ rockchip,grf = <&grf>;
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <1>;
+ rockchip,hw-tshut-temp = <120000>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart11_xfer &uart11_rts &uart11_cts>;
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_ehci {
+ status = "okay";
+};
+
+&usb_host2_ohci {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP>;
+ assigned-clock-parents = <&cru SCLK_HDMI_PHY>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
--
2.25.1

View File

@ -1,14 +0,0 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
index 6da7f7666..f9a8dcc2a 100644
--- a/arch/arm/boot/dts/rk322x-box.dtsi
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -66,9 +66,6 @@
reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
};
- timer {
- /delete-property/ arm,cpu-registers-not-fw-configured;
- };
};
&cpu_alert1 {

View File

@ -1,15 +0,0 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
index 44fb2f4ea..15d07a736 100644
--- a/arch/arm/boot/dts/rk322x-box.dtsi
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -89,6 +89,10 @@
cap-mmc-highspeed;
keep-power-in-suspend;
non-removable;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ /delete-property/ default-sample-phase;
+ rockchip,default-sample-phase = <180>;
};
&gmac {

View File

@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..22c401d9c
index 000000000000..f6e249bf81b6
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,501 @@
@@ -0,0 +1,752 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
@ -11,21 +11,30 @@ index 000000000..22c401d9c
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk322x-box.dtsi"
+#include "rk322x.dtsi"
+
+/ {
+
+ model = "Generic RK322x Tv Box board";
+
+ /delete-node/ leds;
+ compatible = "rockchip,rk3229";
+
+ /*
+ No need to reserve memory manually as long as u-boot v2020.10 and
+ OPTEE autoconfigure the reserved zones
+ * No need to reserve memory manually as long as u-boot v2020.10 and
+ * OPTEE autoconfigure the reserved zones
+ */
+ /delete-node/ reserved-memory;
+
+ /*
+ * We rebuild the cpu-opp-table by ourselves
+ */
+ /delete-node/ opp-table-0;
+
+ /*
+ * Rebuild the thermal zones and cooling maps ourselved
+ */
+ /delete-node/ thermal-zones;
+
+ /*
+ * Include the mmc devices into aliases table
+ */
+ aliases {
@ -34,6 +43,52 @@ index 000000000..22c401d9c
+ mmc2 = &emmc;
+ };
+
+ analog-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "analog";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
+ chosen {
+ bootargs = "earlyprintk=uart8250,mmio32,0x11030000";
+ };
+
+ cpu0_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+ gpio_leds: gpio-leds {
+
+ compatible = "gpio-leds";
@ -52,9 +107,6 @@ index 000000000..22c401d9c
+
+ };
+
+ // Remove the gpio-keys node from included dtsi
+ /delete-node/gpio_keys;
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
@ -64,6 +116,23 @@ index 000000000..22c401d9c
+
+ };
+
+ ir_receiver: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ status = "okay";
+ linux,rc-map-name = "rc-rk322x-tvbox";
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+ };
+
+
+ spdif_out: spdif-out {
+ status = "okay";
+ compatible = "linux,spdif-dit";
@ -82,20 +151,6 @@ index 000000000..22c401d9c
+ };
+ };
+
+ analog-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "analog";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
@ -182,50 +237,175 @@ index 000000000..22c401d9c
+ regulator-boot-on;
+ };
+
+ /delete-node/ opp-table-0;
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ cpu0_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ thermal-sensors = <&tsadc 0>;
+
+ /*
+ * The 408 Mhz node causes system instabilities on some systems.
+ * Remove it also because it is too slow.
+ */
+ /delete-node/opp-408000000;
+ trips {
+ cpu_alert0: cpu_alert0 {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_alert1: cpu_alert1 {
+ temperature = <95000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_crit: cpu_crit {
+ temperature = <105000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ cooling-maps {
+
+ cpu_throttle_low: map-cpu-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT 1>,
+ <&cpu1 THERMAL_NO_LIMIT 1>,
+ <&cpu2 THERMAL_NO_LIMIT 1>,
+ <&cpu3 THERMAL_NO_LIMIT 1>;
+ };
+
+ cpu_throttle_high: map-cpu-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ gpu_throttle_low: map-gpu-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT 1>;
+ };
+
+ gpu_throttle_high: map-gpu-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ dmc_throttle_low: map-dmc-throttle-low {
+ trip = <&cpu_alert0>;
+ cooling-device = <&dmc THERMAL_NO_LIMIT 1>;
+ };
+
+ dmc_throttle_high: map-dmc-throttle-high {
+ trip = <&cpu_alert1>;
+ cooling-device = <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ };
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+};
+
+&codec {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_GPLL>, <&cru ARMCLK>,
+ <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_VOP>;
+
+ assigned-clock-rates = <1200000000>, <816000000>,
+ <500000000>, <150000000>,
+ <150000000>, <75000000>,
+ <150000000>, <150000000>,
+ <75000000>, <400000000>;
+};
+
+&dmc {
+ logic-supply = <&vdd_log>;
+};
+
+&emmc {
+ cap-mmc-highspeed;
+ keep-power-in-suspend;
+ non-removable;
+ status = "okay";
+ /delete-property/ mmc-ddr-1_8v;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ /delete-property/ rockchip,default-sample-phase;
+ rockchip,default-sample-phase = <180>;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC_SRC>;
+ assigned-clock-rates = <50000000>;
+ clock_in_out = "output";
+ phy-handle = <&phy>;
+ phy-mode = "rmii";
+ phy-supply = <&vcc_phy>;
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: phy@0 {
+ compatible = "ethernet-phy-id1234.d400",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ clocks = <&cru SCLK_MAC_PHY>;
+ phy-is-integrated;
+ resets = <&cru SRST_MACPHY>;
+ };
+ };
+};
+
+&gpu {
+ assigned-clocks = <&cru ACLK_GPU>;
+ assigned-clock-rates = <300000000>;
+ mali-supply = <&vdd_log>;
+};
+
+&gpu_opp_table {
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1100000 1000000 1200000>;
+ };
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&nfc {
@ -252,43 +432,6 @@ index 000000000..22c401d9c
+
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&dmc {
+ logic-supply = <&vdd_log>;
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&gmac {
+ phy-supply = <&vcc_phy>;
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&iep {
+ status = "okay";
+};
@ -305,60 +448,27 @@ index 000000000..22c401d9c
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&hdmi_phy {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&i2s1 {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&codec {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&u2phy0 {
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy1 {
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&ir_receiver {
+ linux,rc-map-name = "rc-rk322x-tvbox";
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ status = "okay";
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ status = "okay";
+};
+
+&spdif {
+ status = "okay";
+};
+
+/** Integration to pin controller */
+&pinctrl {
+
@ -485,7 +595,6 @@ index 000000000..22c401d9c
+
+ };
+
+
+ gpio {
+ gpio_led_working: gpio-led-working {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
@ -498,6 +607,28 @@ index 000000000..22c401d9c
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_down: pwm1-pin-pull-down {
+ rockchip,pins = <0 RK_PD6 2 &pcfg_pull_down>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin_pull_up: pwm2-pin-pull-up {
+ rockchip,pins = <1 RK_PB4 2 &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -505,3 +636,123 @@ index 000000000..22c401d9c
+ };
+
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart11_xfer &uart11_rts &uart11_cts>;
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy0_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy0_host {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ };
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_otg>;
+ };
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy1_host {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_ehci {
+ status = "okay";
+};
+
+&usb_host2_ohci {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ non-removable;
+ no-sd;
+ status = "okay";
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ no-sdio;
+ status = "okay";
+};
+
+&spdif {
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,grf = <&grf>;
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <1>;
+ rockchip,hw-tshut-temp = <110000>;
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP>;
+ assigned-clock-parents = <&cru SCLK_HDMI_PHY>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};

View File

@ -1,13 +1,13 @@
From 54e2037602d5adc04e3766e4ab50df18b60ef448 Mon Sep 17 00:00:00 2001
From 00fdb8cff230e2d6592e7eddb661e86a680154d9 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sun, 24 Jul 2022 15:09:13 +0000
Subject: [PATCH] Add rk322x overlays
Date: Sun, 28 Aug 2022 14:05:25 +0000
Subject: [PATCH] add rk322x overlays
---
arch/arm/boot/dts/overlay/Makefile | 38 ++++++
arch/arm/boot/dts/overlay/Makefile | 39 ++++++
.../boot/dts/overlay/README.rk322x-overlays | 90 ++++++++++++++
.../arm/boot/dts/overlay/rk322x-bt-8723cs.dts | 19 +++
.../arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts | 66 ++++++++++
.../arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts | 68 +++++++++++
arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts | 28 +++++
.../boot/dts/overlay/rk322x-cpu-stability.dts | 52 ++++++++
arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts | 28 +++++
@ -31,7 +31,7 @@ Subject: [PATCH] Add rk322x overlays
arch/arm/boot/dts/overlay/rk322x-nand.dts | 22 ++++
.../dts/overlay/rk322x-usb-otg-peripheral.dts | 11 ++
.../dts/overlay/rk322x-wlan-alt-wiring.dts | 67 ++++++++++
27 files changed, 1205 insertions(+)
27 files changed, 1208 insertions(+)
create mode 100755 arch/arm/boot/dts/overlay/Makefile
create mode 100755 arch/arm/boot/dts/overlay/README.rk322x-overlays
create mode 100644 arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
@ -62,7 +62,7 @@ Subject: [PATCH] Add rk322x overlays
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 00000000000..661081dcb6e
index 000000000000..36340c3162ce
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,39 @@
@ -107,7 +107,7 @@ index 00000000000..661081dcb6e
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100755
index 00000000000..1c366d80921
index 000000000000..1c366d809212
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,90 @@
@ -203,7 +203,7 @@ index 00000000000..1c366d80921
+of USB host
diff --git a/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
new file mode 100644
index 00000000000..48bb04f779f
index 000000000000..48bb04f779fa
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
@@ -0,0 +1,19 @@
@ -228,10 +228,10 @@ index 00000000000..48bb04f779f
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
new file mode 100755
index 00000000000..de3522e381c
index 000000000000..5f7d2dcf42d0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
@@ -0,0 +1,65 @@
@@ -0,0 +1,68 @@
+/dts-v1/;
+/plugin/;
+
@ -258,7 +258,7 @@ index 00000000000..de3522e381c
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1225000 1225000 1275000>;
+ opp-microvolt = <1225000 1225000 1275000>;
+ };
+ };
+ };
@ -272,6 +272,9 @@ index 00000000000..de3522e381c
+ opp-300000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
+ opp-400000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
+ opp-500000000 {
+ opp-microvolt = <1050000 1050000 1200000>;
+ };
@ -299,7 +302,7 @@ index 00000000000..de3522e381c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
new file mode 100755
index 00000000000..1c2fc79e1cc
index 000000000000..1c2fc79e1ccf
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@@ -0,0 +1,28 @@
@ -333,7 +336,7 @@ index 00000000000..1c2fc79e1cc
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 00000000000..f434af9268f
index 000000000000..f434af9268fb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
@ -391,7 +394,7 @@ index 00000000000..f434af9268f
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
new file mode 100644
index 00000000000..78145548ed7
index 000000000000..78145548ed7c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
@@ -0,0 +1,28 @@
@ -425,7 +428,7 @@ index 00000000000..78145548ed7
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
new file mode 100644
index 00000000000..dbbd222dd8d
index 000000000000..dbbd222dd8df
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
@@ -0,0 +1,28 @@
@ -459,7 +462,7 @@ index 00000000000..dbbd222dd8d
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
new file mode 100644
index 00000000000..65b707515bf
index 000000000000..65b707515bfb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
@@ -0,0 +1,28 @@
@ -493,7 +496,7 @@ index 00000000000..65b707515bf
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
new file mode 100644
index 00000000000..7d11453adf9
index 000000000000..7d11453adf9d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
@@ -0,0 +1,28 @@
@ -527,7 +530,7 @@ index 00000000000..7d11453adf9
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
new file mode 100644
index 00000000000..4ba0afb8a3a
index 000000000000..4ba0afb8a3a4
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
@@ -0,0 +1,14 @@
@ -547,7 +550,7 @@ index 00000000000..4ba0afb8a3a
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
new file mode 100644
index 00000000000..73104525de5
index 000000000000..73104525de57
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
@@ -0,0 +1,14 @@
@ -567,7 +570,7 @@ index 00000000000..73104525de5
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
new file mode 100644
index 00000000000..6ea81f5e74b
index 000000000000..6ea81f5e74b0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
@@ -0,0 +1,13 @@
@ -586,7 +589,7 @@ index 00000000000..6ea81f5e74b
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
new file mode 100644
index 00000000000..0074d029ac8
index 000000000000..0074d029ac84
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
@@ -0,0 +1,22 @@
@ -614,7 +617,7 @@ index 00000000000..0074d029ac8
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
new file mode 100755
index 00000000000..0a59ee30e5e
index 000000000000..0a59ee30e5ee
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@@ -0,0 +1,20 @@
@ -640,7 +643,7 @@ index 00000000000..0a59ee30e5e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
new file mode 100755
index 00000000000..d4c39e20a3a
index 000000000000..d4c39e20a3a2
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@@ -0,0 +1,4 @@
@ -650,7 +653,7 @@ index 00000000000..d4c39e20a3a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
new file mode 100644
index 00000000000..7e4b35e333e
index 000000000000..7e4b35e333e7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
@@ -0,0 +1,22 @@
@ -678,7 +681,7 @@ index 00000000000..7e4b35e333e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100755
index 00000000000..6846109d300
index 000000000000..6846109d3008
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,64 @@
@ -748,7 +751,7 @@ index 00000000000..6846109d300
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100755
index 00000000000..40bdd5421d6
index 000000000000..40bdd5421d68
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,64 @@
@ -818,7 +821,7 @@ index 00000000000..40bdd5421d6
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
new file mode 100755
index 00000000000..03c99ef8b6a
index 000000000000..03c99ef8b6ad
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
@@ -0,0 +1,64 @@
@ -888,7 +891,7 @@ index 00000000000..03c99ef8b6a
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
new file mode 100644
index 00000000000..0ebd846ebef
index 000000000000..0ebd846ebefb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
@@ -0,0 +1,81 @@
@ -975,7 +978,7 @@ index 00000000000..0ebd846ebef
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
new file mode 100755
index 00000000000..f74687eedc9
index 000000000000..f74687eedc9e
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
@@ -0,0 +1,97 @@
@ -1078,7 +1081,7 @@ index 00000000000..f74687eedc9
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
new file mode 100644
index 00000000000..045ab24932c
index 000000000000..045ab24932c4
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
@@ -0,0 +1,115 @@
@ -1199,7 +1202,7 @@ index 00000000000..045ab24932c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
new file mode 100644
index 00000000000..dda826d6d6e
index 000000000000..dda826d6d6e9
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
@@ -0,0 +1,106 @@
@ -1311,7 +1314,7 @@ index 00000000000..dda826d6d6e
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
new file mode 100755
index 00000000000..2a939ab492c
index 000000000000..2a939ab492c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@@ -0,0 +1,22 @@
@ -1339,7 +1342,7 @@ index 00000000000..2a939ab492c
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
new file mode 100644
index 00000000000..01e03d816c1
index 000000000000..01e03d816c1d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
@@ -0,0 +1,11 @@
@ -1356,7 +1359,7 @@ index 00000000000..01e03d816c1
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
new file mode 100755
index 00000000000..f04c9ac166b
index 000000000000..f04c9ac166be
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
@@ -0,0 +1,67 @@