Merge branch 'master' of https://github.com/armbian/build
This commit is contained in:
commit
c8a163ce71
@ -1,12 +1,13 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 5.10.0-rc5 Kernel Configuration
|
||||
# Linux/arm64 5.10.1 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025"
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
CONFIG_GCC_VERSION=90201
|
||||
CONFIG_LD_VERSION=233010000
|
||||
CONFIG_GCC_VERSION=80300
|
||||
CONFIG_LD_VERSION=232000000
|
||||
CONFIG_CLANG_VERSION=0
|
||||
CONFIG_LLD_VERSION=0
|
||||
CONFIG_CC_CAN_LINK=y
|
||||
CONFIG_CC_CAN_LINK_STATIC=y
|
||||
CONFIG_CC_HAS_ASM_GOTO=y
|
||||
@ -184,6 +185,7 @@ CONFIG_RD_ZSTD=y
|
||||
CONFIG_BOOT_CONFIG=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_LD_ORPHAN_WARN=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
@ -447,10 +449,8 @@ CONFIG_ARM64_CNP=y
|
||||
# ARMv8.3 architectural features
|
||||
#
|
||||
CONFIG_ARM64_PTR_AUTH=y
|
||||
CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y
|
||||
CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y
|
||||
CONFIG_AS_HAS_PAC=y
|
||||
CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y
|
||||
# end of ARMv8.3 architectural features
|
||||
|
||||
#
|
||||
@ -465,11 +465,8 @@ CONFIG_ARM64_TLB_RANGE=y
|
||||
# ARMv8.5 architectural features
|
||||
#
|
||||
CONFIG_ARM64_BTI=y
|
||||
CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y
|
||||
CONFIG_ARM64_E0PD=y
|
||||
CONFIG_ARCH_RANDOM=y
|
||||
CONFIG_ARM64_AS_HAS_MTE=y
|
||||
CONFIG_ARM64_MTE=y
|
||||
# end of ARMv8.5 architectural features
|
||||
|
||||
CONFIG_ARM64_SVE=y
|
||||
@ -477,8 +474,6 @@ CONFIG_ARM64_MODULE_PLTS=y
|
||||
# CONFIG_ARM64_PSEUDO_NMI is not set
|
||||
CONFIG_RELOCATABLE=y
|
||||
# CONFIG_RANDOMIZE_BASE is not set
|
||||
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
|
||||
CONFIG_STACKPROTECTOR_PER_TASK=y
|
||||
# end of Kernel Features
|
||||
|
||||
#
|
||||
@ -736,6 +731,7 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
||||
CONFIG_ARCH_USE_MEMREMAP_PROT=y
|
||||
# CONFIG_LOCK_EVENT_COUNTS is not set
|
||||
CONFIG_ARCH_HAS_RELR=y
|
||||
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
@ -898,14 +894,12 @@ CONFIG_ZPOOL=y
|
||||
CONFIG_ZBUD=y
|
||||
CONFIG_Z3FOLD=y
|
||||
CONFIG_ZSMALLOC=y
|
||||
# CONFIG_ZSMALLOC_PGTABLE_MAPPING is not set
|
||||
# CONFIG_ZSMALLOC_STAT is not set
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
|
||||
# CONFIG_IDLE_PAGE_TRACKING is not set
|
||||
CONFIG_ARCH_HAS_PTE_DEVMAP=y
|
||||
CONFIG_FRAME_VECTOR=y
|
||||
CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
|
||||
# CONFIG_PERCPU_STATS is not set
|
||||
# CONFIG_GUP_BENCHMARK is not set
|
||||
# CONFIG_READ_ONLY_THP_FOR_FS is not set
|
||||
@ -3370,6 +3364,7 @@ CONFIG_MOUSE_PS2_SMBUS=y
|
||||
CONFIG_INPUT_JOYSTICK=y
|
||||
# CONFIG_JOYSTICK_ANALOG is not set
|
||||
# CONFIG_JOYSTICK_A3D is not set
|
||||
# CONFIG_JOYSTICK_ADC is not set
|
||||
# CONFIG_JOYSTICK_ADI is not set
|
||||
# CONFIG_JOYSTICK_COBRA is not set
|
||||
# CONFIG_JOYSTICK_GF2K is not set
|
||||
@ -7970,7 +7965,6 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y
|
||||
CONFIG_PHY_ROCKCHIP_USB=y
|
||||
CONFIG_PHY_SAMSUNG_USB2=y
|
||||
# CONFIG_PHY_TUSB1210 is not set
|
||||
# CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set
|
||||
# end of PHY Subsystem
|
||||
|
||||
# CONFIG_POWERCAP is not set
|
||||
@ -8312,6 +8306,7 @@ CONFIG_NFS_FSCACHE=y
|
||||
CONFIG_NFS_USE_KERNEL_DNS=y
|
||||
CONFIG_NFS_DEBUG=y
|
||||
CONFIG_NFS_DISABLE_UDP_SUPPORT=y
|
||||
CONFIG_NFS_V4_2_READ_PLUS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V2_ACL=y
|
||||
CONFIG_NFSD_V3=y
|
||||
|
||||
@ -5,23 +5,10 @@ Subject: [PATCH] Add board Helios64
|
||||
|
||||
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3399-kobol-helios64.dts | 1084 +++++++++++++++++
|
||||
2 files changed, 1085 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 473e14e12..b8e6e86e0 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-kobol-helios64.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-hugsun-x99.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
|
||||
new file mode 100644
|
||||
index 000000000..fae17f416
|
||||
|
||||
@ -1,15 +1,3 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 948195b49..48dccb95e 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
|
||||
new file mode 100644
|
||||
index 000000000..60358ab8c
|
||||
|
||||
@ -1,16 +1,3 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 92d796a33..24a6c304f 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -1,6 +1,8 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev00.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev20.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi
|
||||
new file mode 100644
|
||||
index 000000000..a3f5ff4bd
|
||||
|
||||
@ -1,15 +1,3 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index aed41ff1d..92d796a33 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi-4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4.dts
|
||||
new file mode 100644
|
||||
index 000000000..1e1747ceb
|
||||
|
||||
453
patch/kernel/rockchip64-dev/add-board-rk3328-roc-pc.patch
Normal file
453
patch/kernel/rockchip64-dev/add-board-rk3328-roc-pc.patch
Normal file
@ -0,0 +1,453 @@
|
||||
new file mode 100644
|
||||
index 000000000000..b85508c12742
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
|
||||
@@ -0,0 +1,447 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3328.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Firefly roc-rk3328-pc";
|
||||
+ compatible = "firefly,roc-rk3328-pc", "rockchip,rk3328";
|
||||
+
|
||||
+ gmac_clkin: external-gmac-clock {
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <125000000>;
|
||||
+ clock-output-names = "gmac_clkin";
|
||||
+ #clock-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: sdmmc-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0m1_pin>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sdio: sdmmcio-regulator {
|
||||
+ compatible = "regulator-gpio";
|
||||
+ gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>;
|
||||
+ states = <1800000 0x1
|
||||
+ 3300000 0x0>;
|
||||
+ regulator-name = "vcc_sdio";
|
||||
+ regulator-type = "voltage";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_host_5v: vcc-host-5v-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb30_host_drv>;
|
||||
+ regulator-name = "vcc_host_5v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb20_host_drv>;
|
||||
+ regulator-name = "vcc_host1_5v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: vcc-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_phy: vcc-phy-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_phy";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ ir-receiver {
|
||||
+ compatible = "gpio-ir-receiver";
|
||||
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
+ linux,rc-map-name = "rc-khadas";
|
||||
+ pinctrl-0 = <&ir_int>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ power_led: led-0 {
|
||||
+ label = "firefly:blue:power";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
|
||||
+ default-state = "on";
|
||||
+ mode = <0x23>;
|
||||
+ };
|
||||
+
|
||||
+ user_led: led-1 {
|
||||
+ label = "firefly:yellow:user";
|
||||
+ linux,default-trigger = "mmc1";
|
||||
+ gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
|
||||
+ default-state = "off";
|
||||
+ mode = <0x05>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_enable_h>;
|
||||
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&analog_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&codec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <150000000>;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
+ vmmc-supply = <&vcc_io>;
|
||||
+ vqmmc-supply = <&vcc18_emmc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gmac2io {
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-supply = <&vcc_phy>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ snps,aal;
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 50000>;
|
||||
+ snps,rxpbl = <0x4>;
|
||||
+ snps,txpbl = <0x4>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_logic>;
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmiphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ rk805: pmic@18 {
|
||||
+ compatible = "rockchip,rk805";
|
||||
+ reg = <0x18>;
|
||||
+ interrupt-parent = <&gpio1>;
|
||||
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "xin32k", "rk805-clkout2";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc5-supply = <&vcc_io>;
|
||||
+ vcc6-supply = <&vcc_io>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_arm: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_arm";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <950000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: DCDC_REG4 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_18: LDO_REG1 {
|
||||
+ regulator-name = "vcc_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc18_emmc: LDO_REG2 {
|
||||
+ regulator-name = "vcc18_emmc";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_10: LDO_REG3 {
|
||||
+ regulator-name = "vdd_10";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ vccio1-supply = <&vcc_io>;
|
||||
+ vccio2-supply = <&vcc18_emmc>;
|
||||
+ vccio3-supply = <&vcc_sdio>;
|
||||
+ vccio4-supply = <&vcc_18>;
|
||||
+ vccio5-supply = <&vcc_io>;
|
||||
+ vccio6-supply = <&vcc_io>;
|
||||
+ pmuio-supply = <&vcc_io>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&clk_32k_out>;
|
||||
+
|
||||
+ clk_32k {
|
||||
+ clk_32k_out: clk-32k-out {
|
||||
+ rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ir {
|
||||
+ ir_int: ir-int {
|
||||
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio-pwrseq {
|
||||
+ wifi_enable_h: wifi-enable-h {
|
||||
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_4ma>,
|
||||
+ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb2 {
|
||||
+ usb20_host_drv: usb20-host-drv {
|
||||
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb3 {
|
||||
+ usb30_host_drv: usb30-host-drv {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdmmc_ext {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ non-removable;
|
||||
+ num-slots = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0ext_bus4 &sdmmc0ext_cmd &sdmmc0ext_clk>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ max-frequency = <150000000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_sd>;
|
||||
+ vqmmc-supply = <&vcc_sdio>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy_host {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb20_otg {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
|
||||
@ -1,15 +1,3 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 1f18a9392..06ddfb869 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -3,6 +3,7 @@
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev00.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev20.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
|
||||
new file mode 100644
|
||||
index 000000000..52732643f
|
||||
|
||||
18
patch/kernel/rockchip64-dev/add-boards-to-dts-makefile.patch
Normal file
18
patch/kernel/rockchip64-dev/add-boards-to-dts-makefile.patch
Normal file
@ -0,0 +1,18 @@
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 26661c7b7..1462ed38b 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -1,4 +1,13 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev00.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev20.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-pc.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-kobol-helios64.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi-4.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
|
||||
@ -5,23 +5,10 @@ Subject: [PATCH] Add DT link for backward compatibility
|
||||
|
||||
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 1 +
|
||||
2 files changed, 2 insertions(+)
|
||||
create mode 120000 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index e91faee4a..8fb764404 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
new file mode 120000
|
||||
index 000000000..07e8a11b0
|
||||
@ -35,23 +35,10 @@ Changes for v3
|
||||
3 files changed, 227 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 221 ++++++++++++++++++
|
||||
2 files changed, 222 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 48fb631d5451..e56a5527bab4 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -2,6 +2,7 @@
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
new file mode 100644
|
||||
index 000000000000..4fccae43f008
|
||||
@ -0,0 +1,113 @@
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -346,12 +346,16 @@
|
||||
pd_gpu@RK3328_PD_GPU {
|
||||
reg = <RK3328_PD_GPU>;
|
||||
clocks = <&cru ACLK_GPU>;
|
||||
- };
|
||||
+ };
|
||||
pd_hevc@RK3328_PD_HEVC {
|
||||
reg = <RK3328_PD_HEVC>;
|
||||
};
|
||||
pd_video@RK3328_PD_VIDEO {
|
||||
reg = <RK3328_PD_VIDEO>;
|
||||
+ clocks = <&cru ACLK_RKVDEC>,
|
||||
+ <&cru HCLK_RKVDEC>,
|
||||
+ <&cru SCLK_VDEC_CABAC>,
|
||||
+ <&cru SCLK_VDEC_CORE>;
|
||||
};
|
||||
pd_vpu@RK3328_PD_VPU {
|
||||
reg = <RK3328_PD_VPU>;
|
||||
@@ -705,6 +709,7 @@
|
||||
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
|
||||
clock-names = "aclk", "iface";
|
||||
#iommu-cells = <0>;
|
||||
+ power-domains = <&power RK3328_PD_VIDEO>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -935,6 +940,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
max-frequency = <150000000>;
|
||||
+ resets = <&cru SRST_MMC0>;
|
||||
+ reset-names = "reset";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -947,6 +954,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
max-frequency = <150000000>;
|
||||
+ resets = <&cru SRST_SDIO>;
|
||||
+ reset-names = "reset";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -959,6 +968,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
max-frequency = <150000000>;
|
||||
+ resets = <&cru SRST_EMMC>;
|
||||
+ reset-names = "reset";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -1056,25 +1067,41 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ sdmmc_ext: dwmmc@ff5f0000 {
|
||||
+ compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
|
||||
+ reg = <0x0 0xff5f0000 0x0 0x4000>;
|
||||
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
|
||||
+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
|
||||
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
+ fifo-depth = <0x100>;
|
||||
+ max-frequency = <150000000>;
|
||||
+ resets = <&cru SRST_SDMMCEXT>;
|
||||
+ reset-names = "reset";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
usbdrd3: usb@ff600000 {
|
||||
compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3";
|
||||
- clocks = <&cru SCLK_USB3OTG_REF>, <&cru ACLK_USB3OTG>,
|
||||
- <&cru SCLK_USB3OTG_SUSPEND>;
|
||||
- clock-names = "ref", "bus_early",
|
||||
- "suspend";
|
||||
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
|
||||
+ <&cru ACLK_USB3OTG>;
|
||||
+ clock-names = "ref_clk", "suspend_clk",
|
||||
+ "bus_clk";
|
||||
+ resets = <&cru SRST_USB3OTG>;
|
||||
+ reset-names = "usb3-otg";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
- clock-ranges;
|
||||
status = "disabled";
|
||||
|
||||
usbdrd_dwc3: dwc3@ff600000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0xff600000 0x0 0x100000>;
|
||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru ACLK_USB3OTG>,
|
||||
+ <&cru SCLK_USB3OTG_SUSPEND>;
|
||||
+ clock-names = "ref", "bus_early", "suspend";
|
||||
dr_mode = "otg";
|
||||
- phys = <&u3phy_utmi>, <&u3phy_pipe>;
|
||||
- phy-names = "usb2-phy", "usb3-phy";
|
||||
phy_type = "utmi_wide";
|
||||
snps,dis_enblslpm_quirk;
|
||||
snps,dis-u2-freeclk-exists-quirk;
|
||||
@@ -1082,7 +1109,6 @@
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis-del-phy-power-chg-quirk;
|
||||
snps,dis-tx-ipgap-linecheck-quirk;
|
||||
- snps,xhci-trb-ent-quirk;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user