Helios64: update uBoot to v2026-01-rc5

- Switched to the binman-atf-mainline scenario with the same rkbin DDR blob rk3399_ddr_933MHz_v1.25.bin (TPL blob, as in the old working loader). DRAM init is correct, full 4 GB visible, Linux boots. - U-Boot and DTS updated to v2026.01-rc5. Added MDIO/PHY node and phy-handle in rk3399-kobol- helios64.dts, fixing “mdio node is missing”. Disabled i2s2 in the U-Boot DT to avoid rockchip- i2s ... Could not register PCM. - boot_targets in U-Boot config shortened (mmc1, scsi0, usb0, pxe, dhcp) to avoid env_buf ... too small; however, the last built binary still shows the warning (needs rebuild with the shortened list or enlarging the buffer). - Boot flow: bootstd scans SD (mmc0) and eMMC (mmc1); SD boot works even without mmc0 in boot_targets. - Other changes: defconfig has CONFIG_ROCKCHIP_EXTERNAL_TPL=y to use the external DDR blob. Boots.
2025-12-24 01:30:56 +00:00 · 2025-12-24 01:30:56 +00:00 · c60f78e0ec
commit c60f78e0ec
parent 660c52bc53
15 changed files with 2181 additions and 2 deletions
--- a/config/boards/helios64.conf
+++ b/config/boards/helios64.conf
@ -4,7 +4,10 @@ BOARD_VENDOR="kobol"
 BOARDFAMILY="rockchip64" # Used to be rk3399
 BOARD_MAINTAINER="prahal"
 BOOTCONFIG="helios64-rk3399_defconfig"
-BOOT_SCENARIO="tpl-blob-atf-mainline"
+BOOTBRANCH="tag:v2026.01"
+BOOTPATCHDIR="v2026.01/board_helios64"
+BOOT_SCENARIO="binman-atf-mainline"
+DDR_BLOB="rk33/rk3399_ddr_933MHz_v1.25.bin"
 KERNEL_TARGET="current,edge"
 KERNEL_TEST_TARGET="current"
 MODULES="lm75 ledtrig-netdev"
--- a/patch/u-boot/v2026.01/0000.patching_config.yaml
+++ b/patch/u-boot/v2026.01/0000.patching_config.yaml
@ -1,5 +1,4 @@
 config:
-
  overlay-directories:
    - { source: "defconfig", target: "configs" } # copies all files in defconfig dir to the configs/ dir in the u-boot source tree
    - { source: "dt_upstream_rockchip", target: "dts/upstream/src/arm64/rockchip" } # copies all files in dt_upstream_rockchip dir to the dts/upstream/src/arm64/rockchip dir in the u-boot source tree
--- a/patch/u-boot/v2026.01/board_helios64/0000.patching_config.yaml
+++ b/patch/u-boot/v2026.01/board_helios64/0000.patching_config.yaml
@ -0,0 +1,10 @@
+config:
+
+  # Board-specific overlays live inside this directory to keep Helios64
+  # patches self contained.
+  overlay-directories:
+    - { source: "defconfig", target: "configs" }
+    - { source: "dt_upstream_rockchip", target: "dts/upstream/src/arm64/rockchip" }
+    - { source: "dt_uboot", target: "arch/arm/dts" }
+    - { source: "board", target: "board/kobol/helios64" }
+    - { source: "include_configs", target: "include/configs" }
--- a/patch/u-boot/v2026.01/board_helios64/1000-exception-include-string.patch
+++ b/patch/u-boot/v2026.01/board_helios64/1000-exception-include-string.patch
@ -0,0 +1,25 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Igor Velkov <325961+iav@users.noreply.github.com>
+Date: Thu, 25 Dec 2025 01:30:00 +0000
+Subject: [PATCH] exception: include string.h for strlen/strncmp
+
+Fix implicit declarations in cmd/arm/exception64 by pulling in the
+standard string helpers.
+
+---
+ include/exception.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/include/exception.h b/include/exception.h
+index 0d27152ffa..e32eb833af 100644
+--- a/include/exception.h
+++ b/include/exception.h
+@@ -7,6 +7,7 @@
+  * Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk@gmx.de>
+  */
+ 
+ #include <command.h>
+#include <string.h>
+ 
+ static int do_exception(struct cmd_tbl *cmdtp, int flag, int argc,
+ 			char *const argv[])
--- a/patch/u-boot/v2026.01/board_helios64/1001-helios64-enable-target.patch
+++ b/patch/u-boot/v2026.01/board_helios64/1001-helios64-enable-target.patch
@ -0,0 +1,39 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Igor Velkov <325961+iav@users.noreply.github.com>
+Date: Thu, 25 Dec 2025 01:30:00 +0000
+Subject: [PATCH] rk3399: add Helios64 target
+
+Wire Helios64 into the rk3399 board menu and source tree so its defconfig
+builds again on v2026.01-rc5. Based on work Aditya Prayoga <aditya@kobol.io>
+Tue, 15 Sep 2020 18:41:54 +0700
+
+---
+ arch/arm/mach-rockchip/rk3399/Kconfig | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
+index 39e5b0548d..2b5e169acd 100644
+--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
+@@ -130,6 +130,13 @@
+ 	   * wide voltage input(5V-15V), dual cell battery
+ 	   * Wifi/BT accessible via expansion board M.2
+
+config TARGET_HELIOS64
+	bool "Kobol Helios64"
+	help
+	  Helios64 is a RK3399-based NAS board with a JMB585 SATA HBA,
+	  USB-C (DP Alt), USB3 hub, dual Ethernet (1G + 2.5G), eMMC and
+	  LPDDR4 memory.
+
+ endchoice
+
+ config ROCKCHIP_BOOT_MODE_REG
+@@ -163,6 +170,7 @@ endif # BOOTCOUNT_LIMIT
+
+ source "board/firefly/roc-pc-rk3399/Kconfig"
+ source "board/google/gru/Kconfig"
+source "board/kobol/helios64/Kconfig"
+ source "board/pine64/pinebook-pro-rk3399/Kconfig"
+ source "board/pine64/pinephone-pro-rk3399/Kconfig"
+ source "board/pine64/rockpro64_rk3399/Kconfig"
--- a/patch/u-boot/v2026.01/board_helios64/board/Kconfig
+++ b/patch/u-boot/v2026.01/board_helios64/board/Kconfig
@ -0,0 +1,24 @@
+if TARGET_HELIOS64
+
+config SYS_BOARD
+	default "helios64"
+
+config SYS_VENDOR
+	default "kobol"
+
+config SYS_CONFIG_NAME
+	default "helios64"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+config ENV_SECT_SIZE
+	default 0x1000 if ENV_IS_IN_SPI_FLASH
+
+config ENV_SIZE
+	default 0x8000
+
+config ENV_OFFSET
+	default 0x460000 if ENV_IS_IN_SPI_FLASH
+
+endif
--- a/patch/u-boot/v2026.01/board_helios64/board/MAINTAINERS
+++ b/patch/u-boot/v2026.01/board_helios64/board/MAINTAINERS
@ -0,0 +1,6 @@
+HELIOS64 BOARD
+M:	Aditya Prayoga <aditya@kobol.io>
+S:	Maintained
+F:	board/kobol/helios64/
+F:	include/configs/helios64.h
+F:	configs/helios64-rk3399_defconfig
--- a/patch/u-boot/v2026.01/board_helios64/board/Makefile
+++ b/patch/u-boot/v2026.01/board_helios64/board/Makefile
@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020 Aditya Prayoga <aditya@kobol.io>
+
+obj-y	:= helios64.o sys_otp.o
--- a/patch/u-boot/v2026.01/board_helios64/board/helios64.c
+++ b/patch/u-boot/v2026.01/board_helios64/board/helios64.c
@ -0,0 +1,328 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Aditya Prayoga (aditya@kobol.io)
+ */
+
+#include <init.h>
+#include <stdio.h>
+#include <dm.h>
+#include <env.h>
+#include <log.h>
+#include <led.h>
+#include <pci.h>
+#include <power/regulator.h>
+#include <scsi.h>
+#include <spl_gpio.h>
+#include <syscon.h>
+#include <usb.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/gpio.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/boot_mode.h>
+#include <asm/arch-rockchip/periph.h>
+
+#include "sys_otp.h"
+
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset, const u32 cpuid_length,
+			      u8 *cpuid);
+int rockchip_cpuid_set(const u8 *cpuid, u8 len);
+int rockchip_setup_macaddr(void);
+
+#ifndef CONFIG_TPL_BUILD
+int board_early_init_f(void)
+{
+#ifdef CONFIG_SPL_BUILD
+#define GPIO0_BASE      0xff720000
+#define GRF_BASE		0xff770000
+	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+	struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
+
+	/* Turn ON status LED. At this stage, FDT & DM is not initialized yet */
+	spl_gpio_output(gpio, GPIO(BANK_B, 4), 1);
+#endif
+	return 0;
+}
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_r(void)
+{
+	read_otp_data();
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_MISC_INIT_R
+#define GRF_IO_VSEL_BT565_SHIFT		0
+#define GRF_IO_VSEL_AUDIO_SHIFT		1
+#define GRF_IO_VSEL_SDMMC_SHIFT		2
+#define GRF_IO_VSEL_GPIO1830_SHIFT	3
+
+#define PMUGRF_CON0_VSEL_SHIFT		8
+#define PMUGRF_CON0_PMU1830_VOL_SHIFT   9
+static void setup_iodomain(void)
+{
+	struct rk3399_grf_regs *grf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	struct rk3399_pmugrf_regs *pmugrf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	/* BT565 is in 1.8v domain */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
+
+	/* AUDIO is in 1.8v domain */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_AUDIO_SHIFT);
+
+	/* SDMMC is in 3.0v domain */
+	rk_setreg(&grf->io_vsel, 0 << GRF_IO_VSEL_SDMMC_SHIFT);
+
+	/* GPIO1830 is in 3.0v domain */
+	rk_setreg(&grf->io_vsel, 0 << GRF_IO_VSEL_GPIO1830_SHIFT);
+
+	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
+	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
+	rk_setreg(&pmugrf->soc_con0, 0 << PMUGRF_CON0_PMU1830_VOL_SHIFT);
+}
+
+static void init_vdd_center(void)
+{
+	struct udevice *regulator;
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int ret;
+
+	ret = regulator_get_by_platname("vdd_center", &regulator);
+	if (ret)
+		return;
+
+	uc_pdata = dev_get_uclass_plat(regulator);
+	ret = regulator_set_value(regulator, uc_pdata->init_uV);
+	if (ret)
+		debug("%s vdd_center init fail! ret %d\n", __func__, ret);
+}
+
+/*
+ * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
+ *
+ * If bootsource is uSD-card we can assume that we want to use the
+ * SD-Card instead of the eMMC as first boot_target for distroboot.
+ * We only want to swap the defaults and not any custom environment a
+ * user has set. We exit early if a changed boot_targets environment
+ * is detected.
+ */
+static int setup_boottargets(void)
+{
+	const char *boot_device =
+		ofnode_read_chosen_string("u-boot,spl-boot-device");
+	char *env_default, *env;
+
+	if (!boot_device) {
+		debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+		      __func__);
+		return -1;
+	}
+	debug("%s: booted from %s\n", __func__, boot_device);
+
+	env_default = env_get_default("boot_targets");
+	env = env_get("boot_targets");
+	if (!env) {
+		debug("%s: boot_targets does not exist\n", __func__);
+		return -1;
+	}
+	debug("%s: boot_targets current: %s - default: %s\n",
+		__func__, env, env_default);
+
+	if (strcmp(env_default, env) != 0) {
+		debug("%s: boot_targets not default, don't change it\n",
+			__func__);
+		return 0;
+	}
+
+	/*
+	 * Only run, if booting from mmc1 (i.e. /mmc@fe320000) and
+	 * only consider cases where the default boot-order first
+	 * tries to boot from mmc0 (eMMC) and then from mmc1
+	 * (i.e. external SD).
+	 *
+	 * In other words: the SD card will be moved to earlier in the
+	 * order, if U-Boot was also loaded from the SD-card.
+	 */
+	if (!strcmp(boot_device, "/mmc@fe320000")) {
+		char *mmc0, *mmc1;
+
+		debug("%s: booted from SD-Card\n", __func__);
+		mmc0 = strstr(env, "mmc0");
+		mmc1 = strstr(env, "mmc1");
+
+		if (!mmc0 || !mmc1) {
+			debug("%s: only one mmc boot_target found\n", __func__);
+			return -1;
+		}
+
+		/*
+		 * If mmc0 comes first in the boot order, we need to change
+		 * the strings to make mmc1 first.
+		 */
+		if (mmc0 < mmc1) {
+			mmc0[3] = '1';
+			mmc1[3] = '0';
+			debug("%s: set boot_targets to: %s\n", __func__, env);
+			env_set("boot_targets", env);
+		}
+	}
+
+	return 0;
+}
+
+static void setup_leds(void)
+{
+	struct udevice *dev;
+
+	led_get_by_label("helios64::status", &dev);
+	led_set_state(dev, LEDST_OFF);
+	mdelay(250);
+	led_set_state(dev, LEDST_ON);
+}
+
+int misc_init_r(void)
+{
+	const u32 cpuid_offset = 0x7;
+	const u32 cpuid_length = 0x10;
+	u8 cpuid[cpuid_length];
+	int ret;
+
+	setup_iodomain();
+	init_vdd_center();
+	set_board_info();
+
+	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+	if (ret)
+		return ret;
+
+	ret = rockchip_cpuid_set(cpuid, cpuid_length);
+	if (ret)
+		return ret;
+
+	if (mac_read_from_otp())
+		ret = rockchip_setup_macaddr();
+
+	setup_boottargets();
+	setup_leds();
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_ROCKCHIP_ADVANCED_RECOVERY
+void rockchip_prepare_download_mode(void)
+{
+	struct gpio_desc *enable, *mux;
+
+	if (gpio_hog_lookup_name("USB_MUX_OE#", &enable)) {
+		debug("Fail to get USB_MUX_OE\n");
+		return;
+	}
+
+	if (gpio_hog_lookup_name("USB_MUX_HS", &mux)) {
+		debug("Fail to get USB_MUX_HS\n");
+		return;
+	}
+
+	dm_gpio_set_value(enable, 0);
+	mdelay(100);
+	dm_gpio_set_value(mux, 1);
+	mdelay(100);
+	dm_gpio_set_value(enable, 1);
+}
+#endif
+
+#ifdef CONFIG_LAST_STAGE_INIT
+static void auto_power_enable(void)
+{
+	struct gpio_desc *enable, *clock;
+
+	if (gpio_hog_lookup_name("AUTO_ON_EN_D", &enable)) {
+		debug("Fail to get AUTO_ON_EN_D\n");
+		return;
+	}
+
+	if (gpio_hog_lookup_name("AUTO_ON_EN_CLK", &clock)) {
+		debug("Fail to get AUTO_ON_EN_CLK\n");
+		return;
+	}
+
+	dm_gpio_set_value(enable, 1);
+	dm_gpio_set_value(clock, 1);
+	mdelay(10);
+	dm_gpio_set_value(clock, 0);
+}
+
+static void sata_power_enable(void)
+{
+	struct udevice *rail_a, *rail_b;
+	int ret;
+
+	ret = regulator_get_by_platname("hdd_a_power", &rail_a);
+	if (!ret) {
+		ret = regulator_set_enable(rail_a, true);
+		if (!ret)
+			/* Wait for HDD spinup before SCSI scan */
+			mdelay(10000);
+	}
+
+	ret = regulator_get_by_platname("hdd_b_power", &rail_b);
+	if (!ret)
+		ret = regulator_set_enable(rail_b, true);
+
+}
+
+int last_stage_init(void)
+{
+	auto_power_enable();
+	sata_power_enable();
+
+#ifdef CONFIG_PCI
+	scsi_scan(true);
+#endif
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_DISPLAY_BOARDINFO_LATE)
+int checkboard(void)
+{
+	int major, minor;
+
+	printf("Revision: ");
+
+	if (!get_revision(&major, &minor))
+		printf("%i.%i - %s\n", major, minor, get_variant());
+	else
+		printf("UNKNOWN\n");
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	char *env;
+
+	env = env_get("board_rev");
+	if (env)
+		fdt_setprop_string(blob, fdt_path_offset(blob, "/"),
+			"kobol,board-rev", env);
+
+	env = env_get("cpuid#");
+	if (env)
+		fdt_setprop_string(blob, fdt_path_offset(blob, "/"),
+			"kobol,cpu-id", env);
+
+	return 0;
+}
+#endif
--- a/patch/u-boot/v2026.01/board_helios64/board/sys_otp.c
+++ b/patch/u-boot/v2026.01/board_helios64/board/sys_otp.c
@ -0,0 +1,249 @@
+#include <linux/types.h>
+#include <dm.h>
+#include <spi.h>
+#include <log.h>
+#include <env.h>
+#include <net.h>
+#include <u-boot/crc.h>
+
+#include "sys_otp.h"
+
+#define OTP_DEVICE_BUS  0
+#define OTP_DEVICE_CS   0
+#define MAX_NUM_PORTS	2
+
+enum board_variant {
+	BOARD_VARIANT_INVALID = 0,
+	BOARD_VARIANT_ENG_SAMPLE,
+	BOARD_VARIANT_4G_PROD_NO_ECC,
+	BOARD_VARIANT_MAX
+};
+
+struct  __attribute__ ((__packed__)) otp_data_t {
+	u8 magic[8];
+	u8 part_num[16];
+	u8 variant;
+	u8 revision;
+	u8 serial_num[6];
+	u8 mfg_year[2];
+	u8 mfg_month;
+	u8 mfg_day;
+	u8 mac_addr[MAX_NUM_PORTS][6];
+	u8 reserved[204];
+	u32 checksum;
+} otp;
+
+static struct spi_slave *slave;
+static int has_been_read = 0;
+static int data_valid = 0;
+
+static inline int is_data_valid(void)
+{
+	return data_valid;
+}
+
+static inline int is_valid_header(void)
+{
+	if ((otp.magic[0] == 'H') || (otp.magic[1] == '6') ||
+		(otp.magic[2] == '4') || (otp.magic[3] == 'N') ||
+		(otp.magic[4] == 'P') || (otp.magic[5] == 'V') ||
+		(otp.magic[6] == '1') || (otp.magic[7] == 0))
+
+		return 1;
+
+	return 0;
+}
+
+static int init_system_otp(int bus, int cs)
+{
+	int ret;
+	char name[30], *str;
+	struct udevice *dev;
+
+	snprintf(name, sizeof(name), "generic_%d:%d", bus, cs);
+	str = strdup(name);
+	if (!str)
+		return -ENOMEM;
+	ret = _spi_get_bus_and_cs(bus, cs, 25000000, CONFIG_DEFAULT_SPI_MODE, "spi_generic_drv",
+				 str, &dev, &slave);
+	return ret;
+}
+
+#ifdef DEBUG
+/**
+ * show_otp_data - display the contents of the OTP register
+ */
+static void show_otp_data(void)
+{
+	u32 i;
+	u32 crc;
+
+	const char* var_str[BOARD_VARIANT_MAX] = {
+			"Invalid variant",
+			"Engineering Sample",
+			"Production - 4GB non ECC"
+	};
+
+	printf("\n");
+	printf("Register dump: (%lu bytes)\n", sizeof(otp));
+	for (i = 0; i < sizeof(otp); i++) {
+		if ((i % 16) == 0)
+			printf("%02X: ", i);
+		printf("%02X ", ((u8 *)&otp)[i]);
+		if (((i % 16) == 15) || (i == sizeof(otp) - 1))
+			printf("\n");
+	}
+
+	if (!is_valid_header())
+		return;
+
+	printf("Part Number: %s\n", otp.part_num);
+	printf("Variant: %s\n", var_str[otp.variant]);
+	printf("Revision: %x.%x\n", (otp.revision & 0xf0) >> 4, otp.revision & 0x0f);
+	printf("Serial Number: %012llx\n", *((uint64_t*) otp.serial_num) &
+		0xFFFFFFFFFFFF);
+	printf("Manufacturing Date: %02X-%02X-%04X (DD-MM-YYYY)\n", otp.mfg_day,
+		otp.mfg_month, *(u16*) otp.mfg_year);
+
+	printf("1GbE MAC Address:   %02X:%02X:%02X:%02X:%02X:%02X\n",
+		otp.mac_addr[0][0], otp.mac_addr[0][1], otp.mac_addr[0][2],
+		otp.mac_addr[0][3], otp.mac_addr[0][4], otp.mac_addr[0][5]);
+
+	printf("2.5GbE MAC Address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+		otp.mac_addr[1][0], otp.mac_addr[1][1], otp.mac_addr[1][2],
+		otp.mac_addr[1][3], otp.mac_addr[1][4], otp.mac_addr[1][5]);
+
+	crc = crc32(0, (void *)&otp, sizeof(otp) - 4);
+
+	if (crc == le32_to_cpu(otp.checksum))
+		printf("CRC: %08x\n\n", le32_to_cpu(otp.checksum));
+	else
+		printf("CRC: %08x (should be %08x)\n\n",
+			   le32_to_cpu(otp.checksum), crc);
+
+}
+#endif
+
+int read_otp_data(void)
+{
+	int ret;
+	u8 dout[5];
+
+	if (has_been_read) {
+		if (is_data_valid())
+			return 0;
+		else
+			goto data_invalid;
+	}
+
+	ret = init_system_otp(OTP_DEVICE_BUS, OTP_DEVICE_CS);
+	if (ret)
+		return ret;
+
+	ret = spi_claim_bus(slave);
+	if (ret) {
+		debug("SPI: Failed to claim SPI bus: %d\n", ret);
+		return ret;
+	}
+
+	dout[0] = 0x48;
+	dout[1] = 0x00;
+	dout[2] = 0x10; /* Security Register #1 */
+	dout[3] = 0x00;
+	dout[4] = 0x00; /* Dummy Byte */
+
+	ret = spi_write_then_read(slave, dout, sizeof(dout), NULL, (u8 *)&otp,
+			sizeof(otp));
+
+	spi_release_bus(slave);
+#ifdef DEBUG
+	show_otp_data();
+#endif
+
+	has_been_read = (ret == 0) ? 1 : 0;
+	if (!is_valid_header())
+		goto data_invalid;
+
+	if (crc32(0, (void *)&otp, sizeof(otp) - 4) ==
+		le32_to_cpu(otp.checksum))
+		data_valid = 1;
+
+	if (!is_data_valid())
+		goto data_invalid;
+
+	return 0;
+
+data_invalid:
+	printf("Invalid board ID data!\n");
+	return -1;
+}
+
+int get_revision(int *major, int *minor)
+{
+	if (!is_data_valid())
+		return -1;
+
+	*major = (otp.revision & 0xf0) >> 4;
+	*minor = otp.revision & 0x0f;
+
+	return 0;
+}
+
+const char *get_variant(void)
+{
+	const char* var_str[BOARD_VARIANT_MAX] = {
+		"Unknown",
+		"Engineering Sample",
+		"4GB non ECC"
+	};
+
+	if ((otp.variant < BOARD_VARIANT_ENG_SAMPLE) ||
+		(otp.variant >= BOARD_VARIANT_MAX))
+		return var_str[0];
+
+	return var_str[otp.variant];
+}
+
+void set_board_info(void)
+{
+	char env_str[13];
+
+	if (!is_data_valid())
+		return;
+
+	snprintf(env_str, sizeof(env_str), "%i.%i", (otp.revision & 0xf0) >> 4, otp.revision & 0x0f);
+	env_set("board_rev", env_str);
+
+	sprintf(env_str, "%012llx", *((uint64_t*) otp.serial_num) &
+		0xFFFFFFFFFFFF);
+
+	env_set("serial#", env_str);
+}
+
+int mac_read_from_otp(void)
+{
+	unsigned int i;
+	int ret;
+
+	if (!is_data_valid())
+		return -1;
+
+	for (i = 0; i < MAX_NUM_PORTS; i++) {
+		char enetvar[9];
+
+		sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
+
+		if (!is_valid_ethaddr(otp.mac_addr[i])) {
+			debug("Not valid %s!\n", enetvar);
+			continue;
+		}
+
+		/* Only initialize environment variables that are blank
+		 * (i.e. have not yet been set)
+		 */
+		if (!env_get(enetvar))
+			eth_env_set_enetaddr(enetvar, otp.mac_addr[i]);
+	}
+
+	return ret;
+}
--- a/patch/u-boot/v2026.01/board_helios64/board/sys_otp.h
+++ b/patch/u-boot/v2026.01/board_helios64/board/sys_otp.h
@ -0,0 +1,10 @@
+#ifndef __HELIOS64_SYS_OTP_H
+#define __HELIOS64_SYS_OTP_H
+
+int read_otp_data(void);
+void set_board_info(void);
+int get_revision(int *major, int *minor);
+const char *get_variant(void);
+int mac_read_from_otp(void);
+
+#endif
--- a/patch/u-boot/v2026.01/board_helios64/defconfig/helios64-rk3399_defconfig
+++ b/patch/u-boot/v2026.01/board_helios64/defconfig/helios64-rk3399_defconfig
@ -0,0 +1,159 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-kobol-helios64"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_ADVANCED_RECOVERY=y
+CONFIG_ROCKCHIP_ADVANCED_RECOVERY_LED="helios64::status"
+# CONFIG_ROCKCHIP_ADVANCED_RECOVERY_ROCKUSB is not set
+CONFIG_TARGET_HELIOS64=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x800800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_PREBOOT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-kobol-helios64.dtb"
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_BOARD_TYPES=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_ROCKCHIP_EXTERNAL_TPL=y
+CONFIG_TPL=y
+CONFIG_TPL_DEBUG=y
+CONFIG_BINMAN=y
+CONFIG_SPL_BINMAN=y
+CONFIG_ROCKCHIP_BINMAN=y
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+CONFIG_CMD_BOOTEFI_HELLO=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_MD5SUM_VERIFY=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_SHA1SUM_VERIFY=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_EXCEPTION=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_LOG=y
+CONFIG_LOGLEVEL=5
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_LOGLEVEL=5
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_IP_DEFRAG=y
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_SPL_FIRMWARE=y
+CONFIG_GPIO_HOG=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0x8
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_MII=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_DM_PMIC_FAN53555=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_ROCKCHIP_SDRAM_COMMON_DEBUG=y
+CONFIG_DM_RESET=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_SYSCON=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_HEXDUMP=y
+CONFIG_TPL_LOGLEVEL=5
+CONFIG_SPL_MAX_SIZE=0x40000
--- a/patch/u-boot/v2026.01/board_helios64/dt_uboot/rk3399-kobol-helios64-u-boot.dtsi
+++ b/patch/u-boot/v2026.01/board_helios64/dt_uboot/rk3399-kobol-helios64-u-boot.dtsi
@ -0,0 +1,124 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
+
+&aliases {
+	ethernet0 = &gmac;
+	ethernet1 = &usb_lan;
+	spi0 = &spi1;
+	spi1 = &spi2;
+	spi2 = &spi5;
+};
+
+&chosen {
+	bootargs = "earlycon=uart8250,mmio32,0xff1a0000 earlyprintk";
+	stdout-path = "serial2:1500000n8";
+	u-boot,spl-boot-order = "same-as-spl", &spiflash, &sdmmc, &sdhci;
+};
+
+/ {
+	config {
+		u-boot,spl-payload-offset = <0x80000>; /* @ 512KB */
+	};
+};
+
+&gpio1 {
+	usb-mux-hs {
+		gpio-hog;
+		gpios = <RK_PA4 GPIO_ACTIVE_HIGH>;
+		output-low;
+		line-name = "USB_MUX_HS";
+	};
+
+	usb-mux-oe {
+		gpio-hog;
+		gpios = <RK_PB5 GPIO_ACTIVE_LOW>;
+		output-high;
+		line-name = "USB_MUX_OE#";
+	};
+
+	soc-flash-wp {
+		gpio-hog;
+		gpios = <RK_PC2 GPIO_ACTIVE_LOW>;
+		output-low;
+		line-name = "SOC_WP#";
+	};
+};
+
+&gpio2 {
+	sata-flash-wp {
+		gpio-hog;
+		gpios = <RK_PD0 GPIO_ACTIVE_LOW>;
+		output-high;
+		line-name = "SATA_WP#_LV";
+	};
+};
+
+&gpio4 {
+	auto-on-en-d {
+		gpio-hog;
+		gpios = <RK_PD1 GPIO_ACTIVE_HIGH>;
+		output-low;
+		line-name = "AUTO_ON_EN_D";
+	};
+
+	auto-on-en-clk {
+		gpio-hog;
+		gpios = <RK_PD2 GPIO_ACTIVE_HIGH>;
+		output-low;
+		line-name = "AUTO_ON_EN_CLK";
+	};
+
+	board-rev-id-0 {
+		gpio-hog;
+		gpios = <RK_PD5 GPIO_ACTIVE_HIGH>;
+		input;
+	};
+
+	board-rev-id-1 {
+		gpio-hog;
+		gpios = <RK_PD6 GPIO_ACTIVE_HIGH>;
+		input;
+	};
+};
+
+&pcie_prst {
+	rockchip,pins =
+		<2 RK_PD4 RK_FUNC_GPIO &pcfg_output_low>;
+};
+
+&pcie_pwr_en {
+	rockchip,pins =
+		<1 RK_PD0 RK_FUNC_GPIO &pcfg_output_low>;
+};
+
+&pinctrl {
+	usb {
+		usb_mux_hs: usb-mux-hs {
+			rockchip,pins =
+				<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		usb_mux_oe: usb-mux-oe {
+			rockchip,pins =
+				<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&spi1 {
+	spiflash: flash@0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&vdd_center {
+	regulator-min-microvolt = <950000>;
+	regulator-max-microvolt = <950000>;
+	regulator-init-microvolt = <950000>;
+};
+
+&vdd_log {
+	regulator-init-microvolt = <930000>;
+};
--- a/patch/u-boot/v2026.01/board_helios64/dt_upstream_rockchip/rk3399-kobol-helios64.dts
+++ b/patch/u-boot/v2026.01/board_helios64/dt_upstream_rockchip/rk3399-kobol-helios64.dts
--- a/patch/u-boot/v2026.01/board_helios64/include_configs/helios64.h
+++ b/patch/u-boot/v2026.01/board_helios64/include_configs/helios64.h
@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Aditya Prayoga <aditya@kobol.io>
+ */
+
+#ifndef __HELIOS64_H
+#define __HELIOS64_H
+
+/* Override default boot targets before including common config. */
+#define BOOT_TARGETS	"mmc1 mmc0 scsi0 usb0 pxe dhcp"
+
+#include <configs/rk3399_common.h>
+
+#endif /* __HELIOS64_H */