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mixtile-core3588e: edge: u-boot defconfig/dt with working nvme/gmac/usb

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- boot order: NVMe -> MMC
- GMAC works
- nvme works
- `ums` et al working
- usb3 ports (on carrier board) work
- DT is copy (not symlink) from kernel DT due to NPU nodes
This commit is contained in:
Ricardo Pardini 2025-12-21 17:52:28 +01:00 committed by Igor
parent 77aa36d799
commit b8344d2bea
4 changed files with 1062 additions and 3 deletions
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65
config/boards/mixtile-core3588e.csc
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@ -7,7 +7,7 @@ declare -g KERNEL_TARGET="edge,vendor"
declare -g BOOT_FDT_FILE="rockchip/rk3588-mixtile-core3588e.dtb" # same name vendor and edge
declare -g BOOT_SCENARIO="spl-blobs"
declare -g BOOT_SOC="rk3588"
declare -g BOOTCONFIG="mixtile-core3588e-rk3588_defconfig" # vendor name
declare -g BOOTCONFIG="mixtile-core3588e-rk3588_defconfig" # same name vendor and edge
declare -g IMAGE_PARTITION_TABLE="gpt"
# Does NOT have a UEFI_EDK2_BOARD_ID
@ -47,9 +47,9 @@ function post_family_config__core3588e_use_mainline_uboot() {
return 0
fi
display_alert "$BOARD" "mainline (generic) u-boot overrides for $BOARD / $BRANCH" "info"
display_alert "$BOARD" "mainline u-boot overrides for $BOARD / $BRANCH" "info"
declare -g BOOTCONFIG="generic-rk3588_defconfig"
declare -g BOOTCONFIG="mixtile-core3588e-rk3588_defconfig" # custom / not mainline yet
declare -g BOOTDELAY=1
declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git"
declare -g BOOTBRANCH="tag:v2026.01-rc4"
@ -66,3 +66,62 @@ function post_family_config__core3588e_use_mainline_uboot() {
declare -g PLYMOUTH="no" # Disable plymouth as that only causes more confusion
}
# "rockchip-common: boot SD card first, then NVMe, then mmc"
# include/configs/rockchip-common.h
# On the mixtile-core3588e: mmc0 is eMMC; mmc1 is microSD
# Also the usb is non-functional in mainline u-boot right now, so we skip: "scsi" "usb"
function pre_config_uboot_target__core3588e_patch_rockchip_common_boot_order() {
if [[ "${BRANCH}" != "edge" ]]; then
return 0
fi
declare -a rockchip_uboot_targets=("mmc1" "nvme" "mmc0" "pxe" "dhcp" "spi") # for future make-this-generic delight
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: adjust boot order to '${rockchip_uboot_targets[*]}'" "info"
sed -i -e "s/#define BOOT_TARGETS.*/#define BOOT_TARGETS \"${rockchip_uboot_targets[*]}\"/" include/configs/rockchip-common.h
regular_git diff -u include/configs/rockchip-common.h || true
}
function post_config_uboot_target__extra_configs_for_nanopct6_mainline_environment_in_spi() {
if [[ "${BRANCH}" != "edge" ]]; then
return 0
fi
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable board-specific configs" "info"
run_host_command_logged scripts/config --enable CONFIG_CMD_MISC
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable preboot & flash user LED in preboot" "info"
run_host_command_logged scripts/config --enable CONFIG_USE_PREBOOT
run_host_command_logged scripts/config --set-str CONFIG_PREBOOT "'led sys_led on; sleep 0.1; led sys_led off'" # double quotes required due to run_host_command_logged's quirks
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable EFI debugging commands" "info"
run_host_command_logged scripts/config --enable CMD_EFIDEBUG
run_host_command_logged scripts/config --enable CMD_NVEDIT_EFI
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable more filesystems support" "info"
run_host_command_logged scripts/config --enable CONFIG_CMD_BTRFS
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable more compression support" "info"
run_host_command_logged scripts/config --enable CONFIG_LZO
run_host_command_logged scripts/config --enable CONFIG_BZIP2
run_host_command_logged scripts/config --enable CONFIG_ZSTD
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable gpio LED support" "info"
run_host_command_logged scripts/config --enable CONFIG_LED
run_host_command_logged scripts/config --enable CONFIG_LED_GPIO
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable networking cmds" "info"
run_host_command_logged scripts/config --enable CONFIG_CMD_NFS
run_host_command_logged scripts/config --enable CONFIG_CMD_WGET
run_host_command_logged scripts/config --enable CONFIG_CMD_DNS
run_host_command_logged scripts/config --enable CONFIG_PROT_TCP
run_host_command_logged scripts/config --enable CONFIG_PROT_TCP_SACK
# UMS, RockUSB, gadget stuff
display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable UMS/RockUSB gadget" "info"
declare -a enable_configs=("CONFIG_CMD_USB_MASS_STORAGE" "CONFIG_USB_GADGET" "USB_GADGET_DOWNLOAD" "CONFIG_USB_FUNCTION_ROCKUSB" "CONFIG_USB_FUNCTION_ACM" "CONFIG_CMD_ROCKUSB" "CONFIG_CMD_USB_MASS_STORAGE")
for config in "${enable_configs[@]}"; do
run_host_command_logged scripts/config --enable "${config}"
done
# Auto-enabled by the above, force off...
run_host_command_logged scripts/config --disable USB_FUNCTION_FASTBOOT
}

96
patch/u-boot/v2026.01/defconfig/mixtile-core3588e-rk3588_defconfig Normal file
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@ -0,0 +1,96 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-mixtile-core3588e"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ROCK5B_RK3588=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-mixtile-core3588e.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_AHCI_PCI=y
CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_LAN75XX=y
CONFIG_USB_ETHER_LAN78XX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y

1
patch/u-boot/v2026.01/dt_uboot/rk3588-mixtile-core3588e-u-boot.dtsi Normal file
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@ -0,0 +1 @@
#include "rk3588-generic-u-boot.dtsi"

903
patch/u-boot/v2026.01/dt_upstream_rockchip/rk3588-mixtile-core3588e.dts Normal file
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@ -0,0 +1,903 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Joshua Riek <jjriek@verizon.net>
*/
// From https://github.com/Joshua-Riek/linux/blob/v6.7-rk3588/arch/arm64/boot/dts/rockchip/rk3588-mixtile-core3588e.dts
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3588.dtsi"
/ {
model = "Mixtile Core 3588E";
compatible = "mixtile,core3588e", "rockchip,rk3588";
aliases {
mmc0 = &sdhci;
serial2 = &uart2;
};
chosen {
stdout-path = "serial2:1500000n8";
};
fan: pwm-fan {
compatible = "pwm-fan";
cooling-levels = <0 40 51 77 102 128 153 179 204 230 255>;
fan-supply = <&vcc5v0_sys>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB4 IRQ_TYPE_EDGE_FALLING>;
pwms = <&pwm2 0 50000 0>;
#cooling-cells = <2>;
};
leds {
compatible = "gpio-leds";
sys_led: led-0 {
label = "sys_led";
gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
};
vcc3v3_pcie30: vcc3v3-pcie30-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30_en>;
startup-delay-us = <5000>;
};
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_host: regulator-vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
vin-supply = <&vcc5v0_sys>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
hdmi0-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi0_con_in: endpoint {
remote-endpoint = <&hdmi0_out_con>;
};
};
};
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
mem-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
mem-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
mem-supply = <&vdd_cpu_big1_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
mem-supply = <&vdd_cpu_big1_s0>;
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
};
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-rxid";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
pinctrl-names = "default";
rx_delay = <0x00>;
tx_delay = <0x43>;
status = "okay";
};
&hdmi0 {
status = "okay";
};
&hdmi0_in {
hdmi0_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi0>;
};
};
&hdmi0_out {
hdmi0_out_con: endpoint {
remote-endpoint = <&hdmi0_con_in>;
};
};
&hdmi0_sound {
status = "okay";
};
&hdptxphy0 {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m2_xfer>;
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
/* maybe on some pin connector? found on vendor kernel */
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3m0_xfer>;
};
&i2c4 {
status = "okay";
pinctrl-0 = <&i2c4m3_xfer>;
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
/* on 40-pin connector pins: pin 3 is SDA; pin 5 is SCL */
&i2c5 {
pinctrl-0 = <&i2c5m2_xfer>;
status = "okay";
};
// hdmi-0 audio
&i2s5_8ch {
status = "okay";
};
&mdio0 {
rgmii_phy: ethernet-phy@1 {
/* RTL8211F */
compatible = "ethernet-phy-id001c.c916",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <&rtl8211f_rst>;
reset-assert-us = <15000>;
reset-deassert-us = <50000>;
reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
};
};
/* Temperature sensor near the center of the SoC */
&package_thermal {
polling-delay = <1000>;
trips {
trip0: trip0 {
hysteresis = <2000>;
temperature = <45000>; /* 45 celsius */
type = "active";
};
trip1: trip1 {
hysteresis = <2000>;
temperature = <52000>; /* 52 celsius */
type = "active";
};
trip2: trip2 {
hysteresis = <2000>;
temperature = <54000>; /* 54 celsius */
type = "active";
};
trip3: trip3 {
hysteresis = <2000>;
temperature = <56000>; /* 56 celsius */
type = "active";
};
trip4: trip4 {
hysteresis = <2000>;
temperature = <58000>; /* 58 celsius */
type = "active";
};
trip5: trip5 {
hysteresis = <2000>;
temperature = <60000>; /* 60 celsius */
type = "active";
};
trip6: trip6 {
hysteresis = <2000>;
temperature = <62000>; /* 62 celsius */
type = "active";
};
trip7: trip7 {
hysteresis = <2000>;
temperature = <64000>; /* 64 celsius */
type = "active";
};
trip8: trip8 {
hysteresis = <2000>;
temperature = <66000>; /* 66 celsius */
type = "active";
};
trip9: trip9 {
hysteresis = <2000>;
temperature = <70000>; /* 70 celsius */
type = "active";
};
};
cooling-maps {
map0 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip0>;
};
map1 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip1>;
};
map2 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip2>;
};
map3 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip3>;
};
map4 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip4>;
};
map5 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip5>;
};
map6 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip6>;
};
map7 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip7>;
};
map8 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip8>;
};
map9 {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&trip9>;
};
};
};
&pcie2x1l1 {
linux,pci-domain = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_reset>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie30phy {
status = "okay";
};
&pcie3x4 {
linux,pci-domain = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie3_reset>, <&pcie3_clkreqn_m1>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie2 {
pcie2_reset: pcie2-reset {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie3 {
pcie3_reset: pcie3-reset {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie3_clkreqn_m1: pcie3-clkreqn-m1 {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
vcc3v3_pcie30_en: pcie3-reg {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
emmc {
emmc_data_strobe: emmc-data-strobe {
rockchip,pins = <2 RK_PA2 1 &pcfg_pull_down>;
};
};
rtl8211f {
rtl8211f_rst: rtl8211f-rst {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm2 {
pinctrl-0 = <&pwm2m1_pins>;
status = "okay";
};
&saradc {
status = "okay";
vref-supply = <&vcc_1v8_s0>;
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
pinctrl-names = "default";
pinctrl-0 = <&emmc_data_strobe>;
status = "okay";
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
num-cs = <1>;
pmic@0 {
compatible = "rockchip,rk806";
spi-max-frequency = <1000000>;
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc5v0_sys>;
vcc6-supply = <&vcc5v0_sys>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc5v0_sys>;
vcc9-supply = <&vcc5v0_sys>;
vcc10-supply = <&vcc5v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc5v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys>;
gpio-controller;
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_cpu_lit_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_log_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_vdenc_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd2_ddr_s3";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_2v0_pldo_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vddq_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avcc_1v8_s0: pldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "avcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s0: pldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avdd_1v2_s0: pldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "avdd_1v2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3_s0: pldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vcc_3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vccio_sd_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "pldo6_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_ddr_pll_s0: nldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_ddr_pll_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
avdd_0v75_s0: nldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "avdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v85_s0: nldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_0v85_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&tsadc {
status = "okay";
};
// required for pcie2x1l1
&combphy2_psu {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&u2phy0_otg { // for fc000000.usb UDC
status = "okay";
};
&u2phy1 { // for usb_host1_xhci
// usb hub on carrier board is brought up by vcc5v0_host always-on
status = "okay";
};
&u2phy1_otg { // for usb_host1_xhci, otherwise "rockchip-usb2phy fd5d4000.syscon:usb2phy@4000: Requested PHY is disabled"
status = "okay";
};
&usbdp_phy1 { // for usb_host1_xhci
status = "okay";
};
&usb_host0_xhci { // usb@fc000000
dr_mode = "peripheral";
maximum-speed = "high-speed";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
status = "okay";
};
&usb_host1_xhci { // usb@fc400000 <-- this works on vendor (as usb8 -> usbdrd3_1/fc400000.usb), there's a hub on the carrier board
dr_mode = "host";
status = "okay";
};
// 40-pin: pin 8 is UART TX; pin 10 is UART RX (unconfirmed)
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
};
// found on vendor kernel, but no idea where it is physically
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer &uart7m1_ctsn &uart7m1_rtsn>;
};
// debug port, on the extra horizontal pins on the carrier board (NOT 40-pin)
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi0_in_vp0>;
};
};