add allwinner: a523: Support SPI controllers patch series

https://patchwork.kernel.org/project/linux-arm-kernel/cover/20251221110513.1850535-1-wens@kernel.org/
This commit is contained in:
EvilOlaf 2025-12-23 12:13:31 +00:00 committed by Igor
parent f8bb6a1f30
commit aa2e963721
2 changed files with 520 additions and 0 deletions

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@ -0,0 +1,518 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@kernel.org>
Date: Sun, 21 Dec 2025 11:05:52
Subject: arm64: allwinner: a523: Support SPI controllers
Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig
drivers/spi/spi-sun6i.c
https://patchwork.kernel.org/project/linux-arm-kernel/cover/20251221110513.1850535-1-wens@kernel.org/
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml | 4 +
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 94 ++++++
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig | 154 ++++++++++
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 15 +
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig | 5 +-
drivers/spi/spi-sun6i.c | 11 +-
6 files changed, 278 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
index 3b47b68b92cb..1b91d1566c95 100644
--- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
@@ -15,10 +15,11 @@ maintainers:
properties:
compatible:
oneOf:
- const: allwinner,sun50i-r329-spi
+ - const: allwinner,sun55i-a523-spi
- const: allwinner,sun6i-a31-spi
- const: allwinner,sun8i-h3-spi
- items:
- enum:
- allwinner,sun8i-r40-spi
@@ -33,10 +34,13 @@ properties:
- const: allwinner,sun50i-r329-spi
- items:
- const: allwinner,sun20i-d1-spi-dbi
- const: allwinner,sun50i-r329-spi-dbi
- const: allwinner,sun50i-r329-spi
+ - items:
+ - const: allwinner,sun55i-a523-spi-dbi
+ - const: allwinner,sun55i-a523-spi
reg:
maxItems: 1
interrupts:
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index d42e3d97fc7d..3bc042be5ab5 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -221,10 +221,47 @@ spdif_out_pi_pin: spdif-pi-pin {
pins = "PI10";
function = "spdif";
allwinner,pinmux = <2>;
};
+ /omit-if-no-ref/
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC2", "PC4", "PC12";
+ function = "spi0";
+ allwinner,pinmux = <4>;
+ };
+
+ /omit-if-no-ref/
+ spi0_cs0_pc_pin: spi0-cs0-pc-pin {
+ pins = "PC3";
+ function = "spi0";
+ allwinner,pinmux = <4>;
+ };
+
+ /omit-if-no-ref/
+ spi0_cs1_pc_pin: spi0-cs1-pc-pin {
+ pins = "PC7";
+ function = "spi0";
+ allwinner,pinmux = <4>;
+ };
+
+ /omit-if-no-ref/
+ spi0_hold_pc_pin: spi0-hold-pc-pin {
+ /* conflicts with eMMC D7 */
+ pins = "PC16";
+ function = "spi0";
+ allwinner,pinmux = <4>;
+ };
+
+ /omit-if-no-ref/
+ spi0_wp_pc_pin: spi0-wp-pc-pin {
+ /* conflicts with eMMC D2 */
+ pins = "PC15";
+ function = "spi0";
+ allwinner,pinmux = <4>;
+ };
+
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;
function = "uart0";
};
@@ -604,10 +641,53 @@ mmc2: mmc@4022000 {
cap-sdio-irq;
#address-cells = <1>;
#size-cells = <0>;
};
+ spi0: spi@4025000 {
+ compatible = "allwinner,sun55i-a523-spi";
+ reg = <0x04025000 0x1000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 22>, <&dma 22>;
+ dma-names = "rx", "tx";
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@4026000 {
+ compatible = "allwinner,sun55i-a523-spi-dbi",
+ "allwinner,sun55i-a523-spi";
+ reg = <0x04026000 0x1000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi2: spi@4027000 {
+ compatible = "allwinner,sun55i-a523-spi";
+ reg = <0x04027000 0x1000>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 24>, <&dma 24>;
+ dma-names = "rx", "tx";
+ resets = <&ccu RST_BUS_SPI2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
usb_otg: usb@4100000 {
compatible = "allwinner,sun55i-a523-musb",
"allwinner,sun8i-a33-musb";
reg = <0x4100000 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
@@ -856,10 +936,24 @@ rtc: rtc@7090000 {
<&r_ccu CLK_R_AHB>;
clock-names = "bus", "hosc", "ahb";
#clock-cells = <1>;
};
+ r_spi0: spi@7092000 {
+ compatible = "allwinner,sun55i-a523-spi";
+ reg = <0x07092000 0x1000>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_BUS_R_SPI>, <&r_ccu CLK_R_SPI>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 53>, <&dma 53>;
+ dma-names = "rx", "tx";
+ resets = <&r_ccu RST_BUS_R_SPI>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
mcu_ccu: clock-controller@7102000 {
compatible = "allwinner,sun55i-a523-mcu-ccu";
reg = <0x7102000 0x200>;
clocks = <&osc24M>,
<&rtc CLK_OSC32K>,
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig
index 42dab01e3f56..d42e3d97fc7d 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi.orig
@@ -9,10 +9,11 @@
#include <dt-bindings/reset/sun55i-a523-ccu.h>
#include <dt-bindings/reset/sun55i-a523-mcu-ccu.h>
#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
#include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
#include <dt-bindings/power/allwinner,sun55i-a523-pck-600.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -24,59 +25,67 @@
cpu0: cpu@0 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x000>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu1: cpu@100 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x100>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu2: cpu@200 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x200>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu3: cpu@300 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x300>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu4: cpu@400 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x400>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu5: cpu@500 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x500>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu6: cpu@600 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x600>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
cpu7: cpu@700 {
compatible = "arm,cortex-a55";
device_type = "cpu";
reg = <0x700>;
enable-method = "psci";
+ #cooling-cells = <2>;
};
};
osc24M: osc24M-clk {
#clock-cells = <0>;
@@ -469,16 +478,50 @@
dma-requests = <54>;
resets = <&ccu RST_BUS_DMA>;
#dma-cells = <1>;
};
+ ths1: thermal-sensor@2009400 {
+ compatible = "allwinner,sun55i-a523-ths1";
+ reg = <0x02009400 0x400>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC1>;
+ clock-names = "bus", "gpadc";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration",
+ "calibration-second-part";
+ #thermal-sensor-cells = <1>;
+ };
+
+ ths0: thermal-sensor@200a000 {
+ compatible = "allwinner,sun55i-a523-ths0";
+ reg = <0x0200a000 0x400>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC0>;
+ clock-names = "bus", "gpadc";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
+ nvmem-cell-names = "calibration",
+ "calibration-second-part";
+ #thermal-sensor-cells = <0>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun55i-a523-sid",
"allwinner,sun50i-a64-sid";
reg = <0x03006000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
+
+ ths_calibration0: ths-calibration0@38 {
+ reg = <0x38 0x8>;
+ };
+
+ ths_calibration1: ths-calibration1@44 {
+ reg = <0x44 0x8>;
+ };
};
gic: interrupt-controller@3400000 {
compatible = "arm,gic-v3";
#address-cells = <1>;
@@ -934,6 +977,117 @@
clock-names = "bus", "core", "reg";
resets = <&mcu_ccu RST_BUS_MCU_NPU>;
power-domains = <&ppu PD_NPU>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 1>;
+ sustainable-power = <1200>;
+
+ trips {
+ cpu0_threshold: cpu-trip-0 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu0_target: cpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu0_critical: cpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu4_thermal: cpu4-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 0>;
+ sustainable-power = <1600>;
+
+ trips {
+ cpu4_threshold: cpu-trip-0 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu4_target: cpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu4_critical: cpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu4_target>;
+ cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths1 2>;
+ sustainable-power = <2400>;
+
+ gpu-trips {
+ gpu_temp_threshold: gpu-trip-0 {
+ temperature = <60000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ gpu_temp_target: gpu-trip-1 {
+ temperature = <90000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ gpu_temp_critical: gpu-trip-2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+ };
+
+ ddr-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths0>;
+
+ trips {
+ ddr_temp_critical: ddr-trip-0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
index dcbf027a04ef..84a41becc15d 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
@@ -401,10 +401,25 @@ &rtc {
clock-names = "bus", "hosc", "ahb", "ext-osc32k";
assigned-clocks = <&rtc CLK_OSC32K>;
assigned-clock-rates = <32768>;
};
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pc_pins>, <&spi0_cs0_pc_pin>;
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ vcc-supply = <&reg_cldo1>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig
index 9e6b21cf293e..dcbf027a04ef 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts.orig
@@ -366,13 +366,16 @@
reg_dcdc1_323: dcdc1 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1150000>;
regulator-name = "vdd-cpub";
+ x-powers,polyphased = <&reg_dcdc2_323>;
};
- /* DCDC2 is polyphased with DCDC1 */
+ reg_dcdc2_323: dcdc2 {
+ /* dual-phased with DCDC1 */
+ };
/* Some RISC-V management core related voltage */
reg_dcdc3_323: dcdc3 {
regulator-always-on;
regulator-min-microvolt = <900000>;
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index 871dfd3e77be..d1de6c99e762 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -793,14 +793,17 @@ static const struct sun6i_spi_cfg sun50i_r329_spi_cfg = {
};
static const struct of_device_id sun6i_spi_match[] = {
{ .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg },
{ .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg },
- {
- .compatible = "allwinner,sun50i-r329-spi",
- .data = &sun50i_r329_spi_cfg
- },
+ { .compatible = "allwinner,sun50i-r329-spi", .data = &sun50i_r329_spi_cfg },
+ /*
+ * A523's SPI controller has a combined RX buffer + FIFO counter
+ * at offset 0x400, instead of split buffer count in FIFO status
+ * register. But in practice we only care about the FIFO level.
+ */
+ { .compatible = "allwinner,sun55i-a523-spi", .data = &sun50i_r329_spi_cfg },
{}
};
MODULE_DEVICE_TABLE(of, sun6i_spi_match);
static const struct dev_pm_ops sun6i_spi_pm_ops = {
--
Created with Armbian build tools https://github.com/armbian/build

View File

@ -407,6 +407,8 @@
patches.backports/20-Add-wifi-to-Radxa-Cubie-A5E.patch
patches.backports/21-Enable-uart1-on-Radxa-Cubie-A5E.patch
patches.backports/30-allwinner-a523-support-spi-controllers.patch
################################################################################
#
# Armbian patches