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Merge branch 'master' into mvebu-kernel-update

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This commit is contained in:
Jannis 2020-02-02 21:58:43 +01:00
commit a412ff9b4e
96 changed files with 56709 additions and 641 deletions
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13
compile.sh
View File

@ -84,6 +84,12 @@ fi
rm $TMPFILE
# Check for required packages for compiling
if [[ -z "$(which dialog)" ]]; then
sudo apt update
sudo apt install -y dialog
fi
# Check for Vagrant
if [[ "$1" == vagrant && -z "$(which vagrant)" ]]; then
display_alert "Vagrant not installed." "Installing"
@ -107,8 +113,13 @@ fi
# Install Docker if not there but wanted. We cover only Debian based distro install. Else, manual Docker install is needed
if [[ "$1" == docker && -f /etc/debian_version && -z "$(which docker)" ]]; then
# add exception for Ubuntu Focal until Docker provides dedicated binary
codename=$(lsb_release -sc)
[[ $codename == focal ]] && codename="bionic"
display_alert "Docker not installed." "Installing" "Info"
echo "deb [arch=amd64] https://download.docker.com/linux/$(lsb_release -is | awk '{print tolower($0)}') $(lsb_release -cs) edge" > /etc/apt/sources.list.d/docker.list
echo "deb [arch=amd64] https://download.docker.com/linux/$(lsb_release -is | awk '{print tolower($0)}') ${codename} edge" > /etc/apt/sources.list.d/docker.list
# minimal set of utilities that are needed for prep
packages=("curl" "gnupg" "apt-transport-https")

1
config/boards/pinebook-pro.wip
View File

@ -2,5 +2,6 @@
BOARD_NAME="Pinebook Pro"
BOARDFAMILY="rockchip64"
BOOTCONFIG="pinebook_pro-rk3399_defconfig"
DESKTOP_AUTOLOGIN="no"
KERNEL_TARGET="legacy,current,dev"
FULL_DESKTOP="yes"

2
config/bootscripts/boot-rockpis.cmd
View File

@ -3,7 +3,7 @@
# Please edit /boot/armbianEnv.txt to set supported parameters
#
setenv load_addr "0x19000000"
setenv load_addr "0x9000000"
setenv overlay_error "false"
# default values
setenv rootdev "/dev/mmcblk0p1"

2
config/kernel/linux-meson64-dev.config
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@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.5.0-rc6 Kernel Configuration
# Linux/arm64 5.5.1 Kernel Configuration
#
#

2
config/kernel/linux-meson64-legacy.config
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@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.9.205 Kernel Configuration
# Linux/arm64 4.9.210 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y

619
config/kernel/linux-odroidxu4-current.config
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File diff suppressed because it is too large Load Diff

1
config/kernel/linux-odroidxu4-dev.config
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@ -1 +0,0 @@
linux-odroidxu4-current.config

6689
config/kernel/linux-odroidxu4-dev.config Normal file
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File diff suppressed because it is too large Load Diff

2
config/kernel/linux-odroidxu4-legacy.config
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@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.14.162 Kernel Configuration
# Linux/arm 4.14.167 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y

2
config/kernel/linux-rk3399-legacy.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.208 Kernel Configuration
# Linux/arm64 4.4.211 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y

225
config/kernel/linux-rockchip-current.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.4.13 Kernel Configuration
# Linux/arm 5.5.1 Kernel Configuration
#
#
@ -21,7 +21,6 @@ CONFIG_BUILDTIME_EXTABLE_SORT=y
#
CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set
# CONFIG_HEADER_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT=""
@ -179,7 +178,6 @@ CONFIG_UID16=y
CONFIG_MULTIUSER=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
@ -503,7 +501,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
#
CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y
# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
# CONFIG_QORIQ_CPUFREQ is not set
# end of CPU Frequency scaling
@ -595,7 +592,9 @@ CONFIG_CRYPTO_GHASH_ARM_CE=m
CONFIG_CRYPTO_CRCT10DIF_ARM_CE=m
CONFIG_CRYPTO_CRC32_ARM_CE=m
CONFIG_CRYPTO_CHACHA20_NEON=m
CONFIG_CRYPTO_POLY1305_ARM=m
CONFIG_CRYPTO_NHPOLY1305_NEON=m
CONFIG_CRYPTO_CURVE25519_NEON=m
# CONFIG_VIRTUALIZATION is not set
#
@ -648,7 +647,6 @@ CONFIG_HAVE_COPY_THREAD_TLS=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OLD_SIGACTION=y
CONFIG_64BIT_TIME=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
@ -657,7 +655,6 @@ CONFIG_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_REFCOUNT_FULL=y
# CONFIG_LOCK_EVENT_COUNTS is not set
#
@ -687,6 +684,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
@ -812,6 +810,7 @@ CONFIG_UNIX_SCM=y
CONFIG_UNIX_DIAG=m
CONFIG_TLS=m
# CONFIG_TLS_DEVICE is not set
# CONFIG_TLS_TOE is not set
CONFIG_XFRM=y
CONFIG_XFRM_OFFLOAD=y
CONFIG_XFRM_ALGO=m
@ -1300,6 +1299,7 @@ CONFIG_RDS_TCP=m
# CONFIG_RDS_DEBUG is not set
CONFIG_TIPC=m
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TIPC_CRYPTO=y
CONFIG_TIPC_DIAG=m
CONFIG_ATM=m
CONFIG_ATM_CLIP=m
@ -1329,6 +1329,7 @@ CONFIG_NET_DSA_TAG_DSA=m
CONFIG_NET_DSA_TAG_EDSA=m
CONFIG_NET_DSA_TAG_MTK=m
CONFIG_NET_DSA_TAG_KSZ=m
CONFIG_NET_DSA_TAG_OCELOT=m
CONFIG_NET_DSA_TAG_QCA=m
CONFIG_NET_DSA_TAG_LAN9303=m
CONFIG_NET_DSA_TAG_SJA1105=m
@ -1710,6 +1711,7 @@ CONFIG_FW_LOADER=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
CONFIG_FW_CACHE=y
# end of Firmware loader
CONFIG_WANT_DEV_COREDUMP=y
@ -1841,39 +1843,7 @@ CONFIG_EEPROM_93CX6=m
#
# Intel MIC & related support
#
#
# Intel MIC Bus Driver
#
#
# SCIF Bus Driver
#
#
# VOP Bus Driver
#
# CONFIG_VOP_BUS is not set
#
# Intel MIC Host Driver
#
#
# Intel MIC Card Driver
#
#
# SCIF Driver
#
#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
#
# VOP Driver
#
# end of Intel MIC & related support
# CONFIG_ECHO is not set
@ -1995,10 +1965,6 @@ CONFIG_ATM_DRIVERS=y
# CONFIG_ATM_DUMMY is not set
# CONFIG_ATM_TCP is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
@ -2111,7 +2077,6 @@ CONFIG_ADIN_PHY=m
# CONFIG_AMD_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
CONFIG_AX88796B_PHY=m
# CONFIG_AT803X_PHY is not set
CONFIG_BCM7XXX_PHY=m
# CONFIG_BCM87XX_PHY is not set
CONFIG_BCM_NET_PHYLIB=m
@ -2123,6 +2088,7 @@ CONFIG_BCM_NET_PHYLIB=m
CONFIG_DP83TC811_PHY=m
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
CONFIG_DP83869_PHY=m
CONFIG_FIXED_PHY=y
# CONFIG_ICPLUS_PHY is not set
# CONFIG_INTEL_XWAY_PHY is not set
@ -2136,6 +2102,7 @@ CONFIG_MICROCHIP_T1_PHY=m
# CONFIG_MICROSEMI_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_NXP_TJA11XX_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_QSEMI_PHY is not set
CONFIG_REALTEK_PHY=m
# CONFIG_RENESAS_PHY is not set
@ -2819,10 +2786,13 @@ CONFIG_PPS_CLIENT_GPIO=m
#
CONFIG_PTP_1588_CLOCK=y
CONFIG_DP83640_PHY=m
CONFIG_PTP_1588_CLOCK_IDTCM=m
# end of PTP clock support
CONFIG_PINCTRL=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_PINMUX=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
@ -2835,6 +2805,7 @@ CONFIG_PINCTRL_STMFX=m
# CONFIG_PINCTRL_RK805 is not set
# CONFIG_PINCTRL_OCELOT is not set
CONFIG_PINCTRL_MADERA=m
CONFIG_PINCTRL_EQUILIBRIUM=m
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
@ -2930,6 +2901,7 @@ CONFIG_W1_SLAVE_DS2413=m
CONFIG_W1_SLAVE_DS2406=m
CONFIG_W1_SLAVE_DS2423=m
# CONFIG_W1_SLAVE_DS2805 is not set
CONFIG_W1_SLAVE_DS2430=m
CONFIG_W1_SLAVE_DS2431=m
CONFIG_W1_SLAVE_DS2433=m
# CONFIG_W1_SLAVE_DS2433_CRC is not set
@ -3037,6 +3009,9 @@ CONFIG_SENSORS_JC42=m
CONFIG_SENSORS_POWR1220=m
CONFIG_SENSORS_LINEAGE=m
CONFIG_SENSORS_LTC2945=m
CONFIG_SENSORS_LTC2947=m
CONFIG_SENSORS_LTC2947_I2C=m
CONFIG_SENSORS_LTC2947_SPI=m
CONFIG_SENSORS_LTC2990=m
CONFIG_SENSORS_LTC4151=m
CONFIG_SENSORS_LTC4215=m
@ -3117,6 +3092,7 @@ CONFIG_SENSORS_TMP103=m
# CONFIG_SENSORS_TMP108 is not set
CONFIG_SENSORS_TMP401=m
CONFIG_SENSORS_TMP421=m
CONFIG_SENSORS_TMP513=m
CONFIG_SENSORS_VT1211=m
CONFIG_SENSORS_W83773G=m
CONFIG_SENSORS_W83781D=m
@ -3138,12 +3114,10 @@ CONFIG_THERMAL_OF=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_BANG_BANG is not set
# CONFIG_THERMAL_GOV_USER_SPACE is not set
# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
CONFIG_CPU_THERMAL=y
# CONFIG_CLOCK_THERMAL is not set
# CONFIG_DEVFREQ_THERMAL is not set
@ -3747,9 +3721,11 @@ CONFIG_VIDEO_THS8200=m
#
CONFIG_VIDEO_APTINA_PLL=m
CONFIG_VIDEO_SMIAPP_PLL=m
CONFIG_VIDEO_HI556=m
# CONFIG_VIDEO_IMX214 is not set
# CONFIG_VIDEO_IMX258 is not set
CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m
# CONFIG_VIDEO_IMX319 is not set
# CONFIG_VIDEO_IMX355 is not set
CONFIG_VIDEO_OV2640=m
@ -4072,12 +4048,12 @@ CONFIG_DRM_DEBUG_MM=y
# CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_KMS_FB_HELPER=y
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
# CONFIG_DRM_DP_CEC is not set
CONFIG_DRM_TTM=m
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_KMS_CMA_HELPER=y
CONFIG_DRM_GEM_SHMEM_HELPER=y
@ -4098,6 +4074,7 @@ CONFIG_DRM_I2C_NXP_TDA9950=m
# CONFIG_DRM_HDLCD is not set
# CONFIG_DRM_MALI_DISPLAY is not set
CONFIG_DRM_KOMEDA=m
# CONFIG_DRM_KOMEDA_ERROR_PRINT is not set
# end of ARM devices
#
@ -4263,7 +4240,7 @@ CONFIG_FB_MODE_HELPERS=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_GENERIC=y
CONFIG_BACKLIGHT_PWM=y
# CONFIG_BACKLIGHT_PM8941_WLED is not set
CONFIG_BACKLIGHT_QCOM_WLED=m
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
# CONFIG_BACKLIGHT_LM3630A is not set
@ -4405,6 +4382,9 @@ CONFIG_SND_SOC_I2C_AND_SPI=m
# CONFIG_SND_SOC_ADAU1761_I2C is not set
# CONFIG_SND_SOC_ADAU1761_SPI is not set
# CONFIG_SND_SOC_ADAU7002 is not set
CONFIG_SND_SOC_ADAU7118=m
CONFIG_SND_SOC_ADAU7118_HW=m
CONFIG_SND_SOC_ADAU7118_I2C=m
# CONFIG_SND_SOC_AK4104 is not set
# CONFIG_SND_SOC_AK4118 is not set
CONFIG_SND_SOC_AK4458=m
@ -4438,6 +4418,7 @@ CONFIG_SND_SOC_CS4341=m
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CS53L30 is not set
# CONFIG_SND_SOC_CX2072X is not set
CONFIG_SND_SOC_DA7213=m
# CONFIG_SND_SOC_DMIC is not set
CONFIG_SND_SOC_HDMI_CODEC=m
# CONFIG_SND_SOC_ES7134 is not set
@ -4487,6 +4468,8 @@ CONFIG_SND_SOC_SSM2305=m
# CONFIG_SND_SOC_STA350 is not set
# CONFIG_SND_SOC_STI_SAS is not set
# CONFIG_SND_SOC_TAS2552 is not set
CONFIG_SND_SOC_TAS2562=m
CONFIG_SND_SOC_TAS2770=m
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SOC_TAS5720 is not set
@ -4965,6 +4948,7 @@ CONFIG_MMC_TEST=y
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_ARMMMCI is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_SDHCI_OF_ARASAN is not set
CONFIG_MMC_SDHCI_OF_ASPEED=m
@ -4972,6 +4956,7 @@ CONFIG_MMC_SDHCI_OF_ASPEED=m
CONFIG_MMC_SDHCI_OF_DWCMSHC=m
CONFIG_MMC_SDHCI_CADENCE=m
# CONFIG_MMC_SDHCI_F_SDH30 is not set
CONFIG_MMC_SDHCI_MILBEAUT=m
# CONFIG_MMC_SPI is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_PLTFM=y
@ -5003,6 +4988,7 @@ CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_BCM6358 is not set
# CONFIG_LEDS_CPCAP is not set
CONFIG_LEDS_CR0014114=m
CONFIG_LEDS_EL15203000=m
# CONFIG_LEDS_LM3530 is not set
CONFIG_LEDS_LM3532=m
# CONFIG_LEDS_LM3642 is not set
@ -5208,6 +5194,7 @@ CONFIG_PL330_DMA=y
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
CONFIG_SF_PDMA=m
#
# DMA Clients
@ -5348,6 +5335,7 @@ CONFIG_FB_TFT_PCD8544=m
CONFIG_FB_TFT_RA8875=m
CONFIG_FB_TFT_S6D02A1=m
CONFIG_FB_TFT_S6D1121=m
CONFIG_FB_TFT_SEPS525=m
CONFIG_FB_TFT_SH1106=m
CONFIG_FB_TFT_SSD1289=m
CONFIG_FB_TFT_SSD1305=m
@ -5388,13 +5376,13 @@ CONFIG_HMS_PROFINET=m
# CONFIG_USB_WUSB_CBAF is not set
# CONFIG_UWB is not set
CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DONT_MOUNT_VFAT=y
CONFIG_EXFAT_DISCARD=y
# CONFIG_EXFAT_DELAYED_SYNC is not set
# CONFIG_EXFAT_KERNEL_DEBUG is not set
# CONFIG_EXFAT_DEBUG_MSG is not set
CONFIG_EXFAT_DEFAULT_CODEPAGE=437
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_WFX=m
# CONFIG_GOLDFISH is not set
CONFIG_MFD_CROS_EC=y
CONFIG_CHROME_PLATFORMS=y
@ -5406,6 +5394,7 @@ CONFIG_CROS_EC_CHARDEV=m
CONFIG_CROS_EC_LIGHTBAR=m
CONFIG_CROS_EC_VBC=m
CONFIG_CROS_EC_DEBUGFS=m
CONFIG_CROS_EC_SENSORHUB=m
CONFIG_CROS_EC_SYSFS=m
CONFIG_CROS_USBPD_LOGGER=m
# CONFIG_MELLANOX_PLATFORM is not set
@ -5507,6 +5496,7 @@ CONFIG_ROCKCHIP_IOMMU=y
#
# NXP/Freescale QorIQ SoC drivers
#
# CONFIG_FSL_RCPM is not set
# end of NXP/Freescale QorIQ SoC drivers
#
@ -5604,6 +5594,7 @@ CONFIG_HID_SENSOR_ACCEL_3D=m
# CONFIG_AD7124 is not set
# CONFIG_AD7266 is not set
# CONFIG_AD7291 is not set
CONFIG_AD7292=m
# CONFIG_AD7298 is not set
# CONFIG_AD7476 is not set
CONFIG_AD7606=m
@ -5812,6 +5803,9 @@ CONFIG_ADIS16460=m
# CONFIG_ADIS16480 is not set
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
CONFIG_FXOS8700=m
CONFIG_FXOS8700_I2C=m
CONFIG_FXOS8700_SPI=m
# CONFIG_KMX61 is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set
@ -5825,6 +5819,7 @@ CONFIG_IIO_ADIS_LIB_BUFFER=y
# Light sensors
#
# CONFIG_ADJD_S311 is not set
CONFIG_ADUX1020=m
# CONFIG_AL3320A is not set
# CONFIG_APDS9300 is not set
# CONFIG_APDS9960 is not set
@ -5863,6 +5858,7 @@ CONFIG_TSL2772=m
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VCNL4035 is not set
CONFIG_VEML6030=m
# CONFIG_VEML6070 is not set
# CONFIG_VL6180 is not set
# CONFIG_ZOPT2201 is not set
@ -5975,6 +5971,7 @@ CONFIG_MB1232=m
#
# Temperature sensors
#
CONFIG_LTC2983=m
# CONFIG_MAXIM_THERMOCOUPLE is not set
CONFIG_HID_SENSOR_TEMP=m
# CONFIG_MLX90614 is not set
@ -6027,6 +6024,7 @@ CONFIG_PHY_MAPPHONE_MDM6600=m
CONFIG_PHY_ROCKCHIP_DP=y
CONFIG_PHY_ROCKCHIP_EMMC=y
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
CONFIG_PHY_ROCKCHIP_USB=y
@ -6059,6 +6057,7 @@ CONFIG_DAX=y
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_ROCKCHIP_OTP=m
#
# HW tracing support
@ -6276,24 +6275,6 @@ CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
@ -6403,6 +6384,7 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
# CONFIG_DLM is not set
# CONFIG_UNICODE is not set
CONFIG_IO_WQ=y
# end of File systems
#
@ -6470,8 +6452,8 @@ CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_SKCIPHER=y
CONFIG_CRYPTO_SKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
@ -6504,13 +6486,14 @@ CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_ECC=y
CONFIG_CRYPTO_ECDH=y
CONFIG_CRYPTO_ECRDSA=m
CONFIG_CRYPTO_CURVE25519=m
#
# Authenticated Encryption with Associated Data
#
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_GCM=y
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_AEGIS128=m
CONFIG_CRYPTO_AEGIS128_SIMD=y
CONFIG_CRYPTO_SEQIV=y
@ -6546,7 +6529,9 @@ CONFIG_CRYPTO_VMAC=m
#
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC32=y
# CONFIG_CRYPTO_XXHASH is not set
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_BLAKE2S=m
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_POLY1305=m
@ -6558,7 +6543,6 @@ CONFIG_CRYPTO_RMD160=m
CONFIG_CRYPTO_RMD256=m
CONFIG_CRYPTO_RMD320=m
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=m
@ -6570,11 +6554,9 @@ CONFIG_CRYPTO_WP512=m
#
# Ciphers
#
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_LIB_ARC4=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_BLOWFISH_COMMON=m
@ -6582,7 +6564,6 @@ CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST_COMMON=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
@ -6622,6 +6603,27 @@ CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_STATS is not set
CONFIG_CRYPTO_HASH_INFO=y
#
# Crypto library routines
#
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m
CONFIG_CRYPTO_LIB_BLAKE2S=m
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m
CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m
CONFIG_CRYPTO_LIB_CHACHA=m
CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m
CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m
CONFIG_CRYPTO_LIB_CURVE25519=m
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
@ -6629,6 +6631,8 @@ CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_SAFEXCEL=m
CONFIG_CRYPTO_DEV_CCREE=m
CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m
# CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_X509_CERTIFICATE_PARSER=y
@ -6725,6 +6729,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_DMA_DECLARE_COHERENT=y
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_CMA=y
@ -6750,6 +6755,9 @@ CONFIG_CLZ_TAB=y
CONFIG_MPILIB=y
CONFIG_LIBFDT=y
CONFIG_OID_REGISTRY=y
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
@ -6774,6 +6782,8 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_DYNAMIC_DEBUG is not set
CONFIG_SYMBOLIC_ERRNAME=y
CONFIG_DEBUG_BUGVERBOSE=y
# end of printk and dmesg options
#
@ -6784,7 +6794,6 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_INSTALL is not set
CONFIG_OPTIMIZE_INLINING=y
# CONFIG_DEBUG_SECTION_MISMATCH is not set
@ -6794,9 +6803,19 @@ CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# end of Compile-time checks and compiler options
#
# Generic Kernel Debugging Instruments
#
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_DEBUG_FS=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_UBSAN_ALIGNMENT=y
# end of Generic Kernel Debugging Instruments
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_MISC=y
@ -6815,6 +6834,7 @@ CONFIG_PAGE_EXTENSION=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_VM is not set
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
# CONFIG_DEBUG_VIRTUAL is not set
@ -6825,29 +6845,30 @@ CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_KASAN_STACK=1
# end of Memory Debugging
CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Lockups and Hangs
# Debug Oops, Lockups and Hangs
#
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
# CONFIG_SOFTLOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1
# CONFIG_WQ_WATCHDOG is not set
# end of Debug Lockups and Hangs
# end of Debug Oops, Lockups and Hangs
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
#
# Scheduler Debugging
#
CONFIG_SCHED_DEBUG=y
CONFIG_SCHED_INFO=y
CONFIG_SCHEDSTATS=y
# CONFIG_SCHED_STACK_END_CHECK is not set
# end of Scheduler Debugging
# CONFIG_DEBUG_TIMEKEEPING is not set
CONFIG_DEBUG_PREEMPT=y
@ -6872,11 +6893,17 @@ CONFIG_DEBUG_SPINLOCK=y
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
#
# Debug kernel data structures
#
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PLIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# end of Debug kernel data structures
CONFIG_DEBUG_CREDENTIALS=y
#
@ -6892,8 +6919,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
@ -6931,22 +6956,20 @@ CONFIG_DYNAMIC_FTRACE_WITH_REGS=y
# CONFIG_FUNCTION_PROFILER is not set
CONFIG_FTRACE_MCOUNT_RECORD=y
# CONFIG_FTRACE_STARTUP_TEST is not set
# CONFIG_TRACE_EVENT_INJECT is not set
# CONFIG_TRACEPOINT_BENCHMARK is not set
# CONFIG_RING_BUFFER_BENCHMARK is not set
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
# CONFIG_TRACE_EVAL_MAP_FILE is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
# CONFIG_MEMTEST is not set
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_UBSAN_ALIGNMENT=y
CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
CONFIG_STRICT_DEVMEM=y
# CONFIG_IO_STRICT_DEVMEM is not set
#
# arm Debugging
#
# CONFIG_ARM_PTDUMP_DEBUGFS is not set
# CONFIG_DEBUG_WX is not set
CONFIG_UNWINDER_FRAME_POINTER=y
@ -6956,4 +6979,18 @@ CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_CORESIGHT is not set
# end of arm Debugging
#
# Kernel Testing and Coverage
#
# CONFIG_KUNIT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
# CONFIG_MEMTEST is not set
# end of Kernel Testing and Coverage
# end of Kernel hacking

2
config/kernel/linux-rockchip-legacy.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.4.208 Kernel Configuration
# Linux/arm 4.4.211 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y

2
config/kernel/linux-rockchip64-legacy.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.207 Kernel Configuration
# Linux/arm64 4.4.211 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y

4
config/kernel/linux-sunxi-current.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.4.14 Kernel Configuration
# Linux/arm 5.4.16 Kernel Configuration
#
#
@ -5334,7 +5334,7 @@ CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y

8
config/kernel/linux-sunxi-dev.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.5.0-rc6 Kernel Configuration
# Linux/arm 5.5.0 Kernel Configuration
#
#
@ -3630,7 +3630,7 @@ CONFIG_VIDEO_V4L2_I2C=y
# CONFIG_VIDEO_ADV_DEBUG is not set
CONFIG_VIDEO_FIXED_MINOR_RANGES=y
CONFIG_VIDEO_TUNER=m
CONFIG_V4L2_MEM2MEM_DEV=m
CONFIG_V4L2_MEM2MEM_DEV=y
CONFIG_V4L2_FLASH_LED_CLASS=m
CONFIG_V4L2_FWNODE=y
CONFIG_VIDEOBUF_GEN=m
@ -3816,6 +3816,7 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
# CONFIG_VIDEO_SH_VEU is not set
CONFIG_VIDEO_SUN8I_DEINTERLACE=m
CONFIG_VIDEO_SUN8I_ROTATE=y
CONFIG_V4L_TEST_DRIVERS=y
# CONFIG_VIDEO_VIMC is not set
CONFIG_VIDEO_VIVID=m
@ -5315,7 +5316,7 @@ CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
@ -5660,6 +5661,7 @@ CONFIG_EXFAT_DISCARD=y
CONFIG_EXFAT_DEFAULT_CODEPAGE=437
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_WFX=m
CONFIG_RTL8723CS_NEW=m
# CONFIG_GOLDFISH is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_CHROME_PLATFORMS is not set

2
config/kernel/linux-sunxi64-current.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.4.14 Kernel Configuration
# Linux/arm64 5.4.16 Kernel Configuration
#
#

7
config/kernel/linux-sunxi64-dev.config
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.5.0-rc5 Kernel Configuration
# Linux/arm64 5.5.0 Kernel Configuration
#
#
@ -605,6 +605,7 @@ CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
CONFIG_HAVE_COPY_THREAD_TLS=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y
@ -2210,6 +2211,7 @@ CONFIG_LED_TRIGGER_PHY=y
#
# CONFIG_SFP is not set
CONFIG_ADIN_PHY=m
CONFIG_AC200_PHY=m
CONFIG_AMD_PHY=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AX88796B_PHY=m
@ -3338,6 +3340,7 @@ CONFIG_MFD_SUN4I_GPADC=y
# CONFIG_MFD_BCM590XX is not set
CONFIG_MFD_BD9571MWV=m
# CONFIG_MFD_AC100 is not set
CONFIG_MFD_AC200=m
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
@ -4429,6 +4432,7 @@ CONFIG_SND_SOC_ES7241=m
# CONFIG_SND_SOC_ES8328_I2C is not set
# CONFIG_SND_SOC_ES8328_SPI is not set
# CONFIG_SND_SOC_GTM601 is not set
CONFIG_SND_SOC_EC25=m
# CONFIG_SND_SOC_INNO_RK3036 is not set
CONFIG_SND_SOC_MAX98088=m
# CONFIG_SND_SOC_MAX98357A is not set
@ -5444,6 +5448,7 @@ CONFIG_EXFAT_DISCARD=y
CONFIG_EXFAT_DEFAULT_CODEPAGE=437
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_WFX=m
CONFIG_RTL8723CS_NEW=m
# CONFIG_GOLDFISH is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_CHROME_PLATFORMS is not set

2
config/sources/families/include/meson64_common.inc
View File

@ -22,7 +22,7 @@ case $BRANCH in
dev)
KERNELBRANCH='branch:master'
KERNELBRANCH='branch:linux-5.5.y'
;;

5
config/sources/families/odroidxu4.conf
View File

@ -17,12 +17,15 @@ case $BRANCH in
;;
current|dev)
current)
KERNELSOURCE='https://github.com/mihailescu2m/linux'
KERNELBRANCH='branch:odroidxu4-5.4.y'
KERNELDIR='linux-odroidxu4'
;;
dev)
KERNELBRANCH='branch:linux-5.5.y'
;;
esac

4
config/sources/families/rk3399.conf
View File

@ -22,12 +22,12 @@ if [[ $BOARD == roc-rk3399-pc ]]; then
BOOT_USE_MAINLINE_ATF=yes
elif [[ $BOARD == rockpi-4* ]]; then
elif [[ $BOARD == rockpi-4* || $BOARD == orangepi4 ]]; then
BOOT_USE_TPL_SPL_BLOB=yes
BL31_BLOB='rk33/rk3399_bl31_v1.30.elf'
elif [[ $BOARD == nanopim4v2 || $BOARD == orangepi4 ]]; then
elif [[ $BOARD == nanopim4v2 ]]; then
BOOT_USE_BLOBS=yes
DDR_BLOB='rk33/rk3399_ddr_933MHz_v1.24.bin'

2
config/sources/families/rockchip.conf
View File

@ -31,7 +31,7 @@ case $BRANCH in
dev)
:
KERNELBRANCH='branch:linux-5.5.y'
;;

2
lib/debootstrap.sh
View File

@ -613,7 +613,7 @@ create_image()
COMPRESS_OUTPUTIMAGE="sha,gpg,7z"
fi
if [[ $COMPRESS_OUTPUTIMAGE == *sha* ]]; then
if [[ $COMPRESS_OUTPUTIMAGE == *sha* || -n $CARD_DEVICE ]]; then
cd $DESTIMG
display_alert "SHA256 calculating" "${version}.img" "info"
sha256sum -b ${version}.img > ${version}.img.sha

80
lib/general.sh
View File

@ -18,6 +18,8 @@
# distro_menu
# addtorepo
# repo-remove-old-packages
# wait_for_package_manager
# prepare_host_basic
# prepare_host
# webseed
# download_and_verify
@ -657,6 +659,52 @@ repo-remove-old-packages() {
# wait_for_package_manager
#
# * installation will break if we try to install when package manager is running
#
wait_for_package_manager()
{
# exit if package manager is running in the back
while true; do
if [[ "$(fuser /var/lib/dpkg/lock 2>/dev/null; echo $?)" != 1 && "$(fuser /var/lib/dpkg/lock-frontend 2>/dev/null; echo $?)" != 1 ]]; then
display_alert "Package manager is running in the background." "Please wait! Retrying in 30 sec" "wrn"
sleep 30
else
break
fi
done
}
# prepare_host_basic
#
# * installs only basic packages
#
prepare_host_basic()
{
# wait until package manager finishes possible system maintanace
wait_for_package_manager
# need lsb_release to decide what to install
if [[ $(dpkg-query -W -f='${db:Status-Abbrev}\n' lsb-release 2>/dev/null) != *ii* ]]; then
display_alert "Installing package" "lsb-release"
apt -q update && apt install -q -y --no-install-recommends lsb-release
fi
# need to install dialog if person is starting with a interactive mode
if [[ $(dpkg-query -W -f='${db:Status-Abbrev}\n' dialog 2>/dev/null) != *ii* ]]; then
display_alert "Installing package" "dialog"
apt -q update && apt install -q -y --no-install-recommends dialog
fi
}
# prepare_host
#
# * checks and installs necessary packages
@ -673,37 +721,33 @@ prepare_host()
exit_with_error "Running this tool on non x86-x64 build host in not supported"
fi
# exit if package manager is running in the back
while true; do
fuser -s /var/lib/dpkg/lock
if [[ $? = 0 ]]; then
display_alert "Package manager is running in the background." "retrying in 30 sec" "wrn"
sleep 30
else
break
fi
done
# wait until package manager finishes possible system maintanace
wait_for_package_manager
# temporally fix for Locales settings
export LC_ALL="en_US.UTF-8"
# need lsb_release to decide what to install
if [[ $(dpkg-query -W -f='${db:Status-Abbrev}\n' lsb-release 2>/dev/null) != *ii* ]]; then
display_alert "Installing package" "lsb-release"
apt -q update && apt install -q -y --no-install-recommends lsb-release
fi
# packages list for host
# NOTE: please sync any changes here with the Dockerfile and Vagrantfile
local hostdeps="wget ca-certificates device-tree-compiler pv bc lzop zip binfmt-support build-essential ccache debootstrap ntpdate \
gawk gcc-arm-linux-gnueabihf qemu-user-static u-boot-tools uuid-dev zlib1g-dev unzip libusb-1.0-0-dev fakeroot \
parted pkg-config libncurses5-dev whiptail debian-keyring debian-archive-keyring f2fs-tools libfile-fcntllock-perl rsync libssl-dev \
nfs-kernel-server btrfs-progs ncurses-term p7zip-full kmod dosfstools libc6-dev-armhf-cross \
curl patchutils python liblz4-tool libpython2.7-dev linux-base swig libpython-dev aptly acl \
curl patchutils liblz4-tool libpython2.7-dev linux-base swig aptly acl \
locales ncurses-base pixz dialog systemd-container udev lib32stdc++6 libc6-i386 lib32ncurses5 lib32tinfo5 \
bison libbison-dev flex libfl-dev cryptsetup gpgv1 gnupg1 cpio aria2 pigz dirmngr"
local codename=$(lsb_release -sc)
# Getting ready for Ubuntu 20.04
if [[ $codename == focal ]]; then
hostdeps+=" python2 python3 libpython3-dev"
ln -fs /usr/bin/python2.7 /usr/bin/python2
ln -fs /usr/bin/python2.7 /usr/bin/python
else
hostdeps+=" python libpython-dev"
fi
display_alert "Build host OS release" "${codename:-(unknown)}" "info"
# Ubuntu Xenial x86_64 is the only fully supported host OS release
@ -776,7 +820,7 @@ prepare_host()
display_alert "Installing build dependencies"
apt -q update
apt -y upgrade
apt -q -y --no-install-recommends install "${deps[@]}" | tee -a $DEST/debug/hostdeps.log
apt -q -y --no-install-recommends install -o Dpkg::Options::='--force-confold' "${deps[@]}" | tee -a $DEST/debug/hostdeps.log
update-ccache-symlinks
fi

3
lib/main.sh
View File

@ -126,6 +126,9 @@ if [[ -n $REPOSITORY_UPDATE ]]; then
fi
# we need dialog to display the menu in case not installed. Other stuff gets installed later
prepare_host_basic
# if KERNEL_ONLY, KERNEL_CONFIGURE, BOARD, BRANCH or RELEASE are not set, display selection menu
if [[ -z $KERNEL_ONLY ]]; then

4
packages/bsp/common/etc/profile.d/armbian-lang.sh Normal file
View File

@ -0,0 +1,4 @@
# This should fix
# perl: warning: Setting locale failed.
export LC_ALL=$LANG

18
packages/bsp/common/etc/update-motd.d/10-armbian-header
View File

@ -24,3 +24,21 @@ done
KERNELID=$(uname -r)
TERM=linux toilet -f standard -F metal $(echo $BOARD_NAME | sed 's/Orange Pi/OPi/' | sed 's/NanoPi/NPi/' | sed 's/Banana Pi/BPi/')
echo -e "Welcome to \e[0;91mArmbian \x1B[0m$(if [[ $ID == debian ]]; then echo ${PRETTY_NAME##*\(} | sed -e 's/^.*Linux //' | sed "s/\/.*//" | sed 's|)||'; else echo -n ${VERSION_CODENAME^};fi) with \e[0;91mLinux $KERNELID\x1B[0m\n"
# displaying status warnings
if [[ "$IMAGE_TYPE" != "stable" ]]; then
[[ "$IMAGE_TYPE" == "user-built" ]] && UNSUPPORTED_TEXT="built from trunk"
[[ "$IMAGE_TYPE" == "nightly" ]] && UNSUPPORTED_TEXT="untested automated build"
else
[[ "$BOARD_TYPE" == "csc" || "$BOARD_TYPE" == "tvb" ]] && UNSUPPORTED_TEXT="community creations"
[[ "$BOARD_TYPE" == "wip" ]] && UNSUPPORTED_TEXT="work in progress"
[[ "$BOARD_TYPE" == "eos" ]] && UNSUPPORTED_TEXT="end of life"
fi
if [[ -n $DISTRIBUTION_STATUS && $DISTRIBUTION_STATUS != supported ]]; then
[[ -n $UNSUPPORTED_TEXT ]] && UNSUPPORTED_TEXT+=" & "
UNSUPPORTED_TEXT+="unsupported ($DISTRIBUTION_CODENAME) userspace!"
fi
[[ -n $UNSUPPORTED_TEXT ]] && echo -e "\e[0;91mNo end-user support: \x1B[0m$UNSUPPORTED_TEXT \e[0;91m\n"

13
patch/kernel/meson64-dev/0450-arm64-dts-fix-IR-receiver-beelinkA1.patch
View File

@ -1,13 +0,0 @@
diff -Naur linux-5.5-rc1-old/arch/arm64/boot/dts/rockchip/rk3328-a1.dts linux-5.5-rc1-new/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
--- linux-5.5-rc1-old/arch/arm64/boot/dts/rockchip/rk3328-a1.dts 2019-12-08 23:57:55.000000000 +0100
+++ linux-5.5-rc1-new/arch/arm64/boot/dts/rockchip/rk3328-a1.dts 2019-12-12 20:53:51.626666660 +0100
@@ -49,7 +49,8 @@
ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ linux,rc-map-name = "rc-beelink-gs1";
};
};

52
patch/kernel/odroidxu4-current/0002-next-soc-samsung-exynos-asv-fix-potential-overflow-in-multiply.patch Normal file
View File

@ -0,0 +1,52 @@
From: Colin Ian King <colin.king@canonical.com>
The multiplication of opp_freq by MHZ is performed using unsigned int
multiplication however the result is being passed into a function where
the frequency is an unsigned long, so there is an expectation that the
result won't fit into an unsigned int. Fix any potential integer overflow
my making opp_freq an unsigned long. Also change from %u to %lu format
specifiers
Addresses-Coverity: ("Unintentional integer overflow")
Fixes: 5ea428595cc5 ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/soc/samsung/exynos-asv.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/samsung/exynos-asv.c b/drivers/soc/samsung/exynos-asv.c
index 8abf4dfaa5c5..d66fc74379a3 100644
--- a/drivers/soc/samsung/exynos-asv.c
+++ b/drivers/soc/samsung/exynos-asv.c
@@ -30,7 +30,7 @@ static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
{
struct exynos_asv_subsys *subsys = NULL;
struct dev_pm_opp *opp;
- unsigned int opp_freq;
+ unsigned long opp_freq;
int i;
for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) {
@@ -51,7 +51,7 @@ static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
opp = dev_pm_opp_find_freq_exact(cpu, opp_freq * MHZ, true);
if (IS_ERR(opp)) {
- dev_info(asv->dev, "cpu%d opp%d, freq: %u missing\n",
+ dev_info(asv->dev, "cpu%d opp%d, freq: %lu missing\n",
cpu->id, i, opp_freq);
continue;
@@ -68,11 +68,11 @@ static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
new_volt, new_volt, new_volt);
if (ret < 0)
dev_err(asv->dev,
- "Failed to adjust OPP %u Hz/%u uV for cpu%d\n",
+ "Failed to adjust OPP %lu Hz/%u uV for cpu%d\n",
opp_freq, new_volt, cpu->id);
else
dev_dbg(asv->dev,
- "Adjusted OPP %u Hz/%u -> %u uV, cpu%d\n",
+ "Adjusted OPP %lu Hz/%u -> %u uV, cpu%d\n",
opp_freq, volt, new_volt, cpu->id);
}

271
patch/kernel/odroidxu4-current/0003-add-yaml-DWC2-bindings.patch Normal file
View File

@ -0,0 +1,271 @@
Convert DWC2 bindings to DT schema format using json-schema.
DWC2 is widely use but a couple of compatibles and properties
(vusb_d-supply,vusb_a-supply) were missing in dwc2.txt, the
patch add them.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
CC: Minas Harutyunyan <hminas@synopsys.com>
changes in version 2:
- put Minas Harutyunyan <hminas@synopsys.com> as maintainer
- remove type and description from phy property
- remove description from compatible items
- simplify samsung,s3c6400-hsotg compatible handling
Documentation/devicetree/bindings/usb/dwc2.txt | 64 ----------
Documentation/devicetree/bindings/usb/dwc2.yaml | 152 ++++++++++++++++++++++++
2 files changed, 152 insertions(+), 64 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/dwc2.txt
create mode 100644 Documentation/devicetree/bindings/usb/dwc2.yaml
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
deleted file mode 100644
index aafff3a6904d..000000000000
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-Platform DesignWare HS OTG USB 2.0 controller
------------------------------------------------------
-
-Required properties:
-- compatible : One of:
- - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
- - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
- - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
- - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
- - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
- - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
- - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
- - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
- - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;
- - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
- - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
- - "amlogic,meson-g12a-usb": The DWC2 USB controller instance in Amlogic G12A SoCs;
- - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
- - snps,dwc2: A generic DWC2 USB controller with default parameters.
- - "st,stm32f4x9-fsotg": The DWC2 USB FS/HS controller instance in STM32F4x9 SoCs
- configured in FS mode;
- - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
- configured in HS mode;
- - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
- configured in HS mode;
-- reg : Should contain 1 register range (address and length)
-- interrupts : Should contain 1 interrupt
-- clocks: clock provider specifier
-- clock-names: shall be "otg"
-Refer to clk/clock-bindings.txt for generic clock consumer properties
-
-Optional properties:
-- phys: phy provider specifier
-- phy-names: shall be "usb2-phy"
-- vbus-supply: reference to the VBUS regulator. Depending on the current mode
- this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
- regulator is updated if the controller is configured in "otg" mode and the
- status changes between "host" and "peripheral".
-Refer to phy/phy-bindings.txt for generic phy consumer properties
-- dr_mode: shall be one of "host", "peripheral" and "otg"
- Refer to usb/generic.txt
-- g-rx-fifo-size: size of rx fifo size in gadget mode.
-- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
-- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
-- snps,need-phy-for-wake: If present indicates that the phy needs to be left
- on for remote wakeup during suspend.
-- snps,reset-phy-on-wake: If present indicates that we need to reset the PHY when
- we detect a wakeup. This is due to a hardware errata.
-
-Deprecated properties:
-- g-use-dma: gadget DMA mode is automatically detected
-
-Example:
-
- usb@101c0000 {
- compatible = "ralink,rt3050-usb, snps,dwc2";
- reg = <0x101c0000 40000>;
- interrupts = <18>;
- clocks = <&usb_otg_ahb_clk>;
- clock-names = "otg";
- phys = <&usbphy>;
- phy-names = "usb2-phy";
- snps,need-phy-for-wake;
- };
diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml
new file mode 100644
index 000000000000..e29dfcd2466c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
@@ -0,0 +1,152 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/dwc2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: DesignWare HS OTG USB 2.0 controller Bindings
+
+maintainers:
+ - Minas Harutyunyan <hminas@synopsys.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: brcm,bcm2835-usb
+ - const: hisilicon,hi6220-usb
+ - items:
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,px30-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3036-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rv1108-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3188-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3228-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3288-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - const: lantiq,arx100-usb
+ - const: lantiq,xrx200-usb
+ - items:
+ - const: amlogic,meson8-usb
+ - const: snps,dwc2
+ - items:
+ - const: amlogic,meson8b-usb
+ - const: snps,dwc2
+ - const: amlogic,meson-gxbb-usb
+ - items:
+ - const: amlogic,meson-g12a-usb
+ - const: snps,dwc2
+ - const: amcc,dwc-otg
+ - const: snps,dwc2
+ - const: st,stm32f4x9-fsotg
+ - const: st,stm32f4x9-hsotg
+ - const: st,stm32f7-hsotg
+ - const: samsung,s3c6400-hsotg
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: otg
+
+ resets:
+ items:
+ - description: common reset
+ - description: ecc reset
+ minItems: 1
+
+ reset-names:
+ items:
+ - const: dwc2
+ - const: dwc2-ecc
+ minItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: usb2-phy
+
+ vbus-supply:
+ description: reference to the VBUS regulator. Depending on the current mode
+ this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
+ regulator is updated if the controller is configured in "otg" mode and the
+ status changes between "host" and "peripheral".
+
+ vusb_d-supply:
+ description: phandle to voltage regulator of digital section,
+
+ vusb_a-supply:
+ description: phandle to voltage regulator of analog section.
+
+ dr_mode:
+ enum: [host, peripheral, otg]
+
+ g-rx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: size of rx fifo size in gadget mode.
+
+ g-np-tx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: size of non-periodic tx fifo size in gadget mode.
+
+ g-tx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
+
+ snps,need-phy-for-wake:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: If present indicates that the phy needs to be left on for remote wakeup during suspend.
+
+ snps,reset-phy-on-wake:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: If present indicates that we need to reset the PHY when we detect a wakeup.
+ This is due to a hardware errata.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ usb@101c0000 {
+ compatible = "ralink,rt3050-usb, snps,dwc2";
+ reg = <0x101c0000 40000>;
+ interrupts = <18>;
+ clocks = <&usb_otg_ahb_clk>;
+ clock-names = "otg";
+ phys = <&usbphy>;
+ phy-names = "usb2-phy";
+ snps,need-phy-for-wake;
+ };
+
+...
Remove "snps,dwc2" from hsotg@12480000 node compatible list because
"samsung,s3c6400-hsotg" should be enough.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index b016b0b68306..d4866269f4ee 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -362,7 +362,7 @@
};
hsotg: hsotg@12480000 {
- compatible = "samsung,s3c6400-hsotg", "snps,dwc2";
+ compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_USBOTG>;

2421
patch/kernel/odroidxu4-current/03-patch-5.4.11-12.patch Normal file
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8010
patch/kernel/odroidxu4-current/03-patch-5.4.12-13.patch Normal file
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8137
patch/kernel/odroidxu4-current/03-patch-5.4.13-14.patch Normal file
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4477
patch/kernel/odroidxu4-current/03-patch-5.4.14-15.patch Normal file
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5662
patch/kernel/odroidxu4-current/03-patch-5.4.15-16.patch Normal file
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4118
patch/kernel/odroidxu4-current/03-patch-5.4.16-17.patch Normal file
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269
patch/kernel/odroidxu4-current/dvfs-fixes.patch Normal file
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@ -0,0 +1,269 @@
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 37bd34d56..8fa8eb541 100644
--- a/drivers/devfreq/exynos-bus.c
+++ b/drivers/devfreq/exynos-bus.c
@@ -15,11 +15,10 @@
#include <linux/device.h>
#include <linux/export.h>
#include <linux/module.h>
-#include <linux/of_device.h>
+#include <linux/of.h>
#include <linux/pm_opp.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
-#include <linux/slab.h>
#define DEFAULT_SATURATION_RATIO 40
@@ -127,6 +126,7 @@ static int exynos_bus_get_dev_status(struct device *dev,
ret = exynos_bus_get_event(bus, &edata);
if (ret < 0) {
+ dev_err(dev, "failed to get event from devfreq-event devices\n");
stat->total_time = stat->busy_time = 0;
goto err;
}
@@ -243,7 +243,7 @@ static int exynos_bus_parse_of(struct device_node *np,
{
struct device *dev = bus->dev;
struct dev_pm_opp *opp;
- unsigned long rate, opp_rate;
+ unsigned long rate;
int ret;
/* Get the clock to provide each bus with source clock */
@@ -267,21 +267,13 @@ static int exynos_bus_parse_of(struct device_node *np,
}
rate = clk_get_rate(bus->clk);
- opp_rate = rate;
- opp = devfreq_recommended_opp(dev, &opp_rate, 0);
+
+ opp = devfreq_recommended_opp(dev, &rate, 0);
if (IS_ERR(opp)) {
dev_err(dev, "failed to find dev_pm_opp\n");
ret = PTR_ERR(opp);
goto err_opp;
}
- /*
- * FIXME: U-boot leaves clock source at incorrect PLL, this results
- * in clock rate outside defined OPP rate. Work around this bug by
- * setting clock rate to recommended one.
- */
- if (rate > opp_rate)
- clk_set_rate(bus->clk, opp_rate);
-
bus->curr_freq = dev_pm_opp_get_freq(opp);
dev_pm_opp_put(opp);
@@ -295,52 +287,12 @@ static int exynos_bus_parse_of(struct device_node *np,
return ret;
}
-static int exynos_bus_probe(struct platform_device *pdev)
+static int exynos_bus_profile_init(struct exynos_bus *bus,
+ struct devfreq_dev_profile *profile)
{
- struct device *dev = &pdev->dev;
- struct device_node *np = dev->of_node, *node;
- struct devfreq_dev_profile *profile;
+ struct device *dev = bus->dev;
struct devfreq_simple_ondemand_data *ondemand_data;
- struct devfreq_passive_data *passive_data;
- struct devfreq *parent_devfreq;
- struct exynos_bus *bus;
- int ret, max_state;
- unsigned long min_freq, max_freq;
- bool passive = false;
-
- if (!np) {
- dev_err(dev, "failed to find devicetree node\n");
- return -EINVAL;
- }
-
- bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
- if (!bus)
- return -ENOMEM;
- mutex_init(&bus->lock);
- bus->dev = &pdev->dev;
- platform_set_drvdata(pdev, bus);
-
- profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL);
- if (!profile)
- return -ENOMEM;
-
- node = of_parse_phandle(dev->of_node, "devfreq", 0);
- if (node) {
- of_node_put(node);
- passive = true;
- } else {
- ret = exynos_bus_parent_parse_of(np, bus);
- if (ret < 0)
- return ret;
- }
-
- /* Parse the device-tree to get the resource information */
- ret = exynos_bus_parse_of(np, bus);
- if (ret < 0)
- goto err_reg;
-
- if (passive)
- goto passive;
+ int ret;
/* Initialize the struct profile and governor data for parent device */
profile->polling_ms = 50;
@@ -349,10 +301,9 @@ static int exynos_bus_probe(struct platform_device *pdev)
profile->exit = exynos_bus_exit;
ondemand_data = devm_kzalloc(dev, sizeof(*ondemand_data), GFP_KERNEL);
- if (!ondemand_data) {
- ret = -ENOMEM;
- goto err;
- }
+ if (!ondemand_data)
+ return -ENOMEM;
+
ondemand_data->upthreshold = 40;
ondemand_data->downdifferential = 5;
@@ -362,15 +313,14 @@ static int exynos_bus_probe(struct platform_device *pdev)
ondemand_data);
if (IS_ERR(bus->devfreq)) {
dev_err(dev, "failed to add devfreq device\n");
- ret = PTR_ERR(bus->devfreq);
- goto err;
+ return PTR_ERR(bus->devfreq);
}
/* Register opp_notifier to catch the change of OPP */
ret = devm_devfreq_register_opp_notifier(dev, bus->devfreq);
if (ret < 0) {
dev_err(dev, "failed to register opp notifier\n");
- goto err;
+ return ret;
}
/*
@@ -380,33 +330,44 @@ static int exynos_bus_probe(struct platform_device *pdev)
ret = exynos_bus_enable_edev(bus);
if (ret < 0) {
dev_err(dev, "failed to enable devfreq-event devices\n");
- goto err;
+ return ret;
}
ret = exynos_bus_set_event(bus);
if (ret < 0) {
dev_err(dev, "failed to set event to devfreq-event devices\n");
- goto err;
+ goto err_edev;
}
- goto out;
-passive:
+ return 0;
+
+err_edev:
+ if (exynos_bus_disable_edev(bus))
+ dev_warn(dev, "failed to disable the devfreq-event devices\n");
+
+ return ret;
+}
+
+static int exynos_bus_profile_init_passive(struct exynos_bus *bus,
+ struct devfreq_dev_profile *profile)
+{
+ struct device *dev = bus->dev;
+ struct devfreq_passive_data *passive_data;
+ struct devfreq *parent_devfreq;
+
/* Initialize the struct profile and governor data for passive device */
profile->target = exynos_bus_target;
profile->exit = exynos_bus_passive_exit;
/* Get the instance of parent devfreq device */
parent_devfreq = devfreq_get_devfreq_by_phandle(dev, 0);
- if (IS_ERR(parent_devfreq)) {
- ret = -EPROBE_DEFER;
- goto err;
- }
+ if (IS_ERR(parent_devfreq))
+ return -EPROBE_DEFER;
passive_data = devm_kzalloc(dev, sizeof(*passive_data), GFP_KERNEL);
- if (!passive_data) {
- ret = -ENOMEM;
- goto err;
- }
+ if (!passive_data)
+ return -ENOMEM;
+
passive_data->parent = parent_devfreq;
/* Add devfreq device for exynos bus with passive governor */
@@ -415,11 +376,61 @@ static int exynos_bus_probe(struct platform_device *pdev)
if (IS_ERR(bus->devfreq)) {
dev_err(dev,
"failed to add devfreq dev with passive governor\n");
- ret = PTR_ERR(bus->devfreq);
- goto err;
+ return PTR_ERR(bus->devfreq);
+ }
+
+ return 0;
+}
+
+static int exynos_bus_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node, *node;
+ struct devfreq_dev_profile *profile;
+ struct exynos_bus *bus;
+ int ret, max_state;
+ unsigned long min_freq, max_freq;
+ bool passive = false;
+
+ if (!np) {
+ dev_err(dev, "failed to find devicetree node\n");
+ return -EINVAL;
+ }
+
+ bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
+ if (!bus)
+ return -ENOMEM;
+ mutex_init(&bus->lock);
+ bus->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bus);
+
+ profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL);
+ if (!profile)
+ return -ENOMEM;
+
+ node = of_parse_phandle(dev->of_node, "devfreq", 0);
+ if (node) {
+ of_node_put(node);
+ passive = true;
+ } else {
+ ret = exynos_bus_parent_parse_of(np, bus);
+ if (ret < 0)
+ return ret;
}
-out:
+ /* Parse the device-tree to get the resource information */
+ ret = exynos_bus_parse_of(np, bus);
+ if (ret < 0)
+ goto err_reg;
+
+ if (passive)
+ ret = exynos_bus_profile_init_passive(bus, profile);
+ else
+ ret = exynos_bus_profile_init(bus, profile);
+
+ if (ret < 0)
+ goto err;
+
max_state = bus->devfreq->profile->max_state;
min_freq = (bus->devfreq->profile->freq_table[0] / 1000);
max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000);

0
patch/kernel/odroidxu4-current/7.patch → patch/kernel/odroidxu4-current/overlay.patch
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1
patch/kernel/odroidxu4-dev
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@ -1 +0,0 @@
odroidxu4-current

2162
patch/kernel/odroidxu4-legacy/patch-4.14.165-166.patch Normal file
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2219
patch/kernel/odroidxu4-legacy/patch-4.14.166-167.patch Normal file
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2692
patch/kernel/rk3399-legacy/patch-4.4.210-211.patch Normal file
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1
patch/kernel/rockchip-dev
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@ -1 +0,0 @@
rockchip-current

74
patch/kernel/rockchip-dev/1-2-regulator-act8865-add-restart-handler-for-act8846.patch Normal file
View File

@ -0,0 +1,74 @@
Patches act8846 regulator providing the proper reset handle and exploit
the SIPC bit in GLB_POWER_OFF register. Mainly used to reset some rockchip
boards.
Origin: <https://patchwork.kernel.org/patch/6409521/>
diff --git a/drivers/regulator/act8865-regulator.c b/drivers/regulator/act8865-regulator.c
index 2ff73d7..836d10b 100644
--- a/drivers/regulator/act8865-regulator.c
+++ b/drivers/regulator/act8865-regulator.c
@@ -27,6 +27,7 @@
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>
#include <dt-bindings/regulator/active-semi,8865-regulator.h>
+#include <linux/reboot.h>
/*
* ACT8600 Global Register Map.
@@ -133,6 +134,8 @@
#define ACT8865_VOLTAGE_NUM 64
#define ACT8600_SUDCDC_VOLTAGE_NUM 255
+#define ACT8846_SIPC_MASK 0x01
+
struct act8865 {
struct regmap *regmap;
int off_reg;
@@ -402,6 +405,22 @@ static void act8865_power_off(void)
while (1);
}
+static int act8846_power_cycle(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ struct act8865 *act8846;
+
+ act8846 = i2c_get_clientdata(act8865_i2c_client);
+ regmap_write(act8846->regmap, ACT8846_GLB_OFF_CTRL, ACT8846_SIPC_MASK);
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block act8846_restart_handler = {
+ .notifier_call = act8846_power_cycle,
+ .priority = 129,
+};
+
static int act8865_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
@@ -484,6 +503,8 @@ static int act8865_pmic_probe(struct i2c_client *client,
}
if (of_device_is_system_power_controller(dev->of_node)) {
+ int ret;
+
if (!pm_power_off && (off_reg > 0)) {
act8865_i2c_client = client;
act8865->off_reg = off_reg;
@@ -492,6 +513,14 @@ static int act8865_pmic_probe(struct i2c_client *client,
} else {
dev_err(dev, "Failed to set poweroff capability, already defined\n");
}
+
+ if (type == ACT8846) {
+ act8865_i2c_client = client;
+ ret = register_restart_handler(&act8846_restart_handler);
+ if (ret)
+ pr_err("%s: cannot register restart handler, %d\n",
+ __func__, ret);
+ }
}
/* Finally register devices */

35
patch/kernel/rockchip-dev/1001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch Normal file
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@ -0,0 +1,35 @@
From 604ea7fc311af2b3a41e7fe3b4fbde0ee03dfb9c Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:09:50 +0200
Subject: [PATCH 04/28] dts: rk3288: miqi: Enabling the Mali GPU node
Why is the MiQi the only one left without a working mali GPU node ?
Seriously, is there a rk3288 chipset WITHOUT a mali GPU ? Couldn't
they enable it once in the DTSI, instead of defining it as "disabled"
and enabling it in every DTS file ?
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 4d923aa6..3cd60674 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -149,6 +149,11 @@
status = "ok";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
--
2.11.0

45
patch/kernel/rockchip-dev/1002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch Normal file
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@ -0,0 +1,45 @@
From 89e5763110ca77d68a4be00cd97a638adc2401d5 Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Tue, 2 Aug 2016 08:31:00 +0200
Subject: [PATCH 05/28] ARM: dts: rockchip: fix the regulator's voltage range
on MiQi board
The board declared too narrow a voltage range for the CPU and GPU
regulators, preventing it from using the full CPU frequency range.
The regulators support 712500 to 1500000 microvolts.
Signed-off-by: Willy Tarreau <w@1wt.eu>
(cherry picked from commit 95330e63a9295a2632cee8cce5db80677f01857a)
---
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 3cd60674..a1c3cdaa 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -168,8 +168,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x40>;
regulator-name = "vdd_cpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-enable-ramp-delay = <300>;
@@ -182,8 +182,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x41>;
regulator-name = "vdd_gpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
--
2.11.0

46
patch/kernel/rockchip-dev/1003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch Normal file
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@ -0,0 +1,46 @@
From c27e445527e949f3ef46d5326066196969c17d23 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sun, 12 Mar 2017 19:43:15 +0000
Subject: [PATCH 06/28] ARM: dts: rockchip: add the MiQi board's fan definition
The MiQi board is sold with an enclosure in which a fan is connected
to the second LED output, and configured by default in "heartbeat"
mode so that it rotates slowly and increases when the CPU load
increases, ensuring appropriate cooling by default. This LED output
is called "Fan" in the original kernel and connected to GPIO18
(gpiochip 0, pin 18). Here we called it "miqi:green:fan" to stay
consistent with the kernel's naming conventions.
It's worth noting that without this patch the fan doesn't work at
all, risking to make the board overheat.
Fixes: 162718c (v4.7)
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Myy <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index a1c3cdaa..0e383595 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -67,6 +67,13 @@
leds {
compatible = "gpio-leds";
+ fan {
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "miqi:green:fan";
+ linux,default-trigger = "heartbeat";
+ };
+
+
work {
gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "miqi:green:user";
--
2.11.0

31
patch/kernel/rockchip-dev/1007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch Normal file
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@ -0,0 +1,31 @@
From 062488e4b8fd552c01e1104b3bc91a6f7ffe6c41 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:24:47 +0200
Subject: [PATCH 10/28] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
The spi2_cs1 pin reference is missing in the spi2 first pin control
definition.
This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 5b789528..9ed532cc 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -334,7 +334,7 @@
dma-names = "tx", "rx";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
+ pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0 &spi2_cs1>;
reg = <0x0 0xff130000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.11.0

56
patch/kernel/rockchip-dev/1009-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch.disabled Normal file
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@ -0,0 +1,56 @@
From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:39:00 +0200
Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
sizes of MMC nodes
Imported from the Rockchip 4.4 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index be985f02..14ef8202 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -236,6 +236,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0c0000 0x0 0x4000>;
resets = <&cru SRST_MMC0>;
reset-names = "reset";
@@ -250,6 +252,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0d0000 0x0 0x4000>;
resets = <&cru SRST_SDIO0>;
reset-names = "reset";
@@ -264,6 +268,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0e0000 0x0 0x4000>;
resets = <&cru SRST_SDIO1>;
reset-names = "reset";
@@ -278,6 +284,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0f0000 0x0 0x4000>;
resets = <&cru SRST_EMMC>;
reset-names = "reset";
--
2.11.0

27
patch/kernel/rockchip-dev/1010-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch Normal file
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@ -0,0 +1,27 @@
From ac220d592aa38b9b717d36f7bb93f7be5a08f6b3 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:43:51 +0200
Subject: [PATCH 14/28] ARM: DTSI: rk3288.dtsi: Adding missing EDP power domain
Imported from Rockchip 4.4 kernel patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 14ef8202..10ecebb4 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1105,6 +1105,7 @@
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
+ power-domains = <&power RK3288_PD_VIO>;
phys = <&edp_phy>;
phy-names = "dp";
resets = <&cru SRST_EDP>;
--
2.11.0

31
patch/kernel/rockchip-dev/1012-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch Normal file
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@ -0,0 +1,31 @@
From a0602b2724893de7ac9b4190a7a6bb66458da2d5 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:54:37 +0200
Subject: [PATCH 17/28] ARM: DTSI: rk3288.dtsi: Fixed the SPDIF node address
Now, the typo is only in the name of the node itself, not in the
actual registers addresses definition.
Still, this ought to be fixed one day !
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 125f8835..e5d3d3c9 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -922,7 +922,7 @@
status = "disabled";
};
- spdif: sound@ff88b0000 {
+ spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;
--
2.11.0

98
patch/kernel/rockchip-dev/1013-ARM-DTS-rk3288-tinker-Enabling-SDIO-and-Wifi.patch Normal file
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@ -0,0 +1,98 @@
From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 21:58:56 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
Adding the appropriate nodes in order to exploit the WiFi capabilities
of the board.
Since these capabilities are provided through SDIO, and the SDIO
nodes were not defined, these were added too.
These seems to depend on each other so they are added in one big
patch.
Split if necessary.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 1e43527aa..d4df13bed 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -6,8 +6,70 @@
/dts-v1/;
#include "rk3288-tinker.dtsi"
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
model = "Rockchip RK3288 Asus Tinker Board";
compatible = "asus,rk3288-tinker", "rockchip,rk3288";
+
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ sdio_vref = <1800>;
+ status = "okay";
+ wifi_chip_type = "8723bs";
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&io_domains {
+ wifi-supply = <&vcc_18>;
+};
+
+&pinctrl {
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+ supports-sdio;
};
--
2.16.4

62
patch/kernel/rockchip-dev/1014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch Normal file
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@ -0,0 +1,62 @@
From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:03:26 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
The most essential being the RTS pin, which is clearly needed to
upload the initial configuration into the Realtek Bluetooth
chip, and make the Bluetooth chip work.
Now, the Bluetooth chip also needs 3 other GPIOS to be enabled.
I'll see how I do that through the DTS file in a near future.
The 3 GPIOS being :
Bluetooth Reset : <&gpio4 29 GPIO_ACTIVE_HIGH>
Bluetooth Wake : <&gpio4 26 GPIO_ACTIVE_HIGH>
Bluetooth Wake_Host_IRQ : <&gpio4 31 GPIO_ACTIVE_HIGH>
These are currently setup manually, through scripts. But it seems that
GPIO handling through /sys entries might not be possible in the long
term, the replacement being libgpio.
Anyway, if you're interesting in enabling the Bluetooth GPIO by hand,
here are the commands :
cd /sys/class/gpio &&
echo 146 > export &&
echo 149 > export &&
echo 151 > export &&
echo high > gpio146/direction &&
echo high > gpio149/direction &&
echo high > gpio151/direction
Resetting the chip is done like this :
echo "Resetting the Bluetooth chip"
cd /sys/class/gpio/gpio149 &&
echo 0 > value &&
sleep 1 &&
echo 1 > value &&
sleep 1
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index d4df13bed..b92e59c1e 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -73,3 +73,9 @@
status = "okay";
supports-sdio;
};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+};
+
--
2.16.4

28
patch/kernel/rockchip-dev/1015-ARM-DTSI-rk3288-tinker-Improving-the-CPU-max-voltage.patch Normal file
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@ -0,0 +1,28 @@
From ebc29962ac27264772a4227f5abd6900cb72fa79 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:16:05 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index aa107ee41..3da1c830f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -164,7 +164,7 @@
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-max-microvolt = <1450000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.16.4

31
patch/kernel/rockchip-dev/1016-ARM-DTSI-rk3288-tinker-Setting-up-the-SD-regulators.patch Normal file
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@ -0,0 +1,31 @@
From 3dacea70a8e434008f5b1f119a7f7da9aebc772c Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:18:58 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Setting up the SD regulators
Some are needed and some are not. Playing with these parameters is
required to get reboot working on these boards.
I still can't believe that these boards can't soft reset correctly.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 3da1c830f..dd1090728 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -254,7 +254,8 @@
};
vccio_sd: LDO_REG5 {
+ regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
--
2.16.4

53
patch/kernel/rockchip-dev/1017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch Normal file
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@ -0,0 +1,53 @@
From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:11:24 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
And all the hardware behind.
Taken from @TonyMac32, Butchered by @Miouyouyou .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index b92e59c1e..96d05fc6b 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -40,6 +40,31 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0 0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
&io_domains {
wifi-supply = <&vcc_18>;
};
--
2.16.4

50
patch/kernel/rockchip-dev/1018-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch Normal file
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@ -0,0 +1,50 @@
From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 96d05fc6b..17bfea298 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -99,6 +99,25 @@
supports-sdio;
};
+&spi2 {
+ max-freq = <50000000>;
+ status = "okay";
+
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
--
2.16.4

33
patch/kernel/rockchip-dev/1019-ARM-DTSI-rk3288-tinker-Defining-SDMMC-properties.patch Normal file
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@ -0,0 +1,33 @@
From 487db7cefc9861fdaf30579c378a98f0360690ae Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:27:14 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Defining SDMMC properties
I never knew if these properties were required to fix the dreaded
reboot issue...
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index dd1090728..8edd6f681 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -436,7 +436,12 @@
disable-wp; /* wp not hooked up */
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
status = "okay";
+ supports-sd;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};
--
2.16.4

48
patch/kernel/rockchip-dev/1020-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch Normal file
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@ -0,0 +1,48 @@
From d3d3fe433d9038dcd1a98f4d6711c0777ed06703 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 25 Jun 2018 17:08:32 +0200
Subject: [PATCH 26/26] ARM: DTSI: rk3288: Set the VPU MMU power domains
Without that, the auto-activation of the VPU hardware IOMMU fails
when enabling the hardware, before the "probe" phase of its device
driver.
Basically, when loading a "of_platform" device driver targeting
the VPU devices, you'll get these errors without this patch :
[12753.996950] rk_iommu ff9c0440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning
[12754.007483] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
[12754.026652] rk_iommu ff9c0440.iommu: Disable paging request timed out, status: 0xffffffff
[12754.045975] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
When using this patch, the errors disappear.
This seems to be due to the IOMMU device sharing the same power domain
than the device.
When loading an "of_platform" driver, the kernel logic seems to try
enabling the associated IOMMU device before letting the driver handles
anything with the actual VPU hardware.
It appears that setting the power domain of the VPU IOMMU nodes let the
IOMMU driver enable the IOMMU shared power domain, and make the IOMMU
device useable.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 45ec4e89..46e1b8e2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1262,6 +1263,7 @@
interrupt-names = "hevc_mmu";
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_HEVC>;
#iommu-cells = <0>;
status = "disabled";
};
--
2.16.4

46
patch/kernel/rockchip-dev/1023-dts-rk3288-support-for-dedicating-npll-to-a-vop.patch Normal file
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@ -0,0 +1,46 @@
From 4ab4f88649468dada5d609e1a6f8a71a7d5610c9 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 02:48:59 +0200
Subject: [PATCH 4/6] dts: rk3288: support for dedicating npll to a vop
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
The original description was :
Add the VOP DCLKs to the assigned clocks list so their
parents can be set in the dts include files for
devices that do dedicate npll to a vop.
https://www.spinics.net/lists/arm-kernel/msg673162.html
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d23c7fa55..ff04aab5e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -867,12 +867,14 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
- assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
+ <&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>, <&cru ACLK_CPU>,
<&cru HCLK_CPU>, <&cru PCLK_CPU>,
<&cru ACLK_PERI>, <&cru HCLK_PERI>,
<&cru PCLK_PERI>;
- assigned-clock-rates = <594000000>, <400000000>,
+ assigned-clock-rates = <0>, <0>,
+ <594000000>, <400000000>,
<500000000>, <300000000>,
<150000000>, <75000000>,
<300000000>, <150000000>,
--
2.16.4

32
patch/kernel/rockchip-dev/1024-arm-dts-veyron-Added-a-flag-to-disable-cache-flush-d.patch Normal file
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@ -0,0 +1,32 @@
From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Thu, 1 Nov 2018 21:31:26 +0100
Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
during reset
Flushing the MMC cache of ASUS Chromebooks during initialization or
"recovery" generates 10 minutes hangup, according to @SolidHal.
This is an adaptation of @SolidHal, in order to pinpoint the fix to
Veyron Chromebooks, and avoiding issues other RK3288 boards.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2075120cf..fa4951fd7 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -123,6 +123,7 @@
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
+ no-recovery-cache-flush;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
};
--
2.16.4

50
patch/kernel/rockchip-dev/2002-clk-rockchip-add-all-known-operating-points-to-the-a.patch Normal file
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@ -0,0 +1,50 @@
From e0c5a419cf5464cd02996431afa98e3b22dc6801 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 23:14:48 +0000
Subject: [PATCH] clk: rockchip: add all known operating points to the allowed
CPU freqs
Patch from Willy Tarreau
Original commit message :
At least 1920 MHz runs stable on the MiQi even on openssl speed -multi 4,
which is by far the most intensive workload, and 1992/2016 work fine on
the CS-008 until it starts to heat too much. So add all of them so that
the device tree can simply manipulate them.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 753c649..fd2058f 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -145,6 +145,23 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
}
static struct rockchip_cpuclk_rate_table rk3288_cpuclk_rates[] __initdata = {
+ RK3288_CPUCLK_RATE(2208000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2184000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2160000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2136000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2112000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2088000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2064000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2040000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2016000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1992000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1968000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1944000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1920000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1896000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1872000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1848000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1824000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1800000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1704000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1608000000, 1, 3, 1, 3, 3),
--
2.10.2

116
patch/kernel/rockchip-dev/2005-drivers-mmc-dw-mci-rockchip-Handle-ASUS-Tinkerboard.patch Normal file
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@ -0,0 +1,116 @@
From 302cd9b8a9f1f8a7735fabea3b9a7645dc40f9cc Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 7 Jan 2018 01:52:44 +0100
Subject: [PATCH] drivers: mmc: dw-mci-rockchip: Handle ASUS Tinkerboard reboot
On ASUS Tinkerboard systems, if the SDMMC hardware is shutdown before
rebooting, the system will be dead, as the SDMMC is the only way to
boot anything, and the hardware doesn't power up the SDMMC hardware
automatically when rebooting.
So, when using an ASUS Tinkerboard system, a new reboot handler is
installed. This reboot handler takes care of powering the SDMMC
hardware again before restarting the system, resolving the issue.
The code was inspired by the pwrseq_emmc.c, which seems to overcome
similar effects with eMMC hardware.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/mmc/host/dw_mmc-rockchip.c | 66 ++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index a3f1c2b30..7eac1f221 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -16,6 +16,11 @@
#include <linux/pm_runtime.h>
#include <linux/slab.h>
+#include <linux/regulator/consumer.h>
+#include <linux/reboot.h>
+#include <linux/delay.h>
+#include "../core/core.h"
+
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
@@ -334,6 +339,66 @@ static const struct of_device_id dw_mci_rockchip_match[] = {
};
MODULE_DEVICE_TABLE(of, dw_mci_rockchip_match);
+struct dw_mci_rockchip_broken_boards_data {
+ struct notifier_block reset_nb;
+ struct platform_device *pdev;
+};
+
+/* This reboot handler handles cases where disabling the SDMMC on
+ * reboot will cause the hardware to be unable to start correctly
+ * after rebooting.
+ *
+ * This happens with Tinkerboard systems...
+ */
+static int dw_mci_rockchip_broken_boards_reset_nb(
+ struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ struct dw_mci_rockchip_broken_boards_data const *data =
+ container_of(this,
+ struct dw_mci_rockchip_broken_boards_data,
+ reset_nb);
+ struct dw_mci *host = platform_get_drvdata(data->pdev);
+ struct mmc_host *mmc = host->slot->mmc;
+
+ printk(KERN_ERR "Meow.\n");
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+
+ printk(KERN_ERR "woeM.\n");
+
+ return NOTIFY_DONE;
+}
+
+static void dw_mci_rockchip_register_broken_boards_reboot_handler(
+ struct platform_device *pdev)
+{
+ struct dw_mci_rockchip_broken_boards_data *data;
+
+ if (!of_machine_is_compatible("asus,rk3288-tinker"))
+ return;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+
+ if (!data)
+ return;
+
+ data->reset_nb.notifier_call =
+ dw_mci_rockchip_broken_boards_reset_nb;
+ data->reset_nb.priority = 255;
+ register_restart_handler(&data->reset_nb);
+
+ data->pdev = pdev;
+}
+
static int dw_mci_rockchip_probe(struct platform_device *pdev)
{
const struct dw_mci_drv_data *drv_data;
@@ -361,6 +426,7 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
}
pm_runtime_put_autosuspend(&pdev->dev);
+ dw_mci_rockchip_register_broken_boards_reboot_handler(pdev);
return 0;
}
--
2.14.1

74
patch/kernel/rockchip-dev/2006-soc-rockchip-power-domain-export-idle-request.patch Normal file
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@ -0,0 +1,74 @@
From e7b60b10cf3fd2f4374ab26c314383121c27fe82 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Tue, 22 Jan 2019 21:24:37 +0100
Subject: [PATCH] soc: rockchip: power-domain: export idle request for RKMPP
This function, and the added header, are required by the RKMPP driver,
provided by Randy Li. However, I can't attest that the provided code
is correct.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
include/soc/rockchip/pm_domains.h | 15 +++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 include/soc/rockchip/pm_domains.h
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 847c7c482..3e2e252cb 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -199,6 +199,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
return 0;
}
+int rockchip_pmu_idle_request(struct device *dev, bool idle)
+{
+ struct generic_pm_domain *genpd;
+ struct rockchip_pm_domain *pd;
+ int ret;
+
+ if (IS_ERR_OR_NULL(dev))
+ return -EINVAL;
+
+ if (IS_ERR_OR_NULL(dev->pm_domain))
+ return -EINVAL;
+
+ genpd = pd_to_genpd(dev->pm_domain);
+ pd = to_rockchip_pd(genpd);
+
+ mutex_lock(&pd->pmu->mutex);
+ ret = rockchip_pmu_set_idle_request(pd, idle);
+ mutex_unlock(&pd->pmu->mutex);
+
+ return ret;
+}
+EXPORT_SYMBOL(rockchip_pmu_idle_request);
+
static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
{
int i;
diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
new file mode 100644
index 000000000..720b3314e
--- /dev/null
+++ b/include/soc/rockchip/pm_domains.h
@@ -0,0 +1,15 @@
+/*
+ * pm_domain.h - Definitions and headers related to device power domains.
+ *
+ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
+ *
+ * This file is released under the GPLv2.
+ */
+
+#ifndef _LINUX_ROCKCHIP_PM_H
+#define _LINUX_ROCKCHIP_PM_H
+#include <linux/device.h>
+
+int rockchip_pmu_idle_request(struct device *dev, bool idle);
+
+#endif /* _LINUX_ROCKCHIP_PM_H */
--
2.16.4

101
patch/kernel/rockchip-dev/2007-drivers-wifi-ath9k-reverse-do-not-use-bulk-on-EP3-and-EP4.patch Normal file
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@ -0,0 +1,101 @@
FROM: Solidhal <hal@halemmerich.com>
This patch reverses commit 2b721118b7821107757eb1d37af4b60e877b27e7, as can bee seen here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2b721118b7821107757eb1d37af4b60e877b27e7
This commit caused issues on veyron speedy with ath9k and dwc2 drivers. Any ath9k device (ar9271)
would intermittently work, most of the time ending in errors as can bee seen here:
https://github.com/SolidHal/PrawnOS/issues/38
This commit fixes that issue.
This is only a temporary work around while a permenant fix is found, as this commit seems to only cause issues
with dwc2
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
--- b/drivers/net/wireless/ath/ath9k/hif_usb.c
+++ a/drivers/net/wireless/ath/ath9k/hif_usb.c
@@ -115,10 +115,10 @@
cmd->skb = skb;
cmd->hif_dev = hif_dev;
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_sndbulkpipe(hif_dev->udev, USB_REG_OUT_PIPE),
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_sndintpipe(hif_dev->udev, USB_REG_OUT_PIPE),
skb->data, skb->len,
+ hif_usb_regout_cb, cmd);
- hif_usb_regout_cb, cmd, 1);
usb_anchor_urb(urb, &hif_dev->regout_submitted);
ret = usb_submit_urb(urb, GFP_KERNEL);
@@ -723,11 +723,11 @@
return;
}
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_rcvbulkpipe(hif_dev->udev,
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_rcvintpipe(hif_dev->udev,
USB_REG_IN_PIPE),
nskb->data, MAX_REG_IN_BUF_SIZE,
+ ath9k_hif_usb_reg_in_cb, nskb);
- ath9k_hif_usb_reg_in_cb, nskb, 1);
}
resubmit:
@@ -909,11 +909,11 @@
goto err_skb;
}
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_rcvbulkpipe(hif_dev->udev,
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_rcvintpipe(hif_dev->udev,
USB_REG_IN_PIPE),
skb->data, MAX_REG_IN_BUF_SIZE,
+ ath9k_hif_usb_reg_in_cb, skb);
- ath9k_hif_usb_reg_in_cb, skb, 1);
/* Anchor URB */
usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
@@ -1031,7 +1031,9 @@
static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
{
+ struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
+ struct usb_endpoint_descriptor *endp;
+ int ret, idx;
- int ret;
ret = ath9k_hif_usb_download_fw(hif_dev);
if (ret) {
@@ -1041,6 +1043,20 @@
return ret;
}
+ /* On downloading the firmware to the target, the USB descriptor of EP4
+ * is 'patched' to change the type of the endpoint to Bulk. This will
+ * bring down CPU usage during the scan period.
+ */
+ for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) {
+ endp = &alt->endpoint[idx].desc;
+ if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+ == USB_ENDPOINT_XFER_INT) {
+ endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK;
+ endp->bmAttributes |= USB_ENDPOINT_XFER_BULK;
+ endp->bInterval = 0;
+ }
+ }
+
/* Alloc URBs */
ret = ath9k_hif_usb_alloc_urbs(hif_dev);
if (ret) {
@@ -1252,7 +1268,7 @@
if (!buf)
return;
+ ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE),
- ret = usb_interrupt_msg(udev, usb_sndintpipe(udev, USB_REG_OUT_PIPE),
buf, 4, NULL, USB_MSG_TIMEOUT);
if (ret)
dev_err(&udev->dev, "ath9k_htc: USB reboot failed\n");

178
patch/kernel/rockchip-dev/2008-clk-rockchip-rk3288-Support-for-dedicating-NPLL-to-a.patch Normal file
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@ -0,0 +1,178 @@
From e03d074b8ec00718337e7373e991912f6b6f9a52 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 19:53:43 +0100
Subject: [PATCH] clk: rockchip: rk3288: Support for dedicating NPLL to a VOP
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
I'm not really sure what this does exactly. It basically sets the
parent clock of the newly added clocks, if the newly added property
"rockchip,npll-for-vop" is detected and set.
I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
so I cannot comment on what it's doing and if it's a good idea in
general.
Now, I still have to test if that patch does anything useful on
RK3288 boards. If it doesn't, I might just throw it away on next
versions.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 68 ++++++++++++++++++++++++++++++++-------
drivers/clk/rockchip/clk.h | 3 ++
2 files changed, 59 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 13b38cb89..0d8b99b6b 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -215,10 +215,13 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu" };
PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
-PNAME(mux_pll_src_npll_cpll_gpll_p) = { "npll", "cpll", "gpll" };
-PNAME(mux_pll_src_cpll_gpll_npll_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_npll_cpll_gpll_p) = { "npll", "cpll", "gpll" };
+
+PNAME_ED(mux_pll_src_cgn_pll_nonvop_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
PNAME(mux_pll_src_cpll_gpll_usb480m_p) = { "cpll", "gpll", "unstable:usbphy480m_src" };
-PNAME(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "unstable:usbphy480m_src", "npll" };
+PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
PNAME(mux_mmc_src_p) = { "cpll", "gpll", "xin24m", "xin24m" };
PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
@@ -464,24 +467,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(3), 4, GFLAGS),
- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cgn_pll_vop0_p, 0,
RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
RK3288_CLKGATE_CON(3), 1, GFLAGS),
- COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cgn_pll_vop1_p, 0,
RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
RK3288_CLKGATE_CON(3), 3, GFLAGS),
COMPOSITE_NODIV(SCLK_EDP_24M, "sclk_edp_24m", mux_edp_24m_p, 0,
RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
RK3288_CLKGATE_CON(3), 12, GFLAGS),
- COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 13, GFLAGS),
- COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 14, GFLAGS),
- COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 15, GFLAGS),
@@ -490,16 +493,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
RK3288_CLKGATE_CON(5), 11, GFLAGS),
- COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 13, GFLAGS),
DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
- COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 14, GFLAGS),
- COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 15, GFLAGS),
@@ -573,7 +576,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 11, GFLAGS),
- COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(0, "sclk_tsp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 10, GFLAGS),
@@ -933,5 +936,6 @@ static void __init rk3288_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
+ s32 npll_vop = -1;
rk3288_cru_base = of_iomap(np, 0);
if (!rk3288_cru_base) {
@@ -940,6 +944,46 @@ static void __init rk3288_clk_init(struct device_node *np)
return;
}
+ if (!of_property_read_s32(np, "rockchip,npll-for-vop", &npll_vop)) {
+ if ((npll_vop < -1) || (npll_vop > 1)) {
+ pr_warn("%s: invalid VOP to dedicate NPLL to: %d\n",
+ __func__, npll_vop);
+ } else if (npll_vop >= 0) {
+ unsigned int vop_clk_id;
+ const char ** npll_names;
+ const char ** non_npll_names;
+ int i;
+
+ /* Firstly, not-VOP needs to not use npll */
+ mux_pll_src_npll_cpll_gpll_p[0] = "dummy_npll";
+ mux_pll_src_cgn_pll_nonvop_p[2] = "dummy_npll";
+ mux_pll_src_cpll_gll_usb_npll_p[3] = "dummy_npll";
+
+ /* Then the npll VOP needs to only use npll, and the other one not use npll. */
+ if (npll_vop) {
+ vop_clk_id = DCLK_VOP1;
+ npll_names = mux_pll_src_cgn_pll_vop1_p;
+ non_npll_names = mux_pll_src_cgn_pll_vop0_p;
+ } else {
+ vop_clk_id = DCLK_VOP0;
+ npll_names = mux_pll_src_cgn_pll_vop0_p;
+ non_npll_names = mux_pll_src_cgn_pll_vop1_p;
+ }
+ npll_names[0] = "dummy_cpll";
+ npll_names[1] = "dummy_gpll";
+ non_npll_names[2] = "dummy_npll";
+
+ /* Lastly the npll-dedicated-VOP needs to be able to control npll. */
+ for (i = 0; i < ARRAY_SIZE(rk3288_clk_branches); i++) {
+ if (rk3288_clk_branches[i].id == vop_clk_id) {
+ rk3288_clk_branches[i].flags |= CLK_SET_RATE_PARENT;
+ break;
+ }
+ }
+ pr_debug("%s: npll dedicated for VOP %d\n", __func__, npll_vop);
+ }
+ }
+
ctx = rockchip_clk_init(np, rk3288_cru_base, CLK_NR_CLKS);
if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__);
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 6b53fff4c..dbda9d281 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -382,6 +382,9 @@ struct clk *rockchip_clk_register_muxgrf(const char *name,
#define PNAME(x) static const char *const x[] __initconst
+/* For when you want to be able to modify the pointers. */
+#define PNAME_ED(x) static const char * x[] __initdata
+
enum rockchip_clk_branch_type {
branch_composite,
branch_mux,
--
2.16.4

434
patch/kernel/rockchip-dev/2009-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch Normal file
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@ -0,0 +1,434 @@
From 6c86916e81fa18394d9b57b4af44f9948e100e96 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 03:02:10 +0200
Subject: [PATCH 6/6] drm: dw_hdmi-rockchip: better clock selection logic and
dts-based rate list
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
The original description was :
This contains traces of the following commits from the ChromeOS 3.14
tree, which improve RF/EMI performance and detach the clock selection
logic from the HDMI PHY configurations, plus support for configuring
the allowed clock rates via device tree as they are dependent on
PLL configuration and maybe even the PCB layout and other hardware things,
eg. interference to wifi or such (EMI).
Rates that were allowed previous to this patch are added as the fallback
list if no dts configuration exists.
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Adjust rockchip_mpll_cfg for 146.25
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: expand the informal mpll config
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: add slop to more tables
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: redo rockchip hdmi to allow slop
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Use auto-generated tables
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Fixup the clock to be what we expect
CHROMIUM: drm/rockchip: hdmi: adjust cklvl & txlvl for RF/EMI
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Set cur_ctr to 0 always
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Decrease slop
https://www.spinics.net/lists/arm-kernel/msg673163.html
This is the patch that takes into account the new property
"rockchip,hdmi-rates-hz" that allows the definition of the HDMI
frequencies in the DTS file.
This also change a lot of HDMI frequencies definition, so that
*will* require some extensive testing.
Still, if it works fine, this should make tinkering the HDMI
frequencies easier, in case you have a very special HDMI screen.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index cdc304d4c..91c7dc07b 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -73,122 +73,141 @@ struct rockchip_hdmi {
struct clk *grf_clk;
struct dw_hdmi *hdmi;
struct phy *phy;
+ u32* rates;
+ u32 rates_cnt;
};
+#define CLK_SLOP(clk) ((clk) / 1000)
+#define CLK_PLUS_SLOP(clk) ((clk) + CLK_SLOP(clk))
+
#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x)
+/* These were the rates allowed by the driver before rates list in device tree,
+ * so keep them around as a fallback */
+static const u32 dw_hdmi_fallback_rates[] = {
+ 27000000,
+ 36000000,
+ 40000000,
+ 54000000,
+ 65000000,
+ 66000000,
+ 74250000,
+ 83500000,
+ 106500000,
+ 108000000,
+ 146250000,
+ 148500000
+};
+
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
{
- 27000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ 30666000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40f3, 0x0000 },
+ },
+ }, {
+ 36800000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 36000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ }, {
+ 46000000, {
+ { 0x00b3, 0x0000 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 40000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ }, {
+ 61333000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 54000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
+ }, {
+ 73600000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x4061, 0x0002 },
},
- }, {
- 65000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
+ }, {
+ 92000000, {
+ { 0x0072, 0x0001 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
},
- }, {
- 66000000, {
- { 0x013e, 0x0003},
- { 0x217e, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 122666000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
},
- }, {
- 74250000, {
- { 0x0072, 0x0001},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 147200000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4064, 0x0003 },
},
- }, {
- 83500000, {
- { 0x0072, 0x0001},
+ }, {
+ 184000000, {
+ { 0x0051, 0x0002 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
},
- }, {
- 108000000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 226666000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
},
- }, {
- 106500000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 272000000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
- 146250000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 340000000, {
+ { 0x0040, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
- 148500000, {
- { 0x0051, 0x0003},
- { 0x214c, 0x0003},
- { 0x4064, 0x0003}
+ }, {
+ 600000000, {
+ { 0x1a40, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
+ }, {
~0UL, {
- { 0x00a0, 0x000a },
- { 0x2001, 0x000f },
- { 0x4002, 0x000f },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
},
}
};
static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
- /* pixelclk bpp8 bpp10 bpp12 */
+ /* pixelclk bpp8 bpp10 bpp12 */
{
- 40000000, { 0x0018, 0x0018, 0x0018 },
- }, {
- 65000000, { 0x0028, 0x0028, 0x0028 },
- }, {
- 66000000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 74250000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 83500000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 146250000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 148500000, { 0x0000, 0x0038, 0x0038 },
- }, {
- ~0UL, { 0x0000, 0x0000, 0x0000},
- }
+ 600000000, { 0x0000, 0x0000, 0x0000 },
+ }, {
+ ~0UL, { 0x0000, 0x0000, 0x0000 },
+ },
};
static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
/*pixelclk symbol term vlev*/
- { 74250000, 0x8009, 0x0004, 0x0272},
- { 148500000, 0x802b, 0x0004, 0x028d},
- { 297000000, 0x8039, 0x0005, 0x028d},
- { ~0UL, 0x0000, 0x0000, 0x0000}
+ { CLK_PLUS_SLOP(74250000), 0x8009, 0x0004, 0x0272},
+ { CLK_PLUS_SLOP(165000000), 0x802b, 0x0004, 0x0209},
+ { CLK_PLUS_SLOP(297000000), 0x8039, 0x0005, 0x028d},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
{
struct device_node *np = hdmi->dev->of_node;
+ int rates_cnt;
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
if (IS_ERR(hdmi->regmap)) {
@@ -216,26 +235,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
return PTR_ERR(hdmi->grf_clk);
}
+ if ((rates_cnt = of_property_count_u32_elems(np, "rockchip,hdmi-rates-hz")) > 0) {
+ int rv;
+ u32 *rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
+ if (!rates)
+ return -ENOMEM;
+ rv = of_property_read_u32_array(np, "rockchip,hdmi-rates-hz", rates, rates_cnt);
+ if (rv)
+ return rv;
+ hdmi->rates = rates;
+ hdmi->rates_cnt = rates_cnt;
+ } else {
+ rates_cnt = ARRAY_SIZE(dw_hdmi_fallback_rates);
+ hdmi->rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
+ if (!hdmi->rates)
+ return -ENOMEM;
+ memcpy(hdmi->rates, dw_hdmi_fallback_rates, rates_cnt * sizeof(u32));
+ hdmi->rates_cnt = rates_cnt;
+ }
+
+
return 0;
}
static enum drm_mode_status
-dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
+dw_hdmi_rockchip_encoder_mode_valid(struct drm_encoder *encoder,
const struct drm_display_mode *mode)
{
- const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
+ struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
int pclk = mode->clock * 1000;
- bool valid = false;
+ int num_rates = hdmi->rates_cnt;
int i;
- for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
- if (pclk == mpll_cfg[i].mpixelclock) {
- valid = true;
- break;
- }
+ /*
+ * Pixel clocks we support are always < 2GHz and so fit in an
+ * int. We should make sure source rate does too so we don't get
+ * overflow when we multiply by 1000.
+ */
+ if (mode->clock > INT_MAX / 1000)
+ return MODE_BAD;
+
+ for (i = 0; i < num_rates; i++) {
+ int slop = CLK_SLOP(pclk);
+
+ if ((pclk >= hdmi->rates[i] - slop) &&
+ (pclk <= hdmi->rates[i] + slop))
+ return MODE_OK;
}
- return (valid) ? MODE_OK : MODE_BAD;
+ return MODE_BAD;
}
static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
@@ -251,7 +299,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
- return true;
+ struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
+ int pclk = adj_mode->clock * 1000;
+ int best_diff = INT_MAX;
+ int best_clock = 0;
+ int slop;
+ int i;
+
+ /* Pick the best clock */
+ for (i = 0; i < hdmi->rates_cnt; i++) {
+ int diff = hdmi->rates[i] - pclk;
+
+ if (diff < 0)
+ diff = -diff;
+ if (diff < best_diff) {
+ best_diff = diff;
+ best_clock = hdmi->rates[i];
+
+ /* Bail early if we're exact */
+ if (best_diff == 0)
+ return true;
+ }
+ }
+
+ /* Double check that it's OK */
+ slop = CLK_SLOP(pclk);
+ if ((pclk >= best_clock - slop) && (pclk <= best_clock + slop)) {
+ adj_mode->clock = DIV_ROUND_UP(best_clock, 1000);
+ return true;
+ }
+
+ /* Shoudn't be here; we should have said rate wasn't valid */
+ dev_warn(hdmi->dev, "tried to set invalid rate %d\n", adj_mode->clock);
+ return false;
}
static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
@@ -307,6 +387,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
}
static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
+ .mode_valid = dw_hdmi_rockchip_encoder_mode_valid,
.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
.mode_set = dw_hdmi_rockchip_encoder_mode_set,
.enable = dw_hdmi_rockchip_encoder_enable,
@@ -406,7 +487,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = {
};
static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -423,7 +503,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
};
static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -443,7 +522,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = {
};
static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -460,7 +538,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
};
static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -558,6 +635,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
*/
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
+ devm_kfree(hdmi->dev, hdmi->rates);
drm_encoder_cleanup(encoder);
clk_disable_unprepare(hdmi->vpll_clk);
}
@@ -570,6 +648,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
{
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
+ devm_kfree(hdmi->dev, hdmi->rates);
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->vpll_clk);
}

22
patch/kernel/rockchip-dev/2013-spi-Added-support-for-Tinkerboard-s-SPI-interface.patch Normal file
View File

@ -0,0 +1,22 @@
From d4d128324b8f8a9f5c441203d94703e41fa07df3 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 19:57:56 +0100
Subject: [PATCH] spi: Added support for Tinkerboard's SPI interface
Imported from ARMbian
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 255786f2e..3a3f2e6fd 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -665,6 +665,7 @@ static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "lwn,bk4" },
{ .compatible = "dh,dhcom-board" },
{ .compatible = "menlo,m53cpld" },
+ { .compatible = "rockchip,spi_tinker" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);

395
patch/kernel/rockchip-dev/261_gpiomem_driver.patch Normal file
View File

@ -0,0 +1,395 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index e5b7ef1a5..f88c913ff 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -544,3 +544,6 @@
&wdt {
status = "okay";
};
+&gpiomem {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index f3ca55496..14bbcb192 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1418,6 +1418,12 @@
interrupts = <GIC_PPI 9 0xf04>;
};
+ gpiomem: rk3288-gpiomem@ff750000 {
+ compatible = "rockchip,rk3288-gpiomem";
+ reg = <0x0 0xff750000 0x0 0x1000>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 3143db5..9c18b74 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -5,6 +5,7 @@
menu "Character devices"
source "drivers/tty/Kconfig"
+source "drivers/char/rockchip/Kconfig"
config DEVMEM
bool "/dev/mem virtual device support"
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index d8a7579..290cb32 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -51,6 +51,8 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o
obj-$(CONFIG_JS_RTC) += js-rtc.o
js-rtc-y = rtc.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
obj-$(CONFIG_ADI) += adi.o
diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
new file mode 100644
index 0000000..6e97486
--- /dev/null
+++ b/drivers/char/rockchip/Kconfig
@@ -0,0 +1,16 @@
+#
+# Broadcom char driver config
+#
+
+menuconfig RK_CHAR_DRIVERS
+ bool "Rockchip Char Drivers"
+ help
+ Rockchip's char drivers
+
+config RK3288_DEVGPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
+ default y
+ help
+ Provides users with root-free access to the GPIO registers
+ on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
+ register page to the user's pointer.
\ No newline at end of file
diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
new file mode 100644
index 0000000..2287ec2
--- /dev/null
+++ b/drivers/char/rockchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
\ No newline at end of file
diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
new file mode 100644
index 0000000..984471c
--- /dev/null
+++ b/drivers/char/rockchip/rk3288-gpiomem.c
@@ -0,0 +1,303 @@
+/**
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the rk3288's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+
+#define DEVICE_NAME "rk3288-gpiomem"
+#define DRIVER_NAME "gpiomem-rk3288"
+#define DEVICE_MINOR 0
+
+struct rk3288_gpiomem_instance {
+ unsigned long gpio_regs_phys;
+ struct device *dev;
+};
+
+static struct cdev rk3288_gpiomem_cdev;
+static dev_t rk3288_gpiomem_devid;
+static struct class *rk3288_gpiomem_class;
+static struct device *rk3288_gpiomem_dev;
+static struct rk3288_gpiomem_instance *inst;
+
+
+/****************************************************************************
+*
+* GPIO mem chardev file ops
+*
+***************************************************************************/
+
+static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+static int address_is_allowed(unsigned long pfn, unsigned long size)
+{
+ unsigned long address = pfn << PAGE_SHIFT;
+
+ dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
+
+ switch(address) {
+
+ case 0xff750000:
+ case 0xff760000:
+ case 0xff780000:
+ case 0xff790000:
+ case 0xff7a0000:
+ case 0xff7b0000:
+ case 0xff7c0000:
+ case 0xff7d0000:
+ case 0xff7e0000:
+ case 0xff7f0000:
+ case 0xff7f2000:
+ case 0xff770000:
+ case 0xff730000:
+ case 0xff680000:
+ dev_info(inst->dev, "address_is_allowed.return 1");
+ return 1;
+ break;
+ default :
+ dev_info(inst->dev, "address_is_allowed.return 0");
+ return 0;
+ }
+}
+
+static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+
+ size_t size;
+
+ size = vma->vm_end - vma->vm_start;
+
+
+ if (!address_is_allowed(vma->vm_pgoff, size))
+ return -EPERM;
+
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
+ size,
+ vma->vm_page_prot);
+
+ vma->vm_ops = &rk3288_gpiomem_vm_ops;
+
+ /* Remap-pfn-range will mark the range VM_IO */
+ if (remap_pfn_range(vma,
+ vma->vm_start,
+ vma->vm_pgoff,
+ size,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static const struct file_operations
+rk3288_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = rk3288_gpiomem_open,
+ .release = rk3288_gpiomem_release,
+ .mmap = rk3288_gpiomem_mmap,
+};
+
+static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ add_uevent_var(env, "DEVMODE=%#o", 0666);
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Probe and remove functions
+*
+***************************************************************************/
+
+
+static int rk3288_gpiomem_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct resource *ioresource;
+
+ /* Allocate buffers and instance data */
+
+ inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (ioresource) {
+ inst->gpio_regs_phys = ioresource->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&rk3288_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
+ rk3288_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
+ ptr_err = rk3288_gpiomem_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+ rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
+ rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
+ rk3288_gpiomem_devid, NULL,
+ "gpiomem");
+ ptr_err = rk3288_gpiomem_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys);
+
+ return 0;
+
+failed_device_create:
+ class_destroy(rk3288_gpiomem_class);
+failed_class_create:
+ cdev_del(&rk3288_gpiomem_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load rk3288_gpiomem");
+ return err;
+}
+
+static int rk3288_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
+ class_destroy(rk3288_gpiomem_class);
+ cdev_del(&rk3288_gpiomem_cdev);
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id rk3288_gpiomem_of_match[] = {
+ {.compatible = "rockchip,rk3288-gpiomem",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
+
+static struct platform_driver rk3288_gpiomem_driver = {
+ .probe = rk3288_gpiomem_probe,
+ .remove = rk3288_gpiomem_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = rk3288_gpiomem_of_match,
+ },
+};
+
+module_platform_driver(rk3288_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-rk3288");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
\ No newline at end of file

32
patch/kernel/rockchip-dev/3000_DTS_rearrange_thermal_zones.patch Normal file
View File

@ -0,0 +1,32 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index bc3601a..37ae378 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -467,13 +467,6 @@
};
thermal-zones {
- reserve_thermal: reserve_thermal {
- polling-delay-passive = <1000>; /* milliseconds */
- polling-delay = <5000>; /* milliseconds */
-
- thermal-sensors = <&tsadc 0>;
- };
-
cpu_thermal: cpu_thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -539,6 +532,13 @@
};
};
};
+
+ reserve_thermal: reserve_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ thermal-sensors = <&tsadc 0>;
+ };
};
tsadc: tsadc@ff280000 {

19
patch/kernel/rockchip-dev/3001_Tinkerboard-4.19-audio.patch Normal file
View File

@ -0,0 +1,19 @@
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 2bfe4e80a..cea93aaf5 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -382,6 +382,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

80
patch/kernel/rockchip-dev/RK3288-1.8GHz-and-boost.patch Normal file
View File

@ -0,0 +1,80 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 58bd91539..9c0dac199 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -153,6 +153,75 @@
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
};
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2088000000 {
+ opp-hz = /bits/ 64 <2088000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2112000000 {
+ opp-hz = /bits/ 64 <2112000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2136000000 {
+ opp-hz = /bits/ 64 <2136000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2160000000 {
+ opp-hz = /bits/ 64 <2160000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2184000000 {
+ opp-hz = /bits/ 64 <2184000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2208000000 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
};
amba {

25
patch/kernel/rockchip-dev/board-tinkerboard-enable-emmc-support.patch Normal file
View File

@ -0,0 +1,25 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index f88c913ff..7f04ccbdf 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -547,3 +547,20 @@
&gpiomem {
status = "okay";
};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec_c0>;
+};

23
patch/kernel/rockchip-dev/brcmfmac-add-ap6330-firmware.patch Normal file
View File

@ -0,0 +1,23 @@
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
index a907d7b06..ec71996c7 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
@@ -619,13 +619,17 @@ BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
+/* AMPAK */
+BRCMF_FW_DEF(AP6330, "brcmfmac-ap6330-sdio");
+
static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
- BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFEF, 4330),
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0x10, AP6330),
BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),

13
patch/kernel/rockchip-dev/general-adjust-tinker-dts-hdmi-sound.patch Normal file
View File

@ -0,0 +1,13 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 01be2bca9..5439e29e0 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -64,7 +64,7 @@
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
- simple-audio-card,name = "rockchip,tinker-codec";
+ simple-audio-card,name = "DW-I2S-HDMI";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,codec {

19
patch/kernel/rockchip-dev/general-fix-reboot-from-kwiboo.patch Normal file
View File

@ -0,0 +1,19 @@
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 5bd58b95d..48ebe081f 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1684,6 +1684,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
+ mmc_set_initial_signal_voltage(host);
+
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ mmc_delay(host->ios.power_delay_ms);
+
mmc_pwrseq_power_off(host);
host->ios.clock = 0;

22
patch/kernel/rockchip-dev/remove-broken-dtb.patch Normal file
View File

@ -0,0 +1,22 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a98dee2ae..d3cef7033 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -916,17 +916,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
- rk3288-veyron-brain.dtb \
- rk3288-veyron-fievel.dtb \
- rk3288-veyron-jaq.dtb \
- rk3288-veyron-jerry.dtb \
- rk3288-veyron-mickey.dtb \
- rk3288-veyron-mighty.dtb \
- rk3288-veyron-minnie.dtb \
- rk3288-veyron-pinky.dtb \
- rk3288-veyron-speedy.dtb \
- rk3288-veyron-tiger.dtb \
rk3288-vyasa.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

985
patch/kernel/rockchip-dev/xt-q8l-v10-add-device-tree.patch Normal file
View File

@ -0,0 +1,985 @@
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts 2019-08-03 13:55:48.719992666 +0000
@@ -0,0 +1,982 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "XT-Q8L-V10-RK3288";
+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
+
+ memory {
+ reg = <0x0 0x0 0x0 0x80000000>;
+ device_type = "memory";
+ };
+
+ /*
+ * Peripheral from original q8 device tree, currently no references
+ * for drivers in linux kernel.
+ rockchip-hsadc@ff080000 {
+ compatible = "rockchip-hsadc";
+ reg = <0xff080000 0x4000>;
+ interrupts = <0x0 0x1f 0x4>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x9a>;
+ clocks = <0x79 0x7 0x8 0x39>;
+ clock-names = "hclk_hsadc", "clk_hsadc_out", "clk_hsadc_ext";
+ dmas = <0x9b 0x0>;
+ dma-names = "data";
+ status = "disabled";
+ };
+ */
+
+ ext_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ };
+
+ /*
+ * Handle the IR receiver using the gpio-ir-receiver kernel module.
+ * This works flawlessy, the original xt-q8l-v10 remote uses a NEC
+ * protocol and the keymap rc-xt-q8l-v10 has to be compiled in the
+ * kernel for the remote to work as an input device
+ */
+ ir: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_int>;
+ linux,rc-map-name = "rc-xt-q8l-v10";
+ wakeup-source;
+ };
+
+ keys: gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ button@0 {
+ gpio-key,wakeup = <1>;
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ label = "GPIO Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ debounce-interval = <100>;
+ };
+
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ /*
+ Power led is active high, but we set it here active low
+ so while there is mass storage access it turns red and
+ when it is idle is blue
+ */
+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+ label = "power";
+ linux,default-trigger = "mmc0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&power_led>;
+ };
+
+ };
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwr>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_flash: flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_flash";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_host_5v: usb-host-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc_host_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vcc_sys>;
+ };
+
+
+ vcc_otg_5v: usb-otg-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc_otg_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vcc_sys>;
+ };
+
+ /*
+ * Required power sequence to properly enable the wireless/bluetooth
+ * module connected to sdio0
+ */
+ sdio0_pwrseq: sdio0_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>, <&bt_enable_h>;
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 29 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <100>;
+ };
+
+ /*
+ * Sound taken from tinkerboard device tree, adapted to q8.
+ */
+ soundcard-hdmi {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "DW-I2S-HDMI";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ };
+
+ soundcard-spdif {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+ simple-audio-card,dai-link@1 {
+
+ cpu {
+ sound-dai = <&spdif>;
+ };
+
+ codec {
+ sound-dai = <&spdif_out>;
+ };
+
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+};
+
+
+&io_domains {
+ status = "okay";
+
+ audio-supply = <&vcca_33>;
+ bb-supply = <&vcc_io>;
+ dvp-supply = <&vcc_18>;
+ flash0-supply = <&vcc_flash>;
+ flash1-supply = <&vcc_lan>;
+ gpio30-supply = <&vcc_io>;
+ gpio1830-supply = <&vcc_io>;
+ lcdc-supply = <&vcc_io>;
+ sdcard-supply = <&vccio_sd>;
+ wifi-supply = <&vcc_18>;
+};
+
+&cpu0 {
+ cpu0-supply = <&vdd_cpu>;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ clock_in_out = "input";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+ status = "ok";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c5>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ vdd_cpu: syr827@40 {
+ compatible = "silergy,syr827";
+ fcs,suspend-voltage-selector = <1>;
+ reg = <0x40>;
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: syr828@41 {
+ compatible = "silergy,syr828";
+ fcs,suspend-voltage-selector = <1>;
+ reg = <0x41>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int>;
+ };
+
+ act8846: act8846@5a {
+ compatible = "active-semi,act8846";
+ reg = <0x5a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_vsel>;
+ system-power-controller;
+
+ vp1-supply = <&vcc_sys>;
+ vp2-supply = <&vcc_sys>;
+ vp3-supply = <&vcc_sys>;
+ vp4-supply = <&vcc_sys>;
+ inl1-supply = <&vcc_sys>;
+ inl2-supply = <&vcc_sys>;
+ inl3-supply = <&vcc_20>;
+ wakeup-source;
+
+ regulators {
+
+ /*
+ * Regulator controlling DDR memory - always on
+ */
+ vcc_ddr: REG1 {
+ regulator-name = "vcc_ddr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * Regulator controlling various IO functions of the rk3288.
+ * Always on
+ */
+ vcc_io: REG2 {
+ regulator-name = "vcc_io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * Regulator controlling various board logic.
+ * Always on.
+ * rk3288 electrical datasheet says it should have variable
+ * voltage depending upon dvfs
+ */
+ vdd_log: REG3 {
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * No reference for this on electrical datasheet. Maybe this
+ * is vcc_18? Maybe this is vcc18_flash on electrical datasheet.
+ * So far we disable it.
+ */
+ vcc_20: REG4 {
+ regulator-name = "vcc_20";
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * This regulator controls SDIO. Electrical datasheet says
+ * this regulator can be operated between 1.8 and 3.3 volts
+ */
+ vccio_sd: REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ /*
+ * Controlling HDMI and LCD controller on rk3288. 1.0 volts
+ * by reference
+ */
+ vdd10_lcd: REG6 {
+ regulator-name = "vdd10_lcd";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * From the rk3288 electrical datasheet, this regulator powers
+ * the rk1000 chip, which is absent in our device, but it
+ * is also supplying bluetooth, so we enable it.
+ */
+ vcca_18: REG7 {
+ regulator-name = "vcca_18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /*
+ * This regulator controls, among other things, the SPDIF
+ * interface, so we enable it
+ */
+ vcca_33: REG8 {
+ regulator-name = "vcca_33";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on; // Turn this on to get SPDIF!
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /*
+ * LAN regulator
+ */
+ vcc_lan: REG9 {
+ regulator-name = "vcc_lan";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * Regulator controlling PMU, USB PHY and rk3288 PLLs.
+ * 1.0 volts by reference
+ */
+ vdd_10: REG10 {
+ regulator-name = "vdd_10";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * Regulator controlling Wifi over SDIO, SARADC and USB PHY.
+ * Better turn this on
+ */
+ vccio_wl: vcc_18: REG11 {
+ regulator-name = "vcc_18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /*
+ * Not clear: apparently this controls HDMI and LCD controller
+ * on rk3368 devices.
+ * 1.8 volts by reference
+ */
+ vcc18_lcd: REG12 {
+ regulator-name = "vcc18_lcd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+
+ /*
+ * Here should go the RK1000 audio codec parts, but seems that
+ * there is no driver in linux kernel at the moment, so we can't
+ * describe it.
+ * Also, most important, there is no RK1000 on our board :)
+ * Datasheet is available here:
+ * http://dl.radxa.com/rock/docs/hw/ds/RK1000-S%20DATASHEET%20V14.pdf
+ */
+ status = "okay";
+
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&pinctrl {
+
+ /*
+ These two lines here, these must be commented out! Otherwise for some reason the kernel
+ does not see the boot device anymore and will stay stuck in initramfs!
+ On the contrary, these are required by u-boot to keep the power holding so the device does not
+ automatically turns off after a small timeout
+ */
+ /*pinctrl-names = "default";*/
+ /*pinctrl-0 = <&pwr_hold>;*/
+
+ pcfg_output_high: pcfg-output-high {
+ output-high;
+ };
+
+ pcfg_output_low: pcfg-output-low {
+ output-low;
+ };
+
+ pcfg_wl: pcfg-wl {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ pcfg_wl_clk: pcfg-wl-clk {
+ bias-disable;
+ drive-strength = <12>;
+ };
+
+ pcfg_wl_int: pcfg-wl-int {
+ bias-pull-up;
+ };
+
+ act8846 {
+
+ /*
+ * Original q8 device tree says:
+ * - gpio0 11 HIGH -> power hold
+ * - gpio7 1 LOW -> possibly pmic-vsel, we don't care
+ */
+ pmic_vsel: pmic-vsel {
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ pwr_hold: pwr-hold {
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gmac {
+ phy_int: phy-int {
+ rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_pmeb: phy-pmeb {
+ rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_rst: phy-rst {
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+
+ hym8563 {
+ rtc_int: rtc-int {
+ rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ power_led: power-led {
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+
+ /*
+ * Copied from firefly board definition to give more drive to
+ * the sdmmc pins. The Q8 seems to be quite able to drive
+ * ultra high speed uSD cards, so we give a bit more energy
+ * to the gpio pins
+ */
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_8ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_pwr: sdmmc-pwr {
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+ usb_host1 {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+ usb_otg {
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio0 {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ };
+
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&saradc {
+ vref-supply = <&vcc_18>;
+ status = "okay";
+};
+
+&emmc {
+
+ /*
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
+ * vmmc-supply and vqmmc-supply are removed because they hang
+ * u-boot >= v2018.03
+ * From the original q8l firmware and eMMC datasheet it also should
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
+ * properties are not working
+ */
+ clock-frequency = <50000000>;
+
+ broken-cd;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+
+ status = "okay";
+};
+
+&sdmmc {
+ supports-sd;
+
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio6 RK_PC6 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <200>;
+ post-power-on-delay-ms = <50>;
+ supports-cqe;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+
+ status = "okay";
+};
+
+&sdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ mmc-pwrseq = <&sdio0_pwrseq>;
+
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc_18>; // This must be the same as in io_domains,
+ // otherwise the mmc1 device won't be detected properly
+
+// clock-frequency = <50000000>;
+// max-frequency = <50000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
+
+ cap-sdio-irq;
+ no-mmc;
+ no-sd;
+ cap-sd-highspeed; // required, otherwise does not work!
+ supports-sdio;
+ non-removable;
+
+ keep-power-in-suspend;
+ disable-wp;
+
+
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&gpio4>;
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ status = "okay";
+ };
+
+ //sd-uhs-sdr104; // required to be disabled, otherwise the device get
+ // detected, but there is no communication
+
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+/*
+ * These dmas described here for uarts are present in original q8 board
+ * dts, so I replicate them here because documentation says that serial
+ * ports can have dmas.
+ * note:
+ * - uart0 is the serial port connected to the bluetooth module
+ * - uart2 is the onboard serial port
+ *
+ * As ok kernel 4.19 DMA for serial ports is disabled because it makes
+ * the ports unusable
+ *
+ */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+ //dmas = <&dmac_peri 1 &dmac_peri 2>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart1 {
+ //dmas = <&dmac_peri 3 &dmac_peri 4>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart2 {
+ //dmas = <&dmac_bus_s 4 &dmac_bus_s 5>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart3 {
+ //dmas = <&dmac_peri 7 &dmac_peri 8>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart4 {
+ //dmas = <&dmac_peri 9 &dmac_peri 10>;
+ //dma-names = "tx", "rx";
+ status = "disabled";
+};
+
+/*
+ * Here usbphy* should have their proper reset lines described in rk3288.dtsi
+ * Describing resets for usb phy is important because otherwise the USB
+ * port gets stuck in case it goes into autosuspend: plugging any device
+ * when the port is autosuspended will actually kill the port itself and
+ * require a power cycle.
+ * This is required for the usbphy1 phy, nonetheless it is a good idea to
+ * specify the proper resources for all the phys though.
+ * The reference patch which works in conjuction with the reset lines:
+ * https://patchwork.kernel.org/patch/9469811/
+ *
+ */
+&usbphy {
+ status = "okay";
+};
+
+&usbphy0 {
+ vbus-supply = <&vcc_otg_5v>;
+};
+
+&usbphy2 {
+ vbus-supply = <&vcc_host_5v>;
+};
+
+&usb_host0_ehci {
+ dr_mode = "host";
+ reg = <0x0 0xff500000 0x0 0x20000>;
+ status = "disable";
+};
+
+&usb_host1 {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+/*
+ * Enable VPU services and complete the relative IOMMU configurations
+ */
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
+
+&vpu_mmu {
+ status = "okay";
+};
+
+//&vpu_service {
+// status = "okay";
+//};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+//&hevc_service {
+// status = "okay";
+//};
+
+&wdt {
+ status = "okay";
+};
+
+// i2s bus is present on q8 device, enable it
+&i2s {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+// spdif is present on q8 device, enable it
+&spdif {
+ status = "okay";
+};
+
+/*
+ * Redefine some thermals to give a bit more headroom (+5°C)
+ */
+&cpu_alert0 {
+ temperature = <75000>;
+};
+
+&cpu_alert1 {
+ temperature = <80000>;
+};
+
+&gpu_alert0 {
+ temperature = <75000>;
+};
+
+/*
+ * Retouch the operating points for higher frequencies to reduce
+ * the voltage required
+ */
+&cpu_opp_table {
+ opp-1512000000 {
+ opp-microvolt = <1250000>;
+ };
+
+ opp-1608000000 {
+ opp-microvolt = <1300000>;
+ };
+};
+
+&gpiomem {
+ status = "okay";
+};

13
patch/kernel/rockchip-dev/xt-q8l-v10-add-dts-makefile.patch Normal file
View File

@ -0,0 +1,13 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de760..6bcfceede 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -832,6 +832,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
rk3229-evb.dtb \
+ rk3288-xt-q8l-v10.dtb \
rk3229-xms6.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \

103
patch/kernel/rockchip-dev/xt-q8l-v10-remote-keymap.patch Normal file
View File

@ -0,0 +1,103 @@
diff --git a/drivers/media/rc/keymaps/rc-xt-q8l-v10.c b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
index e69de29..19c7d9e 100644
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+// rc-xt-q8l-v10.c - Keytable for xt-q8l-v10 tv box remote controller
+//
+// keymap imported from ir-keymaps.c
+//
+// Copyright (c) 2018 Paolo Sabatino
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+/*
+
+*/
+
+static struct rc_map_table xt_q8l_v10[] = {
+
+ { 0xcc1d11, KEY_ENTER },
+ { 0xcc1d00, KEY_POWER },
+ { 0xcc1d15, KEY_PLAYPAUSE },
+ { 0xcc1d16, KEY_STOP },
+ { 0xcc1d06, KEY_PREVIOUSSONG },
+ { 0xcc1d0a, KEY_NEXTSONG },
+ { 0xcc1d41, KEY_1 },
+ { 0xcc1d45, KEY_2 },
+ { 0xcc1d4d, KEY_3 },
+ { 0xcc1d42, KEY_4 },
+ { 0xcc1d46, KEY_5 },
+ { 0xcc1d4e, KEY_6 },
+ { 0xcc1d43, KEY_7 },
+ { 0xcc1d47, KEY_8 },
+ { 0xcc1d4f, KEY_9 },
+ { 0xcc1d49, KEY_0 },
+ { 0xcc1d4a, KEY_BACKSPACE },
+ { 0xcc1d48, KEY_F6 },
+ { 0xcc1d03, KEY_HOME },
+ { 0xcc1d0f, KEY_BACK },
+ { 0xcc1d40, KEY_MENU },
+ { 0xcc1d4c, KEY_TEXT },
+ { 0xcc1d10, KEY_LEFT },
+ { 0xcc1d12, KEY_RIGHT },
+ { 0xcc1d44, KEY_DOWN },
+ { 0xcc1d07, KEY_UP },
+ { 0xcc1d02, KEY_VOLUMEDOWN },
+ { 0xcc1d0c, KEY_MUTE },
+ { 0xcc1d0e, KEY_VOLUMEUP },
+ { 0xcc1d01, KEY_F1 },
+ { 0xcc1d05, KEY_F2 },
+ { 0xcc1d09, KEY_F3 },
+ { 0xcc1d0d, KEY_F4 },
+
+};
+
+static struct rc_map_list xt_q8l_v10_map = {
+ .map = {
+ .scan = xt_q8l_v10,
+ .size = ARRAY_SIZE(xt_q8l_v10),
+ .rc_proto = RC_PROTO_NEC, /* Legacy IR type */
+ .name = RC_MAP_XT_Q8L_V10,
+ }
+};
+
+static int __init init_rc_map_xt_q8l_v10(void)
+{
+ return rc_map_register(&xt_q8l_v10_map);
+}
+
+static void __exit exit_rc_map_xt_q8l_v10(void)
+{
+ rc_map_unregister(&xt_q8l_v10_map);
+}
+
+module_init(init_rc_map_xt_q8l_v10)
+module_exit(exit_rc_map_xt_q8l_v10)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paolo Sabatino");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index d621acadf..ad7abdb97 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -278,6 +278,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_X96MAX "rc-x96max"
#define RC_MAP_XBOX_DVD "rc-xbox-dvd"
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
#define RC_MAP_ZX_IRDEC "rc-zx-irdec"
/*
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 5b1399af6..ec9ce1206 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -117,4 +117,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-winfast-usbii-deluxe.o \
rc-su3000.o \
rc-xbox-dvd.o \
+ rc-xt-q8l-v10.o \
rc-x96max.o \

20
patch/kernel/rockchip-legacy/arm64_makefile_fix_build_of_i-file_in_external_module_case.patch Normal file
View File

@ -0,0 +1,20 @@
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 605f6cf4..08b797df 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -141,6 +141,7 @@ archclean:
$(Q)$(MAKE) $(clean)=$(boot)
$(Q)$(MAKE) $(clean)=$(boot)/dts
+ifeq ($(KBUILD_EXTMOD),)
# We need to generate vdso-offsets.h before compiling certain files in kernel/.
# In order to do that, we should use the archprepare target, but we can't since
# asm-offsets.h is included in some files used to generate vdso-offsets.h, and
@@ -150,6 +151,7 @@ archclean:
prepare: vdso_prepare
vdso_prepare: prepare0
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso include/generated/vdso-offsets.h
+endif
define archhelp
echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'

2692
patch/kernel/rockchip-legacy/patch-4.4.210-211.patch Normal file
View File

File diff suppressed because it is too large Load Diff

2
patch/kernel/rockchip64-current/add-board-orangepi-4.patch
View File

@ -196,7 +196,7 @@ index 00000000..17010305
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Mic Jack", "MICBIAS1",
+ "Mic Jack", "micbias1",
+ "IN1P", "Mic Jack",
+ "Headphone Jack", "HPOL",
+ "Headphone Jack", "HPOR";

45
patch/kernel/rockchip64-current/rk3328-sd-drive-level-8ma.patch.disabled
View File

@ -1,45 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 6fa62cab2..d1ba2f5b9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1462,30 +1462,30 @@
sdmmc0 {
sdmmc0_clk: sdmmc0-clk {
- rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>;
+ rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
};
sdmmc0_cmd: sdmmc0-cmd {
- rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>;
+ rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
};
sdmmc0_dectn: sdmmc0-dectn {
- rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>;
+ rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_8ma>;
};
sdmmc0_wrprt: sdmmc0-wrprt {
- rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>;
+ rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_8ma>;
};
sdmmc0_bus1: sdmmc0-bus1 {
- rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>;
+ rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
};
sdmmc0_bus4: sdmmc0-bus4 {
- rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>,
- <1 RK_PA1 1 &pcfg_pull_up_4ma>,
- <1 RK_PA2 1 &pcfg_pull_up_4ma>,
- <1 RK_PA3 1 &pcfg_pull_up_4ma>;
+ rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
+ <1 RK_PA1 1 &pcfg_pull_up_8ma>,
+ <1 RK_PA2 1 &pcfg_pull_up_8ma>,
+ <1 RK_PA3 1 &pcfg_pull_up_8ma>;
};
sdmmc0_gpio: sdmmc0-gpio {

2
patch/kernel/rockchip64-dev/add-board-orangepi-4.patch
View File

@ -196,7 +196,7 @@ index 00000000..17010305
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Mic Jack", "MICBIAS1",
+ "Mic Jack", "micbias1",
+ "IN1P", "Mic Jack",
+ "Headphone Jack", "HPOL",
+ "Headphone Jack", "HPOR";

20
patch/kernel/rockchip64-legacy/arm64_makefile_fix_build_of_i-file_in_external_module_case.patch Normal file
View File

@ -0,0 +1,20 @@
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 605f6cf4..08b797df 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -141,6 +141,7 @@ archclean:
$(Q)$(MAKE) $(clean)=$(boot)
$(Q)$(MAKE) $(clean)=$(boot)/dts
+ifeq ($(KBUILD_EXTMOD),)
# We need to generate vdso-offsets.h before compiling certain files in kernel/.
# In order to do that, we should use the archprepare target, but we can't since
# asm-offsets.h is included in some files used to generate vdso-offsets.h, and
@@ -150,6 +151,7 @@ archclean:
prepare: vdso_prepare
vdso_prepare: prepare0
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso include/generated/vdso-offsets.h
+endif
define archhelp
echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'

2692
patch/kernel/rockchip64-legacy/patch-4.4.210-211.patch Normal file
View File

File diff suppressed because it is too large Load Diff

0
patch/kernel/sunxi-dev/board-pinebook-boe-hb140wx-501-overlay.patch → patch/kernel/sunxi-dev/x-board-pinebook-boe-hb140wx-501-overlay.patch
View File

14
patch/misc/general-packaging-4.14.y.patch
View File

@ -11,8 +11,6 @@ index 8c4bc5a2c..30bc0cffb 100644
KBUILD_DTBS := dtbs
all: Image.gz $(KBUILD_DTBS)
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index e15159d0a..009332700 100755
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -29,6 +29,27 @@ create_package() {
@ -113,14 +111,13 @@ index e15159d0a..009332700 100755
set -e
@@ -212,6 +246,55 @@ EOF
@@ -212,6 +246,53 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -139,7 +136,6 @@ index e15159d0a..009332700 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -169,7 +165,7 @@ index e15159d0a..009332700 100755
# Try to determine maintainer and email values
if [ -n "$DEBEMAIL" ]; then
email=$DEBEMAIL
@@ -314,6 +397,7 @@ fi
@@ -314,6 +395,7 @@ fi
# Build kernel header package
(cd $srctree; find . -name Makefile\* -o -name Kconfig\* -o -name \*.pl) > "$objtree/debian/hdrsrcfiles"
(cd $srctree; find arch/*/include include scripts -type f -o -type l) >> "$objtree/debian/hdrsrcfiles"
@ -177,7 +173,7 @@ index e15159d0a..009332700 100755
(cd $srctree; find arch/$SRCARCH -name module.lds -o -name Kbuild.platforms -o -name Platform) >> "$objtree/debian/hdrsrcfiles"
(cd $srctree; find $(find arch/$SRCARCH -name include -o -name scripts -type d) -type f) >> "$objtree/debian/hdrsrcfiles"
if grep -q '^CONFIG_STACK_VALIDATION=y' $KCONFIG_CONFIG ; then
@@ -325,16 +409,20 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
@@ -325,16 +407,20 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
fi
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -198,7 +194,7 @@ index e15159d0a..009332700 100755
Description: Linux kernel headers for $KERNELRELEASE on \${kernel:debarch}
This package provides kernel header files for $KERNELRELEASE on \${kernel:debarch}
.
@@ -343,6 +431,16 @@ EOF
@@ -343,6 +429,16 @@ EOF
cat <<EOF >> debian/control
@ -215,7 +211,7 @@ index e15159d0a..009332700 100755
Package: $libc_headers_packagename
Section: devel
Provides: linux-kernel-headers
@@ -354,7 +452,7 @@ EOF
@@ -354,7 +450,7 @@ EOF
if [ "$ARCH" != "um" ]; then
create_package "$kernel_headers_packagename" "$kernel_headers_dir"

10
patch/misc/general-packaging-4.19.y.patch
View File

@ -11,8 +11,6 @@ index 9a5e28141211..851e646169ba 100644
KBUILD_DTBS := dtbs
all: Image.gz $(KBUILD_DTBS)
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index 0b31f4f1f92c..4f605fe82fd4 100755
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -29,6 +29,27 @@ create_package() {
@ -106,14 +104,13 @@ index 0b31f4f1f92c..4f605fe82fd4 100755
set -e
@@ -153,9 +192,60 @@ EOF
@@ -153,9 +192,58 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -133,7 +130,6 @@ index 0b31f4f1f92c..4f605fe82fd4 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -167,7 +163,7 @@ index 0b31f4f1f92c..4f605fe82fd4 100755
(cd $srctree; find arch/$SRCARCH -name module.lds -o -name Kbuild.platforms -o -name Platform) >> "$objtree/debian/hdrsrcfiles"
(cd $srctree; find $(find arch/$SRCARCH -name include -o -name scripts -type d) -type f) >> "$objtree/debian/hdrsrcfiles"
if grep -q '^CONFIG_STACK_VALIDATION=y' $KCONFIG_CONFIG ; then
@@ -167,15 +257,19 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
@@ -167,15 +255,19 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
fi
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -188,8 +184,6 @@ index 0b31f4f1f92c..4f605fe82fd4 100755
fi
create_package "$packagename" "$tmpdir"
diff --git a/scripts/package/mkdebian b/scripts/package/mkdebian
index edcad61fe3cd..8a49f432921f 100755
--- a/scripts/package/mkdebian
+++ b/scripts/package/mkdebian
@@ -94,10 +94,12 @@ else

10
patch/misc/general-packaging-4.4.y-rk3399.patch
View File

@ -115,14 +115,13 @@ index 6c3b038e..f4166fbe 100755
export INITRD=$want_initrd
test -d $debhookdir/$script.d && run-parts --arg="$version" --arg="/$installed_image_path" $debhookdir/$script.d
@@ -218,6 +252,58 @@ EOF
@@ -218,6 +252,56 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -144,7 +143,6 @@ index 6c3b038e..f4166fbe 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -174,7 +172,7 @@ index 6c3b038e..f4166fbe 100755
# Try to determine maintainer and email values
if [ -n "$DEBEMAIL" ]; then
email=$DEBEMAIL
@@ -328,17 +414,26 @@ fi
@@ -328,17 +412,26 @@ fi
(cd $objtree; find arch/$SRCARCH/include Module.symvers include scripts -type f) >> "$objtree/debian/hdrobjfiles"
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -202,7 +200,7 @@ index 6c3b038e..f4166fbe 100755
Description: Linux kernel headers for $KERNELRELEASE on \${kernel:debarch}
This package provides kernel header files for $KERNELRELEASE on \${kernel:debarch}
.
@@ -363,6 +458,16 @@ fi
@@ -363,6 +456,16 @@ fi
cat <<EOF >> debian/control
@ -219,7 +217,7 @@ index 6c3b038e..f4166fbe 100755
Package: $libc_headers_packagename
Section: devel
Provides: linux-kernel-headers
@@ -374,7 +479,7 @@ EOF
@@ -374,7 +477,7 @@ EOF
if [ "$ARCH" != "um" ]; then
create_package "$kernel_headers_packagename" "$kernel_headers_dir"

10
patch/misc/general-packaging-4.4.y-rockchip64.patch
View File

@ -115,14 +115,13 @@ index 6c3b038e..f4166fbe 100755
export INITRD=$want_initrd
test -d $debhookdir/$script.d && run-parts --arg="$version" --arg="/$installed_image_path" $debhookdir/$script.d
@@ -218,6 +252,58 @@ EOF
@@ -218,6 +252,56 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -144,7 +143,6 @@ index 6c3b038e..f4166fbe 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -174,7 +172,7 @@ index 6c3b038e..f4166fbe 100755
# Try to determine maintainer and email values
if [ -n "$DEBEMAIL" ]; then
email=$DEBEMAIL
@@ -328,17 +414,26 @@ fi
@@ -328,17 +412,26 @@ fi
(cd $objtree; find arch/$SRCARCH/include Module.symvers include scripts -type f) >> "$objtree/debian/hdrobjfiles"
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -202,7 +200,7 @@ index 6c3b038e..f4166fbe 100755
Description: Linux kernel headers for $KERNELRELEASE on \${kernel:debarch}
This package provides kernel header files for $KERNELRELEASE on \${kernel:debarch}
.
@@ -363,6 +458,16 @@ fi
@@ -363,6 +456,16 @@ fi
cat <<EOF >> debian/control
@ -219,7 +217,7 @@ index 6c3b038e..f4166fbe 100755
Package: $libc_headers_packagename
Section: devel
Provides: linux-kernel-headers
@@ -374,7 +479,7 @@ EOF
@@ -374,7 +477,7 @@ EOF
if [ "$ARCH" != "um" ]; then
create_package "$kernel_headers_packagename" "$kernel_headers_dir"

12
patch/misc/general-packaging-4.4.y.patch
View File

@ -111,14 +111,13 @@ index 6c3b038e..977a0624 100755
export INITRD=$want_initrd
test -d $debhookdir/$script.d && run-parts --arg="$version" --arg="/$installed_image_path" $debhookdir/$script.d
@@ -218,6 +254,55 @@ EOF
@@ -218,6 +254,53 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -137,7 +136,6 @@ index 6c3b038e..977a0624 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -167,7 +165,7 @@ index 6c3b038e..977a0624 100755
# Try to determine maintainer and email values
if [ -n "$DEBEMAIL" ]; then
email=$DEBEMAIL
@@ -328,16 +413,24 @@ fi
@@ -328,16 +411,25 @@ fi
(cd $objtree; find arch/$SRCARCH/include Module.symvers include scripts -type f) >> "$objtree/debian/hdrobjfiles"
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -191,9 +189,10 @@ index 6c3b038e..977a0624 100755
-Provides: linux-headers, linux-headers-2.6
+Provides: linux-headers
Architecture: any
+Depends: make, gcc, libc6-dev, libssl-dev
Description: Linux kernel headers for $KERNELRELEASE on \${kernel:debarch}
This package provides kernel header files for $KERNELRELEASE on \${kernel:debarch}
@@ -363,10 +456,21 @@ fi
@@ -363,10 +455,20 @@ fi
cat <<EOF >> debian/control
@ -211,11 +210,10 @@ index 6c3b038e..977a0624 100755
Section: devel
Provides: linux-kernel-headers
Architecture: any
+Depends: make, gcc, libc6-dev, libssl-dev
Description: Linux support headers for userspace development
This package provides userspaces headers from the Linux kernel. These headers
are used by the installed headers for GNU glibc and other system libraries.
@@ -374,7 +478,7 @@ EOF
@@ -374,7 +476,7 @@ EOF
if [ "$ARCH" != "um" ]; then
create_package "$kernel_headers_packagename" "$kernel_headers_dir"

10
patch/misc/general-packaging-4.9.y.patch
View File

@ -98,14 +98,13 @@ index 0a2a7372..87edac65 100755
export INITRD=$want_initrd
test -d $debhookdir/$script.d && run-parts --arg="$version" --arg="/$installed_image_path" $debhookdir/$script.d
@@ -220,6 +253,55 @@ EOF
@@ -220,6 +253,53 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -124,7 +123,6 @@ index 0a2a7372..87edac65 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -154,7 +152,7 @@ index 0a2a7372..87edac65 100755
# Try to determine maintainer and email values
if [ -n "$DEBEMAIL" ]; then
email=$DEBEMAIL
@@ -337,17 +419,26 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
@@ -337,17 +417,26 @@ if grep -q '^CONFIG_GCC_PLUGINS=y' $KCONFIG_CONFIG ; then
fi
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -182,7 +180,7 @@ index 0a2a7372..87edac65 100755
Description: Linux kernel headers for $KERNELRELEASE on \${kernel:debarch}
This package provides kernel header files for $KERNELRELEASE on \${kernel:debarch}
.
@@ -372,6 +463,16 @@ fi
@@ -372,6 +461,16 @@ fi
cat <<EOF >> debian/control
@ -199,7 +197,7 @@ index 0a2a7372..87edac65 100755
Package: $libc_headers_packagename
Section: devel
Provides: linux-kernel-headers
@@ -383,7 +484,7 @@ EOF
@@ -383,7 +482,7 @@ EOF
if [ "$ARCH" != "um" ]; then
create_package "$kernel_headers_packagename" "$kernel_headers_dir"

10
patch/misc/general-packaging-5.3.y.patch
View File

@ -11,8 +11,6 @@ index 5858d6e44..e81b8a6fc 100644
all: Image.gz
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index c4c580f54..58243c628 100755
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -41,6 +41,27 @@ create_package() {
@ -106,14 +104,13 @@ index c4c580f54..58243c628 100755
set -e
@@ -164,9 +203,60 @@ EOF
@@ -164,9 +203,58 @@ EOF
chmod 755 "$tmpdir/DEBIAN/$script"
done
+##
+## Create sym link to kernel image
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/postinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
+cat >> $tmpdir/DEBIAN/postinst <<EOT
+if [ "\$(grep nand /proc/partitions)" != "" ] && [ "\$(grep mmc /proc/partitions)" = "" ]; then
@ -133,7 +130,6 @@ index c4c580f54..58243c628 100755
+##
+## FAT install workaround
+##
+sed -e "s/set -e//g" -i $tmpdir/DEBIAN/preinst
+sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/preinst
+cat >> $tmpdir/DEBIAN/preinst <<EOT
+# exit if we are running chroot
@ -167,7 +163,7 @@ index c4c580f54..58243c628 100755
(cd $srctree; find arch/$SRCARCH -name module.lds -o -name Kbuild.platforms -o -name Platform) >> "$objtree/debian/hdrsrcfiles"
(cd $srctree; find $(find arch/$SRCARCH -name include -o -name scripts -type d) -type f) >> "$objtree/debian/hdrsrcfiles"
if is_enabled CONFIG_STACK_VALIDATION; then
@@ -178,15 +268,18 @@ if is_enabled CONFIG_GCC_PLUGINS; then
@@ -178,15 +266,18 @@ if is_enabled CONFIG_GCC_PLUGINS; then
fi
destdir=$kernel_headers_dir/usr/src/linux-headers-$version
mkdir -p "$destdir"
@ -188,8 +184,6 @@ index c4c580f54..58243c628 100755
fi
create_package "$packagename" "$tmpdir"
diff --git a/scripts/package/mkdebian b/scripts/package/mkdebian
index e0750b704..ac1409748 100755
--- a/scripts/package/mkdebian
+++ b/scripts/package/mkdebian
@@ -94,10 +94,12 @@ else

10
patch/u-boot/u-boot-mvebu/clearfog-pci0=msata.patch.disabled Normal file
View File

@ -0,0 +1,10 @@
This turns pci0 (on clearfogpro the farthest from the cpu) into mSATA
On clearfogbase this is the only mSATA/mPCIe
---
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 6b3e196..4400c71 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -47,0 +47,1 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_CLEARFOG_CON3_SATA=y

9
patch/u-boot/u-boot-mvebu/clearfog-pci1=msata.patch.disabled Normal file
View File

@ -0,0 +1,9 @@
This turns the pci1 (on clearfogpro the closest from the cpu) into mSATA
---
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 6b3e196..4400c71 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -47,0 +47,1 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_CLEARFOG_CON2_SATA=y

44
patch/u-boot/u-boot-mvebu/swap-sata-serdes-rx.patch Normal file
View File

@ -0,0 +1,44 @@
From f95ec9a3e97c9e1be4b444f776e47201e03d9783 Mon Sep 17 00:00:00 2001
From: Baruch Siach <baruch@tkos.co.il>
Date: Wed, 13 Jun 2018 16:25:20 +0300
Subject: [PATCH] clearfog: sata serdes needs Rx swap
Both SATA serdes configurations need to enable the swap_rx field in
serdes_map to allow proper communication with SATA devices.
Apply the fix to Pro and Base.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
board/solidrun/clearfog/clearfog.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 34dc50d94b2..cec9c764a89 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -41,13 +41,13 @@ static struct serdes_map board_serdes_map[] = {
{SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
#ifdef CONFIG_CLEARFOG_CON3_SATA
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 0},
#else
{PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
#endif
{USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
#ifdef CONFIG_CLEARFOG_CON2_SATA
- {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 0},
#else
{PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
#endif
@@ -64,7 +64,7 @@ static struct serdes_map board_serdes_map[] = {
{SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
#ifdef CONFIG_CLEARFOG_CON3_SATA
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 0},
#else
{PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
#endif