Update U-Boot to 2025.10 and refactor Youyeetoo R1 DTS (ES8323 audio + NPU) (#8810)

* youyeetoo-r1: bump u-boot to v2025.10 final

* rockchip64-edge: enable es8323 driver by default

* rockchip64-6.18: dts: youyeetoo-r1 - refactor DTS
This commit is contained in:
SuperKali 2025-10-23 17:17:42 +02:00 committed by GitHub
parent 4a7b997f02
commit a24fadabd4
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GPG Key ID: B5690EEEBB952194
5 changed files with 228 additions and 150 deletions

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@ -17,7 +17,7 @@ function post_family_tweaks__youyeetoo_r1_naming_audios() {
mkdir -p $SDCARD/etc/udev/rules.d/
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi0-sound", ENV{SOUND_DESCRIPTION}="HDMI0 Audio"' > $SDCARD/etc/udev/rules.d/90-naming-audios.rules
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-es8388-sound", ENV{SOUND_DESCRIPTION}="ES8388 Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-es8323-sound", ENV{SOUND_DESCRIPTION}="ES8323 Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules
return 0
}
@ -35,11 +35,11 @@ function post_family_tweaks__youyeetoo_r1_naming_udev_network_interfaces() {
function post_family_config__youyeetoo_r1_use_mainline_uboot() {
display_alert "$BOARD" "Using mainline (next branch) U-Boot for $BOARD / $BRANCH" "info"
declare -g BOOTCONFIG="youyeetoo-r1-rk3588s_defconfig" # Use generic defconfig which should boot all RK3588 boards
declare -g BOOTCONFIG="youyeetoo-r1-rk3588s_defconfig" # Use generic defconfig which should boot all RK3588 boards
declare -g BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc
declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git" # We ❤️ Mainline U-Boot
declare -g BOOTBRANCH="tag:v2025.04"
declare -g BOOTPATCHDIR="v2025.04"
declare -g BOOTBRANCH="tag:v2025.10"
declare -g BOOTPATCHDIR="v2025.10"
# Don't set BOOTDIR, allow shared U-Boot source directory for disk space efficiency
declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin"
@ -53,6 +53,13 @@ function post_family_config__youyeetoo_r1_use_mainline_uboot() {
}
}
# U-boot 2025.04+ can detect and set fdtfile automatically on youyeetoo r1 v3.
# So if using mainline u-boot, unset BOOT_FDT_FILE to let u-boot handle it.
# That way, both variants can boot from the same image; lets keep the -lts board file for vendor kernel/u-boot.
function post_family_config__youyeetoo-r1-v3_auto_dtb_name_via_uboot_detection() {
unset BOOT_FDT_FILE
}
# "rockchip-common: boot SD card first, then NVMe, then mmc"
# include/configs/rockchip-common.h
# -#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp"

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@ -2191,6 +2191,7 @@ CONFIG_SND_SOC_DA7213=m
CONFIG_SND_SOC_ES7134=m
CONFIG_SND_SOC_ES7241=m
CONFIG_SND_SOC_ES8316=m
CONFIG_SND_SOC_ES8323=y
CONFIG_SND_SOC_ES8326=m
CONFIG_SND_SOC_ICS43432=m
CONFIG_SND_SOC_MAX9867=m

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@ -24,19 +24,44 @@
stdout-path = "serial2:1500000n8";
};
leds {
compatible = "gpio-leds";
es8323-sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
simple-audio-card,name = "rockchip-es8323";
simple-audio-card,format = "i2s";
simple-audio-card,hp-det-gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,pin-switches = "Headphones";
simple-audio-card,routing =
"Headphones", "LOUT1",
"Headphones", "ROUT1",
"LINPUT1", "Microphone Jack",
"RINPUT1", "Microphone Jack",
"LINPUT2", "Onboard Microphone",
"RINPUT2", "Onboard Microphone";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone",
"Headphone", "Headphones";
sys_led: led-0 {
label = "sys_led";
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&es8323>;
system-clock-frequency = <12288000>;
};
};
/* HDMI 0 CONNECTOR */
fan0: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
cooling-levels = <100 160 190 200 215 235 255>;
pwms = <&pwm6 0 40000 0>;
fan-supply = <&vcc12v_dcin>;
};
hdmi0-con {
compatible = "hdmi-connector";
@ -49,7 +74,17 @@
};
};
/* POWER REGULATOR 12V DC-IN */
leds {
compatible = "gpio-leds";
sys_led: led-0 {
label = "sys_led";
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
};
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
@ -60,8 +95,6 @@
regulator-max-microvolt = <12000000>;
};
/* POWER REGULATOR 5V SYS */
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@ -72,8 +105,6 @@
vin-supply = <&vcc12v_dcin>;
};
/* POWER REGULATOR CPU */
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
@ -84,7 +115,15 @@
vin-supply = <&vcc5v0_sys>;
};
/* POWER REGULATOR 3V (SD) */
vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
compatible = "regulator-fixed";
@ -99,31 +138,7 @@
vin-supply = <&vcc_3v3_s3>;
};
/* POWER REGULATOR 3.3V (PCIE)*/
vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
/* POWER REGULATOR 5V (USB2 & USB3) */
vcc5v0_usb: vcc5v0-usb-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_host_20: vcc5v0-host-20 { // U13 (USB 2.0)
vcc5v0_host_20: vcc5v0-host-20 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
@ -135,7 +150,7 @@
vin-supply = <&vcc5v0_usb>;
};
vcc5v0_host_30: vcc5v0-host-30 { // U12 (USB 3.0)
vcc5v0_host_30: vcc5v0-host-30 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
@ -147,8 +162,16 @@
vin-supply = <&vcc5v0_usb>;
};
vcc5v0_usb: vcc5v0-usb-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
/* BLUETOOTH */
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&hym8563>;
@ -156,7 +179,6 @@
status = "okay";
};
/* WIFI */
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "rtl8852be";
@ -165,15 +187,6 @@
WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/* FAN */
fan0: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
cooling-levels = <100 160 190 200 215 235 255>;
pwms = <&pwm6 0 40000 0>;
fan-supply = <&vcc12v_dcin>;
};
};
&combphy0_ps {
@ -184,21 +197,6 @@
status = "okay";
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-rxid";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
pinctrl-names = "default";
tx_delay = <0x42>;
tx_delay = <0x43>;
status = "okay";
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
mem-supply = <&vdd_cpu_big0_mem_s0>;
@ -239,6 +237,21 @@
mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-rxid";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
pinctrl-names = "default";
rx_delay = <0x00>;
tx_delay = <0x43>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
@ -332,25 +345,68 @@
};
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m3_xfer>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m3_xfer>;
/* RTC */
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
status = "okay";
};
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-0 = <&hym8563_int>;
status = "okay";
};
};
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m0_xfer>;
/*
* in the Youyeetoo BSP source this was confusingly called an
* "ES8388" - it actually seems to be an ES8323 and the drivers
* for that work best
*/
es8323: audio-codec@11 {
compatible = "everest,es8323";
reg = <0x11>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
AVDD-supply = <&avcc_1v8_s0>;
DVDD-supply = <&avcc_1v8_s0>;
HPVDD-supply = <&vcc_3v3_s0>;
PVDD-supply = <&vcc_3v3_s0>;
#sound-dai-cells = <0>;
};
};
&i2s0_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s0_lrck
&i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
status = "okay";
};
&i2s5_8ch {
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&package_thermal {
polling-delay = <1000>;
@ -379,14 +435,6 @@
};
};
&mdio1 {
rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&pcie2x1l1 {
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
rockchip,init-delay-ms = <100>;
@ -402,41 +450,40 @@
&pinctrl {
/* TODO: SOUND */
sound {
hp_detect: hp-detect {
rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/* GPIO LEDS */
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/* RTC */
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
/* SD */
sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
/* USB */
usb {
vcc5v0_host20_en: vcc5v0-host20-en { // USB 2.0
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
vcc5v0_host20_en: vcc5v0-host20-en {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
vcc5v0_host30_en: vcc5v0-host30-en { // USB 3.0
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
vcc5v0_host30_en: vcc5v0-host30-en {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
/* WIRELESS */
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
@ -444,8 +491,37 @@
};
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
&pwm6 {
status = "okay";
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
@ -454,25 +530,25 @@
no-sdio;
no-sd;
non-removable;
/* HS400 doesn't work properly -> https://github.com/torvalds/linux/commit/cee572756aa2cb46e959e9797ad4b730b78a050b */
mmc-hs200-1_8v;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
status = "okay";
};
&sdmmc {
max-frequency = <200000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
max-frequency = <200000000>;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
status = "okay";
};
@ -518,13 +594,13 @@
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl2";
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fudr_moden0";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
@ -803,30 +879,11 @@
};
};
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&pwm6{
status = "okay";
};
&tsadc {
status = "okay";
};
/* USB */
&u2phy0 {
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
@ -835,20 +892,27 @@
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_host_20>;
status = "okay";
};
&u2phy3_host {
phy-supply = <&vcc5v0_host_20>;
status = "okay";
&u2phy3 {
status = "okay";
};
&usb_host0_xhci {
&u2phy3_host {
phy-supply = <&vcc5v0_host_20>;
status = "okay";
};
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
dr_mode = "host";
extcon = <&u2phy0>;
};
&usb_host0_ehci {
@ -859,6 +923,12 @@
status = "okay";
};
&usb_host0_xhci {
status = "okay";
dr_mode = "host";
extcon = <&u2phy0>;
};
&usb_host1_ehci {
status = "okay";
};
@ -871,11 +941,11 @@
status = "okay";
};
&vop_mmu {
&vop {
status = "okay";
};
&vop {
&vop_mmu {
status = "okay";
};

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@ -1,6 +1,6 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: SuperKali <hello@superkali.me>
Date: Sat, 10 May 2025 13:10:27 +0000
Date: Thu, 23 Oct 2025 07:48:02 +0000
Subject: Add Youyeetoo R1 upstream patch
Signed-off-by: SuperKali <hello@superkali.me>
@ -10,7 +10,7 @@ Signed-off-by: SuperKali <hello@superkali.me>
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-youyeetoo-r1.dts b/dts/upstream/src/arm64/rockchip/rk3588s-youyeetoo-r1.dts
new file mode 100644
index 000000000000..111111111111
index 00000000000..592d2b87e00
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3588s-youyeetoo-r1.dts
@@ -0,0 +1,884 @@
@ -278,7 +278,7 @@ index 000000000000..111111111111
+};
+
+
+&hdptxphy_hdmi0 {
+&hdptxphy0 {
+ status = "okay";
+};
+