Adjusting patches due to upstream changes to make mvbe family operational again
@heisath
This commit is contained in:
Igor Pecovnik
parent
9479c0473f
commit
9dbb72b01c
@ -1,6 +1,6 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# Linux/arm 5.10.48 Kernel Configuration
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# Linux/arm 5.10.81 Kernel Configuration
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#
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CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
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CONFIG_CC_IS_GCC=y
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@ -200,6 +200,7 @@ CONFIG_ELF_CORE=y
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CONFIG_BASE_FULL=y
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CONFIG_FUTEX=y
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CONFIG_FUTEX_PI=y
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CONFIG_HAVE_FUTEX_CMPXCHG=y
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CONFIG_EPOLL=y
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CONFIG_SIGNALFD=y
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CONFIG_TIMERFD=y
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@ -483,7 +484,6 @@ CONFIG_ALIGNMENT_TRAP=y
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# CONFIG_PARAVIRT is not set
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# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
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# CONFIG_XEN is not set
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CONFIG_STACKPROTECTOR_PER_TASK=y
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# end of Kernel Features
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#
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@ -693,10 +693,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
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# end of GCOV-based kernel profiling
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CONFIG_HAVE_GCC_PLUGINS=y
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CONFIG_GCC_PLUGINS=y
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# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
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# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
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CONFIG_GCC_PLUGIN_ARM_SSP_PER_TASK=y
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# end of General architecture-dependent options
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CONFIG_RT_MUTEXES=y
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@ -3031,6 +3027,7 @@ CONFIG_WLAN_VENDOR_TI=y
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CONFIG_RTL8822BS=m
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CONFIG_RTL8723DU=m
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CONFIG_RTL8723DS=m
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CONFIG_RTL8822CS=m
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CONFIG_RTL8822BU=m
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CONFIG_RTL8188EU=m
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CONFIG_RTL8821CU=m
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@ -3692,6 +3689,7 @@ CONFIG_CHARGER_BQ25890=m
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CONFIG_CHARGER_BQ25980=m
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CONFIG_CHARGER_SMB347=m
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CONFIG_BATTERY_GAUGE_LTC2941=m
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CONFIG_BATTERY_RT5033=m
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CONFIG_CHARGER_RT9455=m
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CONFIG_CHARGER_UCS1002=m
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# CONFIG_CHARGER_BD99954 is not set
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@ -5446,6 +5444,7 @@ CONFIG_AD9834=m
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# CONFIG_LTE_GDM724X is not set
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# CONFIG_GS_FPGABOOT is not set
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# CONFIG_UNISYSSPAR is not set
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CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
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# CONFIG_MOST_COMPONENTS is not set
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# CONFIG_KS7010 is not set
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# CONFIG_PI433 is not set
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@ -6425,7 +6424,6 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
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# CONFIG_PSTORE_CONSOLE is not set
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# CONFIG_PSTORE_PMSG is not set
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CONFIG_PSTORE_RAM=m
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# CONFIG_PSTORE_BLK is not set
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CONFIG_SYSV_FS=m
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CONFIG_UFS_FS=m
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CONFIG_UFS_FS_WRITE=y
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@ -6656,9 +6654,6 @@ CONFIG_LSM="lockdown,yama,integrity,apparmor"
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# Memory initialization
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#
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CONFIG_INIT_STACK_NONE=y
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# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set
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# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set
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# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set
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CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y
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# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
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# end of Memory initialization
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@ -149,7 +149,7 @@ diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
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index 5d2acebc3..91d675e0d 100644
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -3572,18 +3572,44 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev)
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@@ -3572,19 +3572,46 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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quirk_nvidia_no_bus_reset);
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@ -181,6 +181,7 @@ index 5d2acebc3..91d675e0d 100644
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x002e,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030,
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@ -191,6 +192,8 @@ index 5d2acebc3..91d675e0d 100644
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0042,
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@ -204,9 +207,9 @@ index 86c799c97b77..fdbf7254e4ab 100644
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--- a/include/linux/pci.h
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+++ b/include/linux/pci.h
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@@ -227,6 +227,8 @@ enum pci_dev_flags {
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PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10),
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/* Don't use Relaxed Ordering for TLPs directed at this device */
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PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11),
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/* Device does honor MSI masking despite saying otherwise */
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PCI_DEV_FLAGS_HAS_MSI_MASKING = (__force pci_dev_flags_t) (1 << 12),
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+ /* Don't Retrain Link for device when bridge is not in GEN1 mode */
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+ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1 = (__force pci_dev_flags_t) (1 << 12),
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};
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@ -149,7 +149,7 @@ diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
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index 5d2acebc3..91d675e0d 100644
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -3572,18 +3572,44 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev)
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@@ -3572,19 +3572,46 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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quirk_nvidia_no_bus_reset);
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@ -181,6 +181,7 @@ index 5d2acebc3..91d675e0d 100644
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset);
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x002e,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030,
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@ -191,6 +192,8 @@ index 5d2acebc3..91d675e0d 100644
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c,
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+ quirk_no_bus_reset_and_no_retrain_link);
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0042,
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@ -204,9 +207,9 @@ index 86c799c97b77..fdbf7254e4ab 100644
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--- a/include/linux/pci.h
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+++ b/include/linux/pci.h
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@@ -227,6 +227,8 @@ enum pci_dev_flags {
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PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10),
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/* Don't use Relaxed Ordering for TLPs directed at this device */
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PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11),
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/* Device does honor MSI masking despite saying otherwise */
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PCI_DEV_FLAGS_HAS_MSI_MASKING = (__force pci_dev_flags_t) (1 << 12),
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+ /* Don't Retrain Link for device when bridge is not in GEN1 mode */
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+ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1 = (__force pci_dev_flags_t) (1 << 12),
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};
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