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Drop patches that has been upstreamed - rockchip and sm8550

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This commit is contained in:
Igor Pecovnik 2025-11-15 10:47:42 +01:00 committed by Igor
parent e5b845f943
commit 9b5518d8a9
3 changed files with 2 additions and 69 deletions
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2
patch/kernel/archive/rockchip-6.17/libreelec.series
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@ -63,7 +63,7 @@
patches.libreelec/rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch
patches.libreelec/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch
patches.libreelec/rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch
patches.libreelec/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch
# patches.libreelec/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch
patches.libreelec/rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch
patches.libreelec/rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch
patches.libreelec/rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch

2
patch/kernel/archive/rockchip-6.17/series.conf
View File

@ -63,7 +63,7 @@
patches.libreelec/rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch
patches.libreelec/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch
patches.libreelec/rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch
patches.libreelec/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch
# patches.libreelec/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch
patches.libreelec/rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch
patches.libreelec/rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch
patches.libreelec/rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch

67
patch/kernel/archive/sm8550-6.12/0042_mmc--sdhci-msm--Enable-tuning-for-SDR50-mode-for-S.patch
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@ -1,67 +0,0 @@
From a655571f7eac983ad53b3f30f75270fb81aadb88 Mon Sep 17 00:00:00 2001
From: Sarthak Garg <quic_sartgarg@quicinc.com>
Date: Thu, 7 Nov 2024 13:35:04 +0530
Subject: [PATCH] mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card
For Qualcomm SoCs which needs level shifter for SD card, extra delay is
seen on receiver data path.
To compensate this delay enable tuning for SDR50 mode for targets which
has level shifter.
Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
---
drivers/mmc/host/sdhci-msm.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 1fcaaf683d68..a6c9e9b60812 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -81,6 +81,7 @@
#define CORE_IO_PAD_PWR_SWITCH_EN BIT(15)
#define CORE_IO_PAD_PWR_SWITCH BIT(16)
#define CORE_HC_SELECT_IN_EN BIT(18)
+#define CORE_HC_SELECT_IN_SDR50 (4 << 19)
#define CORE_HC_SELECT_IN_HS400 (6 << 19)
#define CORE_HC_SELECT_IN_MASK (7 << 19)
@@ -1133,6 +1134,10 @@ static bool sdhci_msm_is_tuning_needed(struct sdhci_host *host)
{
struct mmc_ios *ios = &host->mmc->ios;
+ if (ios->timing == MMC_TIMING_UHS_SDR50 &&
+ host->flags & SDHCI_SDR50_NEEDS_TUNING)
+ return true;
+
/*
* Tuning is required for SDR104, HS200 and HS400 cards and
* if clock frequency is greater than 100MHz in these modes.
@@ -1201,6 +1206,8 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
struct mmc_ios ios = host->mmc->ios;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+ const struct sdhci_msm_offset *msm_offset = msm_host->offset;
+ u32 config;
if (!sdhci_msm_is_tuning_needed(host)) {
msm_host->use_cdr = false;
@@ -1217,6 +1224,15 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
*/
msm_host->tuning_done = 0;
+ if (ios.timing == MMC_TIMING_UHS_SDR50 &&
+ host->flags & SDHCI_SDR50_NEEDS_TUNING) {
+ config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
+ config |= CORE_HC_SELECT_IN_EN;
+ config &= ~CORE_HC_SELECT_IN_MASK;
+ config |= CORE_HC_SELECT_IN_SDR50;
+ writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec);
+ }
+
/*
* For HS400 tuning in HS200 timing requires:
* - select MCLK/2 in VENDOR_SPEC
--
2.34.1