OrangePi-RV2: Add ky-to-spacemit re-substituted DTs and WIP board configs
Signed-off-by: Sven-Ola Tuecke <sven-ola@gmx.de>
This commit is contained in:
Sven-Ola Tuecke
c0rnelius
parent
ef15fe183a
commit
9b3484158c
11
config/boards/orangepir2s.wip
Normal file
11
config/boards/orangepir2s.wip
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@ -0,0 +1,11 @@
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# Ky X1 octa core RISC-V SoC 2GB/4GB/8GB RAM, 2xGbit+2x2.5 Gbit Eth
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BOARD_NAME="Orange Pi R2S"
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BOARD_VENDOR="xunlong"
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BOARDFAMILY="spacemit"
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BOARD_MAINTAINER="sven-ola"
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KERNEL_TARGET="current,edge"
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BOOT_FDT_FILE="spacemit/x1_orangepi-r2s.dtb"
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BOOTDELAY=1
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SRC_EXTLINUX="yes"
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SRC_CMDLINE="earlycon=sbi console=tty1 console=ttyS0,115200 loglevel=1"
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PACKAGE_LIST_BOARD=""
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11
config/boards/orangepirv2.wip
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11
config/boards/orangepirv2.wip
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@ -0,0 +1,11 @@
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# Ky X1 octa core RISC-V SoC 2GB/4GB/8GB RAM, 2xGbit, Wifi, BT, M.2-M(2230), M.2-M(2280)
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BOARD_NAME="Orange Pi RV2"
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BOARD_VENDOR="xunlong"
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BOARDFAMILY="spacemit"
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BOARD_MAINTAINER="sven-ola"
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KERNEL_TARGET="current,edge"
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BOOT_FDT_FILE="spacemit/x1_orangepi-rv2.dtb"
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BOOTDELAY=1
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SRC_EXTLINUX="yes"
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SRC_CMDLINE="earlycon=sbi console=tty1 console=ttyS0,115200 loglevel=1"
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PACKAGE_LIST_BOARD="pciutils"
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@ -13,5 +13,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-bananapi-f3.dtb
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dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-musepi-pro.dtb
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dtb-$(CONFIG_SOC_SPACEMIT_K1X) += x1_orangepi-r2s.dtb
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dtb-$(CONFIG_SOC_SPACEMIT_K1X) += x1_orangepi-rv2.dtb
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subdir-y += overlay
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850
patch/kernel/archive/spacemit-6.18/dt/x1_orangepi-r2s.dts
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850
patch/kernel/archive/spacemit-6.18/dt/x1_orangepi-r2s.dts
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@ -0,0 +1,850 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2023 Ky, Inc */
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/dts-v1/;
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#include "k1-x.dtsi"
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#include "k1-x-efuse.dtsi"
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#include "k1-x_pinctrl.dtsi"
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#include "lcd/lcd_ili9881c_mipi.dtsi"
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#include "k1-x-hdmi.dtsi"
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#include "k1-x-lcd.dtsi"
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#include "k1-x-camera-sdk.dtsi"
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#include "k1-x_opp_table.dtsi"
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#include "k1-x_thermal_cooling.dtsi"
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/ {
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model = "ky x1 orangepi-r2s board";
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compatible = "spacemit,orangepi-r2s", "spacemit,k1x";
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cpus: cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <24000000>;
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cpu_0: cpu@0 {
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cpu-ai = "true";
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};
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cpu_1: cpu@1 {
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cpu-ai = "true";
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};
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cpu_2: cpu@2 {
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reg = <2>;
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cpu-ai = "true";
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};
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cpu_3: cpu@3 {
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reg = <3>;
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cpu-ai = "true";
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu_0>;
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};
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core1 {
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cpu = <&cpu_1>;
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};
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core2 {
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cpu = <&cpu_2>;
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};
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core3 {
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cpu = <&cpu_3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu_4>;
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};
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core1 {
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cpu = <&cpu_5>;
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};
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core2 {
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cpu = <&cpu_6>;
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};
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core3 {
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cpu = <&cpu_7>;
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};
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};
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x0 0x80000000>;
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};
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memory@100000000 {
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device_type = "memory";
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reg = <0x1 0x00000000 0x0 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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/* alloc memory from 0x40000000~0x80000000 */
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alloc-ranges = <0 0x40000000 0 0x30000000>;
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/* size of cma buffer is 384MByte */
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size = <0 0x18000000>;
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/* start address is 1Mbyte aligned */
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alignment = <0x0 0x100000>;
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linux,cma-default;
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/* besides hardware, dma for ex. buffer can be used by memory management */
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reusable;
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};
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/* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */
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dpu_resv: dpu_reserved@2ff40000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x2ff40000 0x0 0x000C0000>;
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no-map;
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};
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};
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chosen {
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bootargs = "earlycon=sbi console=ttyS0,115200n8 loglevel=8 swiotlb=65536 rdinit=/init";
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stdout-path = "serial0:115200n8";
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc4v0_baseboard: vcc4v0-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc4v0_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <4000000>;
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regulator-max-microvolt = <4000000>;
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vin-supply = <&dc_12v>;
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "sys-led";
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gpios = <&gpio 96 0>;
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linux,default-trigger = "heartbeat";
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default-state = "on";
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status = "okay";
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0_2>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&pwm14 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm14_1>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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spacemit,i2c-fast-mode;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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eeprom@50{
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compatible = "atmel,24c02";
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reg = <0x50>;
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#address-cells = <1>;
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#size-cells = <1>;
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power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>;
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status = "okay";
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mac_address0: mac_address0@0 {
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reg = <0x0 6>;
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};
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mac_address1: mac_address1@6 {
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reg = <0x6 6>;
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};
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};
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};
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&i2c8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c8>;
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status = "okay";
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spm8821@41 {
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compatible = "spacemit,spm8821";
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reg = <0x41>;
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interrupt-parent = <&intc>;
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interrupts = <64>;
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status = "okay";
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vcc_sys-supply = <&vcc4v0_baseboard>;
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dcdc5-supply = <&dcdc_5>;
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regulators {
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compatible = "pmic,regulator,spm8821";
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/* buck */
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dcdc_1: DCDC_REG1 {
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regulator-name = "dcdc1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <650000>;
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};
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};
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dcdc_2: DCDC_REG2 {
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regulator-name = "dcdc2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_3: DCDC_REG3 {
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regulator-name = "dcdc3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1800000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_4: DCDC_REG4 {
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regulator-name = "dcdc4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3300000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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dcdc_5: DCDC_REG5 {
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regulator-name = "dcdc5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_6: DCDC_REG6 {
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regulator-name = "dcdc6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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/* aldo */
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ldo_1: LDO_REG1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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/* set the min voltage means will disable this vol in suspend for ldo */
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_2: LDO_REG2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_3: LDO_REG3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_4: LDO_REG4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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/* dldo */
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ldo_5: LDO_REG5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_6: LDO_REG6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_7: LDO_REG7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_8: LDO_REG8 {
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regulator-name = "ldo8";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_9: LDO_REG9 {
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regulator-name = "ldo9";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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ldo_10: LDO_REG10 {
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regulator-name = "ldo10";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_11: LDO_REG11 {
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regulator-name = "ldo11";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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sw_1: SWITCH_REG1 {
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "switch1";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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pmic_pinctrl: pinctrl {
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compatible = "pmic,pinctrl,spm8821";
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gpio-controller;
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#gpio-cells = <2>;
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spacemit,npins = <6>;
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/**
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* led_pins: led-pins {
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* pins = "PIN3";
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* function = "sleep";
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* bias-disable = <0>;
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* drive-open-drain = <0x1>;
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* };
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*/
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};
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pwr_key: key {
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compatible = "pmic,pwrkey,spm8821";
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};
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ext_rtc: rtc {
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compatible = "pmic,rtc,spm8821";
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};
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ext_adc: adc {
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compatible = "pmic,adc,spm8821";
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};
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};
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};
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&pinctrl {
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pinctrl-single,gpio-range = <
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&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
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&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
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&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
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&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
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&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
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&range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
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&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
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&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
/*&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) */
|
||||
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
||||
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
>;
|
||||
|
||||
/* pinctrl_rcpu: pinctrl_rcpu_grp { */
|
||||
/* pinctrl-single,pins = < */
|
||||
/* K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /1* r_uart0_tx *1/ */
|
||||
/* K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /1* r_uart0_rx *1/ */
|
||||
/* >; */
|
||||
/* }; */
|
||||
|
||||
pinctrl_gmac0: gmac0_grp {
|
||||
pinctrl-single,pins =<
|
||||
K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */
|
||||
K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */
|
||||
K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */
|
||||
K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */
|
||||
K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */
|
||||
K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */
|
||||
K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */
|
||||
K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */
|
||||
K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */
|
||||
K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */
|
||||
K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */
|
||||
K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */
|
||||
K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */
|
||||
K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */
|
||||
K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gmac1: gmac1_grp {
|
||||
pinctrl-single,pins =<
|
||||
K1X_PADCONF(GPIO_29, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rxdv */
|
||||
K1X_PADCONF(GPIO_30, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d0 */
|
||||
K1X_PADCONF(GPIO_31, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d1 */
|
||||
K1X_PADCONF(GPIO_32, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_clk */
|
||||
K1X_PADCONF(GPIO_33, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d2 */
|
||||
K1X_PADCONF(GPIO_34, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d3 */
|
||||
K1X_PADCONF(GPIO_35, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d0 */
|
||||
K1X_PADCONF(GPIO_36, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d1 */
|
||||
K1X_PADCONF(GPIO_37, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_tx */
|
||||
K1X_PADCONF(GPIO_38, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d2 */
|
||||
K1X_PADCONF(GPIO_39, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d3 */
|
||||
K1X_PADCONF(GPIO_40, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_en */
|
||||
K1X_PADCONF(GPIO_41, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdc */
|
||||
K1X_PADCONF(GPIO_42, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdio */
|
||||
K1X_PADCONF(GPIO_43, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_int_n */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio{
|
||||
gpio-ranges = <
|
||||
&pinctrl 49 GPIO_49 2
|
||||
&pinctrl 58 GPIO_58 1
|
||||
&pinctrl 63 GPIO_63 1
|
||||
/*&pinctrl 65 GPIO_65 1 */
|
||||
&pinctrl 67 GPIO_67 1
|
||||
&pinctrl 70 PRI_TDI 4
|
||||
/*&pinctrl 74 GPIO_74 1*/
|
||||
&pinctrl 79 GPIO_79 1
|
||||
&pinctrl 80 GPIO_80 4
|
||||
&pinctrl 90 GPIO_90 3
|
||||
&pinctrl 96 DVL0 2
|
||||
&pinctrl 110 GPIO_110 1
|
||||
&pinctrl 111 GPIO_111 1
|
||||
&pinctrl 113 GPIO_113 1
|
||||
&pinctrl 114 GPIO_114 3
|
||||
&pinctrl 118 GPIO_118 1
|
||||
&pinctrl 123 GPIO_123 5
|
||||
>;
|
||||
};
|
||||
|
||||
/* SD */
|
||||
&sdhci0 {
|
||||
pinctrl-names = "default","fast";
|
||||
pinctrl-0 = <&pinctrl_mmc1>;
|
||||
pinctrl-1 = <&pinctrl_mmc1_fast>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio 80 0>;
|
||||
cd-inverted;
|
||||
vmmc-supply = <&dcdc_4>;
|
||||
vqmmc-supply = <&ldo_1>;
|
||||
no-mmc;
|
||||
no-sdio;
|
||||
spacemit,sdh-host-caps-disable = <(
|
||||
MMC_CAP_UHS_SDR12 |
|
||||
MMC_CAP_UHS_SDR25
|
||||
)>;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
||||
SDHCI_QUIRK2_BROKEN_PHY_MODULE |
|
||||
SDHCI_QUIRK2_SET_AIB_MMC
|
||||
)>;
|
||||
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
|
||||
spacemit,apbc_asfar_reg = <0xD4015050>;
|
||||
spacemit,apbc_assar_reg = <0xD4015054>;
|
||||
spacemit,rx_dline_reg = <0x0>;
|
||||
spacemit,tx_dline_reg = <0x0>;
|
||||
spacemit,tx_delaycode = <0x9f>;
|
||||
spacemit,rx_tuning_limit = <50>;
|
||||
spacemit,sdh-freq = <204800000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* SDIO */
|
||||
&sdhci1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mmc2>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
vqmmc-supply = <&dcdc_3>;
|
||||
no-mmc;
|
||||
no-sd;
|
||||
keep-power-in-suspend;
|
||||
/* bcmdhd use private oob solution rather than dat1/standard wakeup */
|
||||
/delete-property/ enable-sdio-wakeup;
|
||||
spacemit,sdh-host-caps-disable = <(
|
||||
MMC_CAP_UHS_DDR50 |
|
||||
MMC_CAP_NEEDS_POLL
|
||||
)>;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
||||
SDHCI_QUIRK2_BROKEN_PHY_MODULE
|
||||
)>;
|
||||
spacemit,rx_dline_reg = <0x0>;
|
||||
spacemit,tx_delaycode = <0x9f>;
|
||||
spacemit,rx_tuning_limit = <50>;
|
||||
spacemit,sdh-freq = <375000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&sdhci2 {
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
||||
)>;
|
||||
spacemit,sdh-freq = <375000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac0>;
|
||||
|
||||
emac,reset-gpio = <&gpio 110 0>;
|
||||
emac,reset-active-low;
|
||||
emac,reset-delays-us = <0 10000 100000>;
|
||||
|
||||
/* store forward mode */
|
||||
tx-threshold = <1518>;
|
||||
rx-threshold = <12>;
|
||||
tx-ring-num = <1024>;
|
||||
rx-ring-num = <1024>;
|
||||
dma-burst-len = <5>;
|
||||
|
||||
ref-clock-from-phy;
|
||||
|
||||
clk-tuning-enable;
|
||||
clk-tuning-by-delayline;
|
||||
tx-phase = <60>;
|
||||
rx-phase = <73>;
|
||||
|
||||
nvmem-cells = <&mac_address0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy-handle = <&rgmii0>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
rgmii0: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac1>;
|
||||
|
||||
emac,reset-gpio = <&gpio 115 0>;
|
||||
emac,reset-active-low;
|
||||
emac,reset-delays-us = <0 10000 100000>;
|
||||
|
||||
/* store forward mode */
|
||||
tx-threshold = <1518>;
|
||||
rx-threshold = <12>;
|
||||
tx-ring-num = <1024>;
|
||||
rx-ring-num = <1024>;
|
||||
dma-burst-len = <5>;
|
||||
|
||||
ref-clock-from-phy;
|
||||
|
||||
clk-tuning-enable;
|
||||
clk-tuning-by-delayline;
|
||||
tx-phase = <90>;
|
||||
rx-phase = <73>;
|
||||
nvmem-cells = <&mac_address1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy-handle = <&rgmii1>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
rgmii1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc {
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci {
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
spacemit,reset-on-resume;
|
||||
status = "okay";
|
||||
};
|
||||
&otg {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "host";
|
||||
vbus-gpios = <&gpio 126 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&usbphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc1 {
|
||||
spacemit,udc-mode = <MV_USB_MODE_UDC>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
spacemit,udc-mode = <MV_USB_MODE_HOST>;
|
||||
spacemit,reset-on-resume;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&otg1 {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "host";
|
||||
vbus-gpios = <&gpio 123 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3hub {
|
||||
vbus-gpios = <&gpio 123 0>; /* gpio_123 for usb3 hub pwr and output vbus */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd3 {
|
||||
status = "okay";
|
||||
reset-on-resume;
|
||||
dwc3@c0a00000 {
|
||||
dr_mode = "otg";
|
||||
phy_type = "utmi";
|
||||
snps,hsphy_interface = "utmi";
|
||||
snps,dis_enblslpm_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis-del-phy-power-chg-quirk;
|
||||
snps,dis-tx-ipgap-linecheck-quirk;
|
||||
snps,parkmode-disable-ss-quirk;
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "host";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1_rc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie1_3>;
|
||||
k1x,pwr_on = <&gpio 116 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_rc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie2_4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&imggpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi>;
|
||||
status = "disabled";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <26500000>;
|
||||
m25p,fast-read;
|
||||
broken-flash-reset;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&ccic0 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&ccic1 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&ccic2 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&isp {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&cpp {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&vi {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&rcpu {
|
||||
/* pinctrl-names = "default"; */
|
||||
/* pinctrl-0 = <&pinctrl_rcpu>; */
|
||||
mboxes = <&mailbox 0>, <&mailbox 1>;
|
||||
mbox-names = "vq0", "vq1";
|
||||
memory-region = <&rcpu_mem_0>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&rsc_table>, <&rcpu_mem_snapshots>;
|
||||
status = "okay";
|
||||
};
|
||||
1193
patch/kernel/archive/spacemit-6.18/dt/x1_orangepi-rv2.dts
Normal file
1193
patch/kernel/archive/spacemit-6.18/dt/x1_orangepi-rv2.dts
Normal file
File diff suppressed because it is too large
Load Diff
@ -13,5 +13,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-bananapi-f3.dtb
|
||||
dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-musepi-pro.dtb
|
||||
dtb-$(CONFIG_SOC_SPACEMIT_K1X) += x1_orangepi-r2s.dtb
|
||||
dtb-$(CONFIG_SOC_SPACEMIT_K1X) += x1_orangepi-rv2.dtb
|
||||
|
||||
subdir-y += overlay
|
||||
|
||||
850
patch/kernel/archive/spacemit-6.6/dt/x1_orangepi-r2s.dts
Normal file
850
patch/kernel/archive/spacemit-6.6/dt/x1_orangepi-r2s.dts
Normal file
@ -0,0 +1,850 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/* Copyright (c) 2023 Ky, Inc */
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k1-x.dtsi"
|
||||
#include "k1-x-efuse.dtsi"
|
||||
#include "k1-x_pinctrl.dtsi"
|
||||
#include "lcd/lcd_ili9881c_mipi.dtsi"
|
||||
#include "k1-x-hdmi.dtsi"
|
||||
#include "k1-x-lcd.dtsi"
|
||||
#include "k1-x-camera-sdk.dtsi"
|
||||
#include "k1-x_opp_table.dtsi"
|
||||
#include "k1-x_thermal_cooling.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ky x1 orangepi-r2s board";
|
||||
compatible = "spacemit,orangepi-r2s", "spacemit,k1x";
|
||||
|
||||
cpus: cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
timebase-frequency = <24000000>;
|
||||
|
||||
cpu_0: cpu@0 {
|
||||
cpu-ai = "true";
|
||||
};
|
||||
|
||||
cpu_1: cpu@1 {
|
||||
cpu-ai = "true";
|
||||
};
|
||||
|
||||
cpu_2: cpu@2 {
|
||||
reg = <2>;
|
||||
cpu-ai = "true";
|
||||
};
|
||||
|
||||
cpu_3: cpu@3 {
|
||||
reg = <3>;
|
||||
cpu-ai = "true";
|
||||
};
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&cpu_0>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&cpu_1>;
|
||||
};
|
||||
|
||||
core2 {
|
||||
cpu = <&cpu_2>;
|
||||
};
|
||||
|
||||
core3 {
|
||||
cpu = <&cpu_3>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&cpu_4>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&cpu_5>;
|
||||
};
|
||||
|
||||
core2 {
|
||||
cpu = <&cpu_6>;
|
||||
};
|
||||
|
||||
core3 {
|
||||
cpu = <&cpu_7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
memory@100000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x1 0x00000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
/* alloc memory from 0x40000000~0x80000000 */
|
||||
alloc-ranges = <0 0x40000000 0 0x30000000>;
|
||||
/* size of cma buffer is 384MByte */
|
||||
size = <0 0x18000000>;
|
||||
/* start address is 1Mbyte aligned */
|
||||
alignment = <0x0 0x100000>;
|
||||
linux,cma-default;
|
||||
/* besides hardware, dma for ex. buffer can be used by memory management */
|
||||
reusable;
|
||||
};
|
||||
|
||||
/* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */
|
||||
dpu_resv: dpu_reserved@2ff40000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x0 0x2ff40000 0x0 0x000C0000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=sbi console=ttyS0,115200n8 loglevel=8 swiotlb=65536 rdinit=/init";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
dc_12v: dc-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_12v";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
vcc4v0_baseboard: vcc4v0-baseboard {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc4v0_baseboard";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <4000000>;
|
||||
regulator-max-microvolt = <4000000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led1 {
|
||||
label = "sys-led";
|
||||
gpios = <&gpio 96 0>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "on";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0_2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm14 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm14_1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
spacemit,i2c-fast-mode;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
spacemit,i2c-fast-mode;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2_0>;
|
||||
spacemit,i2c-fast-mode;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50{
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>;
|
||||
status = "okay";
|
||||
|
||||
mac_address0: mac_address0@0 {
|
||||
reg = <0x0 6>;
|
||||
};
|
||||
|
||||
mac_address1: mac_address1@6 {
|
||||
reg = <0x6 6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c8>;
|
||||
status = "okay";
|
||||
|
||||
spm8821@41 {
|
||||
compatible = "spacemit,spm8821";
|
||||
reg = <0x41>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <64>;
|
||||
status = "okay";
|
||||
|
||||
vcc_sys-supply = <&vcc4v0_baseboard>;
|
||||
dcdc5-supply = <&dcdc_5>;
|
||||
|
||||
regulators {
|
||||
compatible = "pmic,regulator,spm8821";
|
||||
|
||||
/* buck */
|
||||
dcdc_1: DCDC_REG1 {
|
||||
regulator-name = "dcdc1";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <650000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc_2: DCDC_REG2 {
|
||||
regulator-name = "dcdc2";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc_3: DCDC_REG3 {
|
||||
regulator-name = "dcdc3";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc_4: DCDC_REG4 {
|
||||
regulator-name = "dcdc4";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc_5: DCDC_REG5 {
|
||||
regulator-name = "dcdc5";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc_6: DCDC_REG6 {
|
||||
regulator-name = "dcdc6";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* aldo */
|
||||
ldo_1: LDO_REG1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
|
||||
/* set the min voltage means will disable this vol in suspend for ldo */
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_2: LDO_REG2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_3: LDO_REG3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_4: LDO_REG4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* dldo */
|
||||
ldo_5: LDO_REG5 {
|
||||
regulator-name = "ldo5";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_6: LDO_REG6 {
|
||||
regulator-name = "ldo6";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_7: LDO_REG7 {
|
||||
regulator-name = "ldo7";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_8: LDO_REG8 {
|
||||
regulator-name = "ldo8";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo_9: LDO_REG9 {
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
ldo_10: LDO_REG10 {
|
||||
regulator-name = "ldo10";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo_11: LDO_REG11 {
|
||||
regulator-name = "ldo11";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
sw_1: SWITCH_REG1 {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-name = "switch1";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmic_pinctrl: pinctrl {
|
||||
compatible = "pmic,pinctrl,spm8821";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
spacemit,npins = <6>;
|
||||
/**
|
||||
* led_pins: led-pins {
|
||||
* pins = "PIN3";
|
||||
* function = "sleep";
|
||||
* bias-disable = <0>;
|
||||
* drive-open-drain = <0x1>;
|
||||
* };
|
||||
*/
|
||||
};
|
||||
|
||||
pwr_key: key {
|
||||
compatible = "pmic,pwrkey,spm8821";
|
||||
};
|
||||
|
||||
ext_rtc: rtc {
|
||||
compatible = "pmic,rtc,spm8821";
|
||||
};
|
||||
|
||||
ext_adc: adc {
|
||||
compatible = "pmic,adc,spm8821";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-single,gpio-range = <
|
||||
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
||||
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
||||
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
/*&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) */
|
||||
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
||||
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
>;
|
||||
|
||||
/* pinctrl_rcpu: pinctrl_rcpu_grp { */
|
||||
/* pinctrl-single,pins = < */
|
||||
/* K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /1* r_uart0_tx *1/ */
|
||||
/* K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /1* r_uart0_rx *1/ */
|
||||
/* >; */
|
||||
/* }; */
|
||||
|
||||
pinctrl_gmac0: gmac0_grp {
|
||||
pinctrl-single,pins =<
|
||||
K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */
|
||||
K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */
|
||||
K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */
|
||||
K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */
|
||||
K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */
|
||||
K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */
|
||||
K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */
|
||||
K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */
|
||||
K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */
|
||||
K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */
|
||||
K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */
|
||||
K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */
|
||||
K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */
|
||||
K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */
|
||||
K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gmac1: gmac1_grp {
|
||||
pinctrl-single,pins =<
|
||||
K1X_PADCONF(GPIO_29, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rxdv */
|
||||
K1X_PADCONF(GPIO_30, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d0 */
|
||||
K1X_PADCONF(GPIO_31, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d1 */
|
||||
K1X_PADCONF(GPIO_32, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_clk */
|
||||
K1X_PADCONF(GPIO_33, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d2 */
|
||||
K1X_PADCONF(GPIO_34, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d3 */
|
||||
K1X_PADCONF(GPIO_35, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d0 */
|
||||
K1X_PADCONF(GPIO_36, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d1 */
|
||||
K1X_PADCONF(GPIO_37, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_tx */
|
||||
K1X_PADCONF(GPIO_38, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d2 */
|
||||
K1X_PADCONF(GPIO_39, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d3 */
|
||||
K1X_PADCONF(GPIO_40, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_en */
|
||||
K1X_PADCONF(GPIO_41, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdc */
|
||||
K1X_PADCONF(GPIO_42, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdio */
|
||||
K1X_PADCONF(GPIO_43, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_int_n */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio{
|
||||
gpio-ranges = <
|
||||
&pinctrl 49 GPIO_49 2
|
||||
&pinctrl 58 GPIO_58 1
|
||||
&pinctrl 63 GPIO_63 1
|
||||
/*&pinctrl 65 GPIO_65 1 */
|
||||
&pinctrl 67 GPIO_67 1
|
||||
&pinctrl 70 PRI_TDI 4
|
||||
/*&pinctrl 74 GPIO_74 1*/
|
||||
&pinctrl 79 GPIO_79 1
|
||||
&pinctrl 80 GPIO_80 4
|
||||
&pinctrl 90 GPIO_90 3
|
||||
&pinctrl 96 DVL0 2
|
||||
&pinctrl 110 GPIO_110 1
|
||||
&pinctrl 111 GPIO_111 1
|
||||
&pinctrl 113 GPIO_113 1
|
||||
&pinctrl 114 GPIO_114 3
|
||||
&pinctrl 118 GPIO_118 1
|
||||
&pinctrl 123 GPIO_123 5
|
||||
>;
|
||||
};
|
||||
|
||||
/* SD */
|
||||
&sdhci0 {
|
||||
pinctrl-names = "default","fast";
|
||||
pinctrl-0 = <&pinctrl_mmc1>;
|
||||
pinctrl-1 = <&pinctrl_mmc1_fast>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio 80 0>;
|
||||
cd-inverted;
|
||||
vmmc-supply = <&dcdc_4>;
|
||||
vqmmc-supply = <&ldo_1>;
|
||||
no-mmc;
|
||||
no-sdio;
|
||||
spacemit,sdh-host-caps-disable = <(
|
||||
MMC_CAP_UHS_SDR12 |
|
||||
MMC_CAP_UHS_SDR25
|
||||
)>;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
||||
SDHCI_QUIRK2_BROKEN_PHY_MODULE |
|
||||
SDHCI_QUIRK2_SET_AIB_MMC
|
||||
)>;
|
||||
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
|
||||
spacemit,apbc_asfar_reg = <0xD4015050>;
|
||||
spacemit,apbc_assar_reg = <0xD4015054>;
|
||||
spacemit,rx_dline_reg = <0x0>;
|
||||
spacemit,tx_dline_reg = <0x0>;
|
||||
spacemit,tx_delaycode = <0x9f>;
|
||||
spacemit,rx_tuning_limit = <50>;
|
||||
spacemit,sdh-freq = <204800000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* SDIO */
|
||||
&sdhci1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mmc2>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
vqmmc-supply = <&dcdc_3>;
|
||||
no-mmc;
|
||||
no-sd;
|
||||
keep-power-in-suspend;
|
||||
/* bcmdhd use private oob solution rather than dat1/standard wakeup */
|
||||
/delete-property/ enable-sdio-wakeup;
|
||||
spacemit,sdh-host-caps-disable = <(
|
||||
MMC_CAP_UHS_DDR50 |
|
||||
MMC_CAP_NEEDS_POLL
|
||||
)>;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
||||
SDHCI_QUIRK2_BROKEN_PHY_MODULE
|
||||
)>;
|
||||
spacemit,rx_dline_reg = <0x0>;
|
||||
spacemit,tx_delaycode = <0x9f>;
|
||||
spacemit,rx_tuning_limit = <50>;
|
||||
spacemit,sdh-freq = <375000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&sdhci2 {
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
||||
)>;
|
||||
spacemit,sdh-freq = <375000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac0>;
|
||||
|
||||
emac,reset-gpio = <&gpio 110 0>;
|
||||
emac,reset-active-low;
|
||||
emac,reset-delays-us = <0 10000 100000>;
|
||||
|
||||
/* store forward mode */
|
||||
tx-threshold = <1518>;
|
||||
rx-threshold = <12>;
|
||||
tx-ring-num = <1024>;
|
||||
rx-ring-num = <1024>;
|
||||
dma-burst-len = <5>;
|
||||
|
||||
ref-clock-from-phy;
|
||||
|
||||
clk-tuning-enable;
|
||||
clk-tuning-by-delayline;
|
||||
tx-phase = <60>;
|
||||
rx-phase = <73>;
|
||||
|
||||
nvmem-cells = <&mac_address0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy-handle = <&rgmii0>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
rgmii0: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac1>;
|
||||
|
||||
emac,reset-gpio = <&gpio 115 0>;
|
||||
emac,reset-active-low;
|
||||
emac,reset-delays-us = <0 10000 100000>;
|
||||
|
||||
/* store forward mode */
|
||||
tx-threshold = <1518>;
|
||||
rx-threshold = <12>;
|
||||
tx-ring-num = <1024>;
|
||||
rx-ring-num = <1024>;
|
||||
dma-burst-len = <5>;
|
||||
|
||||
ref-clock-from-phy;
|
||||
|
||||
clk-tuning-enable;
|
||||
clk-tuning-by-delayline;
|
||||
tx-phase = <90>;
|
||||
rx-phase = <73>;
|
||||
nvmem-cells = <&mac_address1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy-handle = <&rgmii1>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
rgmii1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc {
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci {
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
spacemit,reset-on-resume;
|
||||
status = "okay";
|
||||
};
|
||||
&otg {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "host";
|
||||
vbus-gpios = <&gpio 126 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&usbphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc1 {
|
||||
spacemit,udc-mode = <MV_USB_MODE_UDC>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
spacemit,udc-mode = <MV_USB_MODE_HOST>;
|
||||
spacemit,reset-on-resume;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&otg1 {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "host";
|
||||
vbus-gpios = <&gpio 123 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3hub {
|
||||
vbus-gpios = <&gpio 123 0>; /* gpio_123 for usb3 hub pwr and output vbus */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd3 {
|
||||
status = "okay";
|
||||
reset-on-resume;
|
||||
dwc3@c0a00000 {
|
||||
dr_mode = "otg";
|
||||
phy_type = "utmi";
|
||||
snps,hsphy_interface = "utmi";
|
||||
snps,dis_enblslpm_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis-del-phy-power-chg-quirk;
|
||||
snps,dis-tx-ipgap-linecheck-quirk;
|
||||
snps,parkmode-disable-ss-quirk;
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "host";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1_rc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie1_3>;
|
||||
k1x,pwr_on = <&gpio 116 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_rc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie2_4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&imggpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi>;
|
||||
status = "disabled";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <26500000>;
|
||||
m25p,fast-read;
|
||||
broken-flash-reset;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&ccic0 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&ccic1 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&ccic2 {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
&isp {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&cpp {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&vi {
|
||||
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
||||
};
|
||||
|
||||
&rcpu {
|
||||
/* pinctrl-names = "default"; */
|
||||
/* pinctrl-0 = <&pinctrl_rcpu>; */
|
||||
mboxes = <&mailbox 0>, <&mailbox 1>;
|
||||
mbox-names = "vq0", "vq1";
|
||||
memory-region = <&rcpu_mem_0>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&rsc_table>, <&rcpu_mem_snapshots>;
|
||||
status = "okay";
|
||||
};
|
||||
1193
patch/kernel/archive/spacemit-6.6/dt/x1_orangepi-rv2.dts
Normal file
1193
patch/kernel/archive/spacemit-6.6/dt/x1_orangepi-rv2.dts
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user