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add more UARTs and SPIs to R40

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This commit is contained in:
Martin Ayotte 2020-02-05 17:08:43 -05:00
parent 1a587bfa71
commit 94f27962e1
5 changed files with 364 additions and 36 deletions
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24
patch/kernel/sunxi-dev/add-uart2_pi_pins-to-sun8i-r40.patch → patch/kernel/sunxi-dev/add-more-uart-pins-to-sun8i-r40.patch
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@ -14,3 +14,27 @@ index 421dfbb..ae64248 100644
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
@@ -412,6 +463,23 @@
pins = "PG8", "PG9";
function = "uart3";
};
+
+ uart4_ph_pins: uart4-ph-pins {
+ pins = "PH4", "PH5";
+ function = "uart4";
+ };
+
+
+ uart5_ph_pins: uart5-ph-pins {
+ pins = "PH6", "PH7";
+ function = "uart5";
+ };
+
+ uart7_pi_pins: uart7-pi-pins {
+ pins = "PI20", "PI21";
+ function = "uart7";
+ };
+
};
wdt: watchdog@1c20c90 {

84
patch/kernel/sunxi-dev/add-more-uarts-bpim2ultra-bpim2berry.patch Normal file
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@ -0,0 +1,84 @@
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 42d62d1..35bba4e 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -305,6 +305,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
@@ -324,6 +330,24 @@
};
};
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_ph_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_ph_pins>;
+ status = "disabled";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pi_pins>;
+ status = "disabled";
+};
+
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
usb2_vbus-supply = <&reg_vcc5v0>;
diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index 15c22b0..967833c 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -280,6 +280,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
@@ -299,6 +305,24 @@
};
};
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_ph_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_ph_pins>;
+ status = "disabled";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pi_pins>;
+ status = "disabled";
+};
+
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";

70
patch/kernel/sunxi-dev/add-spi0-spi1-to-sun8i-r40.patch Normal file
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@ -0,0 +1,70 @@
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 421dfbb..979c12a 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -398,6 +415,26 @@
bias-pull-up;
};
+ spi0_pins: spi0-pins {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
+ spi0_cs_pin: spi0-cs-pin {
+ pins = "PC23";
+ function = "spi0";
+ };
+
+ spi1_pins: spi1-pins {
+ pins = "PI17", "PI18", "PI19", "PI16";
+ function = "spi1";
+ };
+
+ spi1_cs_pin: spi1-cs-pin {
+ pins = "PI16";
+ function = "spi1";
+ };
+
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
@@ -414,6 +446,38 @@
};
};
+ spi0: spi@1c05000 {
+ compatible = "allwinner,sun8i-r40-spi", "allwinner,sun8i-h3-spi";
+ reg = <0x01c05000 0x1000>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+// dmas = <&dma 23>, <&dma 23>;
+// dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@1c06000 {
+ compatible = "allwinner,sun8i-r40-spi", "allwinner,sun8i-h3-spi";
+ reg = <0x01c06000 0x1000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ clock-names = "ahb", "mod";
+// dmas = <&dma 24>, <&dma 24>;
+// dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs_pin>;
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
wdt: watchdog@1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;

34
patch/kernel/sunxi-dev/add-uart2-bpim2ultra-bpim2berry.patch
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@ -1,34 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 42d62d1..4a8362e 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -305,6 +305,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "okay";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index 15c22b0..5c0b7ba 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -280,6 +280,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "okay";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;

188
patch/kernel/sunxi-dev/general-sunxi-overlays.patch
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@ -13,7 +13,7 @@ new file mode 100644
index 0000000..39d6a27
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,89 @@
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_MACH_SUN4I) += \
+ sun4i-a10-analog-codec.dtbo \
@ -92,7 +92,13 @@ index 0000000..39d6a27
+ sun8i-h3-usbhost1.dtbo \
+ sun8i-h3-usbhost2.dtbo \
+ sun8i-h3-usbhost3.dtbo \
+ sun8i-h3-w1-gpio.dtbo
+ sun8i-h3-w1-gpio.dtbo \
+ sun8i-r40-spi-spidev0.dtbo \
+ sun8i-r40-spi-spidev1.dtbo \
+ sun8i-r40-uart2.dtbo \
+ sun8i-r40-uart4.dtbo \
+ sun8i-r40-uart5.dtbo \
+ sun8i-r40-uart7.dtbo
+
+scr-$(CONFIG_MACH_SUN4I) += sun4i-a10-fixup.scr
+scr-$(CONFIG_MACH_SUN5I) += sun5i-a13-fixup.scr
@ -4520,6 +4526,184 @@ index 0000000..f4ccb7f
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev0.dts b/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev0.dts
new file mode 100644
index 0000000..734a9a8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev0.dts
@@ -0,0 +1,27 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi0 = "/soc/spi@1c05000";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ #address-cells = <0x00000001>;
+ #size-cells = <0x00000000>;
+ status = "okay";
+ spidev@0 {
+ compatible = "spidev";
+ status = "okay";
+ reg = <0x00000000>;
+ spi-max-frequency = <0x000f4240>;
+ };
+ };
+ };
+ __fixups__ {
+ spi0 = "/fragment@1:target:0";
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev1.dts b/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev1.dts
new file mode 100644
index 0000000..d1d637c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev1.dts
@@ -0,0 +1,27 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi1 = "/soc/spi@1c06000";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ #address-cells = <0x00000001>;
+ #size-cells = <0x00000000>;
+ status = "okay";
+ spidev@0 {
+ compatible = "spidev";
+ status = "okay";
+ reg = <0x00000000>;
+ spi-max-frequency = <0x000f4240>;
+ };
+ };
+ };
+ __fixups__ {
+ spi1 = "/fragment@1:target:0";
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-uart2.dts b/arch/arm/boot/dts/overlay/sun8i-r40-uart2.dts
new file mode 100644
index 0000000..65e946d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-uart2.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ serial2 = "/soc/serial@1c28800";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <0xffffffff>;
+ status = "okay";
+ };
+ };
+ __fixups__ {
+ uart2 = "/fragment@1:target:0";
+ uart2_pi_pins = "/fragment@1/__overlay__:pinctrl-0:0";
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-uart4.dts b/arch/arm/boot/dts/overlay/sun8i-r40-uart4.dts
new file mode 100644
index 0000000..65e946d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-uart4.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ serial4 = "/soc/serial@1c29000";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <0xffffffff>;
+ status = "okay";
+ };
+ };
+ __fixups__ {
+ uart4 = "/fragment@1:target:0";
+ uart4_ph_pins = "/fragment@1/__overlay__:pinctrl-0:0";
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-uart5.dts b/arch/arm/boot/dts/overlay/sun8i-r40-uart5.dts
new file mode 100644
index 0000000..65e946d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-uart5.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ serial5 = "/soc/serial@1c29400";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <0xffffffff>;
+ status = "okay";
+ };
+ };
+ __fixups__ {
+ uart5 = "/fragment@1:target:0";
+ uart5_ph_pins = "/fragment@1/__overlay__:pinctrl-0:0";
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-uart7.dts b/arch/arm/boot/dts/overlay/sun8i-r40-uart7.dts
new file mode 100644
index 0000000..65e946d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-r40-uart7.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/ {
+ compatible = "allwinner,sun8i-r40";
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ serial7 = "/soc/serial@1c29c00";
+ };
+ };
+ fragment@1 {
+ target = <0xffffffff>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <0xffffffff>;
+ status = "okay";
+ };
+ };
+ __fixups__ {
+ uart7 = "/fragment@1:target:0";
+ uart7_pi_pins = "/fragment@1/__overlay__:pinctrl-0:0";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index fa35163..89df4ff 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile