bump rk3288 tinkerboard to uboot v2024.07
* also bump: * rk3288 xt-q8l-v10 target * rk322x-box target (was already v2024.07-rc5) * rk3318-box target (was already v2024.07-rc5)
This commit is contained in:
parent
ab1e97c069
commit
87b90295ea
@ -9,7 +9,7 @@ BOOT_SCENARIO="tpl-blob-atf-mainline"
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DDR_BLOB="rk33/rk3318_ddr_333Mhz_v1.16.bin"
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BOOT_SOC="rk3328"
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BOOTBRANCH_BOARD="tag:v2024.07-rc5"
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BOOTBRANCH_BOARD="tag:v2024.07"
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BOOTPATCHDIR="v2024.07"
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enable_extension xorg-lima-serverflags
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@ -2,8 +2,7 @@
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BOARD_NAME="Tinker Board"
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BOARDFAMILY="rockchip"
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BOARD_MAINTAINER="paolosabatino"
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BOOTCONFIG="tinker-rk3288_defconfig"
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MODULES_LEGACY="hci_uart rfcomm hidp 8723bs"
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BOOTCONFIG="tinker-s-rk3288_defconfig"
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DEFAULT_OVERLAYS="i2c1 i2c4 spi2 spidev2 uart1 uart2"
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KERNEL_TARGET="current,edge"
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KERNEL_TEST_TARGET="current,edge"
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@ -21,10 +21,12 @@ if [[ "$BOOT_SOC" == "rk3288" ]]; then
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BOOTSCRIPT="boot-rockchip.cmd:boot.cmd"
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BOOTENV_FILE='rockchip.txt'
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OVERLAY_PREFIX='rockchip'
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UBOOT_TARGET_MAP=";;$SRC/packages/blobs/rockchip/rk3288_boot.bin u-boot-rockchip-with-spl.bin"
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UBOOT_TARGET_MAP=";;u-boot-rockchip-with-spl.bin"
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BOOTBRANCH='tag:v2022.04'
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BOOTPATCHDIR='v2022.04'
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[[ "$BOARD" == "xt-q8l-v10" ]] && UBOOT_TARGET_MAP="ROCKCHIP_TPL=$SRC/cache/sources/rkbin-tools/rk32/rk3288_ddr_400MHz_v1.08.bin;;u-boot-rockchip-with-spl.bin"
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BOOTBRANCH='tag:v2024.07'
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BOOTPATCHDIR='v2024.07'
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if [[ $BOARD == miqi ]]; then
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BOOTBRANCH='tag:v2017.11'
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@ -42,7 +44,7 @@ elif [[ "$BOOT_SOC" == "rk322x" ]]; then
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OVERLAY_PREFIX='rk322x'
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UBOOT_TARGET_MAP="ROCKCHIP_TPL=$SRC/packages/blobs/rockchip/rk322x_ddr_333MHz_v1.11_2t.bin TEE=$SRC/packages/blobs/rockchip/rk322x_tee.bin;;u-boot-rk322x-with-spl.bin"
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BOOTBRANCH='tag:v2024.07-rc5'
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BOOTBRANCH='tag:v2024.07'
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BOOTPATCHDIR='v2024.07'
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fi
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@ -86,13 +88,19 @@ if [[ "$BOOT_SOC" == "rk3288" ]]; then
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# which is thrown away. SPL does some more initial configurations, expecially pinmux for power hold,
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# so reset works more reliably. U-boot image is set to be at sector 0x200 on the eMMC/SD,
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# so we burn it 0x200-0x40 because of the rockchip 0x40 sectors offset.
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if [[ "$BOARD" == "xt-q8l-v10" ]]; then
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run_host_command_logged tools/mkimage -n rk3288 -T rksd -d $SRC/cache/sources/rkbin-tools/rk32/rk3288_ddr_400MHz_v1.08.bin u-boot-rockchip-with-spl.bin
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else
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run_host_command_logged tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin u-boot-rockchip-with-spl.bin
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fi
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run_host_command_logged cat spl/u-boot-spl-dtb.bin >> u-boot-rockchip-with-spl.bin
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#
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# As of uboot v2024.07, binman takes care of building the idbloader. We just use it as the first
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# part of u-boot-rockchip-with-spl.bin file. We keep here the mkimage commands for reference:
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#
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# if [[ "$BOARD" == "xt-q8l-v10" ]]; then
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# run_host_command_logged tools/mkimage -n rk3288 -T rksd -d $SRC/cache/sources/rkbin-tools/rk32/rk3288_ddr_400MHz_v1.08.bin u-boot-rockchip-with-spl.bin
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# else
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# run_host_command_logged tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin u-boot-rockchip-with-spl.bin
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# fi
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#
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# run_host_command_logged cat spl/u-boot-spl-dtb.bin >> u-boot-rockchip-with-spl.bin
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run_host_command_logged cat idbloader.img > u-boot-rockchip-with-spl.bin
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run_host_command_logged dd if=u-boot-dtb.img of=u-boot-rockchip-with-spl.bin seek=$((0x200 - 0x40)) conv=notrunc
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}
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@ -1,73 +0,0 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Thu, 24 Mar 2022 09:21:56 +0000
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Subject: [ARCHEOLOGY] rockchip: fix kernel device tree in u-boot
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> X-Git-Archeology: - Revision 2cbd35f3b2fbc90e4c93f3c1669fcd0f459d08a4: https://github.com/armbian/build/commit/2cbd35f3b2fbc90e4c93f3c1669fcd0f459d08a4
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> X-Git-Archeology: Date: Thu, 24 Mar 2022 09:21:56 +0000
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> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
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> X-Git-Archeology: Subject: rockchip: fix kernel device tree in u-boot
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> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 445062b8dc243c55381db7f5a579a08ca6a0d73a: https://github.com/armbian/build/commit/445062b8dc243c55381db7f5a579a08ca6a0d73a
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||||
> X-Git-Archeology: Date: Thu, 24 Mar 2022 09:21:56 +0000
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> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
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> X-Git-Archeology: Subject: rockchip: advance tinkerboard u-boot to v2022.01
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> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision c674bac80c15025081086ef481e31365dddc74c2: https://github.com/armbian/build/commit/c674bac80c15025081086ef481e31365dddc74c2
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> X-Git-Archeology: Date: Thu, 24 Mar 2022 09:21:56 +0000
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||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
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> X-Git-Archeology: Subject: rockchip: advance tinkerboard u-boot to v2021.01
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||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision de26797423e22d58ec2882d7032c67f77196ecc5: https://github.com/armbian/build/commit/de26797423e22d58ec2882d7032c67f77196ecc5
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||||
> X-Git-Archeology: Date: Sun, 06 Nov 2022 20:32:46 +0100
|
||||
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Move all legacy u-boot patches under one general legacy folder (#4386)
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||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
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> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
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> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
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> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
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> X-Git-Archeology:
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---
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configs/tinker-rk3288_defconfig | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
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index 111111111111..222222222222 100644
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--- a/configs/tinker-rk3288_defconfig
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+++ b/configs/tinker-rk3288_defconfig
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@@ -18,11 +18,12 @@ CONFIG_DEBUG_UART=y
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CONFIG_SYS_LOAD_ADDR=0x800800
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_USE_PREBOOT=y
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-CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
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+CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb"
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CONFIG_SILENT_CONSOLE=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_I2C=y
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CONFIG_SPL_POWER=y
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CONFIG_CMD_GPIO=y
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@@ -76,6 +77,7 @@ CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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+CONFIG_DM_RESET=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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@@ -86,6 +88,9 @@ CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_MANUFACTURER="ASUS"
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+CONFIG_USB_GADGET_VENDOR_NUM=0x0b05
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+CONFIG_USB_GADGET_PRODUCT_NUM=0x7820
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_DM_VIDEO=y
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CONFIG_DISPLAY=y
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--
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Armbian
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@ -1,48 +0,0 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sat, 19 Mar 2022 21:37:32 +0000
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Subject: rk3288: add emmc to tinkerboard dts
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---
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arch/arm/dts/rk3288-tinker-u-boot.dtsi | 4 ++++
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arch/arm/dts/rk3288-tinker.dts | 12 ++++++++++
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2 files changed, 16 insertions(+)
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diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
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index 111111111111..222222222222 100644
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--- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi
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+++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
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@@ -36,6 +36,10 @@
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u-boot,dm-pre-reloc;
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};
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+&emmc {
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+ u-boot,dm-spl;
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+};
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+
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&sdmmc {
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u-boot,dm-spl;
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};
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diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
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index 111111111111..222222222222 100644
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--- a/arch/arm/dts/rk3288-tinker.dts
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+++ b/arch/arm/dts/rk3288-tinker.dts
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@@ -31,3 +31,15 @@
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vbus-supply = <&vcc5v0_host>;
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status = "okay";
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};
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+
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+&emmc {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
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+ max-frequency = <150000000>;
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+ mmc-hs200-1_8v;
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+ mmc-ddr-1_8v;
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+ status = "okay";
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+};
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--
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Armbian
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@ -1,55 +0,0 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sat, 19 Mar 2022 12:58:06 +0000
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Subject: rk3288: tinkerboard-s emmc boot
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---
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include/configs/tinker_rk3288.h | 9 +--------
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1 file changed, 1 insertion(+), 8 deletions(-)
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diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
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index 111111111111..222222222222 100644
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--- a/include/configs/tinker_rk3288.h
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+++ b/include/configs/tinker_rk3288.h
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@@ -13,13 +13,6 @@
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#include <configs/rk3288_common.h>
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-#undef BOOT_TARGET_DEVICES
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-
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-#define BOOT_TARGET_DEVICES(func) \
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- func(MMC, mmc, 0) \
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- func(MMC, mmc, 1) \
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- func(USB, usb, 0) \
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- func(PXE, pxe, na) \
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- func(DHCP, dchp, na)
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+#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif
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--
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Armbian
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sat, 19 Mar 2022 13:05:33 +0000
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Subject: rk3288: fix redefined symbol
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---
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include/configs/tinker_rk3288.h | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
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index 111111111111..222222222222 100644
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--- a/include/configs/tinker_rk3288.h
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+++ b/include/configs/tinker_rk3288.h
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@@ -13,6 +13,7 @@
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#include <configs/rk3288_common.h>
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+#undef CONFIG_SYS_MMC_ENV_DEV
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif
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--
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Armbian
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@ -1,52 +0,0 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: zador-blood-stained <zador-blood-stained@users.noreply.github.com>
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Date: Tue, 31 Oct 2017 21:23:43 +0300
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Subject: [ARCHEOLOGY] Add mvebu dev branch
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> X-Git-Archeology: > recovered message: > It uses the same kernel as next, but it uses mainline u-boot with DT
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> X-Git-Archeology: > recovered message: > overlay support, but without SPI, USB and possibly SATA support
|
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> X-Git-Archeology: - Revision aba730f4880b20f7ba37504a8d1d6bc484f28c54: https://github.com/armbian/build/commit/aba730f4880b20f7ba37504a8d1d6bc484f28c54
|
||||
> X-Git-Archeology: Date: Tue, 31 Oct 2017 21:23:43 +0300
|
||||
> X-Git-Archeology: From: zador-blood-stained <zador-blood-stained@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Add mvebu dev branch
|
||||
> X-Git-Archeology:
|
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> X-Git-Archeology: - Revision e71d1560f0429d9ecbc077ac457c6247735e3e9a: https://github.com/armbian/build/commit/e71d1560f0429d9ecbc077ac457c6247735e3e9a
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> X-Git-Archeology: Date: Fri, 23 Nov 2018 15:39:23 +0100
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||||
> X-Git-Archeology: From: aprayoga <aprayoga@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Helios4: various updates (#1161)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 3a185c8b8262a3189fd99fedc4350d738e825d0d: https://github.com/armbian/build/commit/3a185c8b8262a3189fd99fedc4350d738e825d0d
|
||||
> X-Git-Archeology: Date: Thu, 13 Dec 2018 19:04:47 -0500
|
||||
> X-Git-Archeology: From: Thomas McKahan <tonymckahan@gmail.com>
|
||||
> X-Git-Archeology: Subject: [ rockchip-dev ] Add DT overlay framework
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision de26797423e22d58ec2882d7032c67f77196ecc5: https://github.com/armbian/build/commit/de26797423e22d58ec2882d7032c67f77196ecc5
|
||||
> X-Git-Archeology: Date: Sun, 06 Nov 2022 20:32:46 +0100
|
||||
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Move all legacy u-boot patches under one general legacy folder (#4386)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
|
||||
> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
|
||||
> X-Git-Archeology:
|
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---
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arch/arm/Kconfig | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
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index 111111111111..222222222222 100644
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
|
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@@ -1908,6 +1908,8 @@ config ARCH_ROCKCHIP
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select DM_SPI
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select DM_SPI_FLASH
|
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select ENABLE_ARM_SOC_BOOT0_HOOK
|
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+ select OF_LIBFDT
|
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+ select OF_LIBFDT_OVERLAY
|
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select OF_CONTROL
|
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select SPI
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select SPL_DM if SPL
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--
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Armbian
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||||
@ -1,362 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sun, 4 Apr 2021 10:29:29 +0000
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Subject: Enable rockchip efuse for rk322x, rk3288 and rk3328
|
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|
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---
|
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arch/arm/dts/rk322x.dtsi | 14 +
|
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arch/arm/dts/rk3288.dtsi | 3 +-
|
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configs/evb-rk3229_defconfig | 3 +
|
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configs/evb-rk3328_defconfig | 3 +
|
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configs/miqi-rk3288_defconfig | 2 +
|
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configs/rock64-rk3328_defconfig | 2 +
|
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configs/tinker-rk3288_defconfig | 1 +
|
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configs/tinker-s-rk3288_defconfig | 1 +
|
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drivers/misc/rockchip-efuse.c | 142 +++++++++-
|
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include/dt-bindings/clock/rk3228-cru.h | 4 +
|
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10 files changed, 169 insertions(+), 6 deletions(-)
|
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|
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diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
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index 111111111111..222222222222 100644
|
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--- a/arch/arm/dts/rk322x.dtsi
|
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+++ b/arch/arm/dts/rk322x.dtsi
|
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@@ -212,6 +212,20 @@
|
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status = "disabled";
|
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};
|
||||
|
||||
+ efuse: efuse@11040000 {
|
||||
+ compatible = "rockchip,rk3228-efuse", "rockchip,rk3288-efuse";
|
||||
+ reg = <0x11040000 0x20>;
|
||||
+ clocks = <&cru PCLK_EFUSE_256>;
|
||||
+ clock-names = "pclk_efuse";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ /* Data cells */
|
||||
+ cpu_id: cpu_id@7 {
|
||||
+ reg = <0x7 0x10>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
i2c0: i2c@11050000 {
|
||||
compatible = "rockchip,rk3228-i2c";
|
||||
reg = <0x11050000 0x1000>;
|
||||
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/arch/arm/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/dts/rk3288.dtsi
|
||||
@@ -919,8 +919,7 @@
|
||||
|
||||
efuse: efuse@ffb40000 {
|
||||
compatible = "rockchip,rk3288-efuse";
|
||||
- reg = <0xffb40000 0x10000>;
|
||||
- status = "disabled";
|
||||
+ reg = <0xffb40000 0x20>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@ffc01000 {
|
||||
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/evb-rk3229_defconfig
|
||||
+++ b/configs/evb-rk3229_defconfig
|
||||
@@ -54,6 +54,8 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
@@ -73,3 +75,4 @@ CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
CONFIG_TPL_TINY_MEMSET=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/evb-rk3328_defconfig
|
||||
+++ b/configs/evb-rk3328_defconfig
|
||||
@@ -22,6 +22,7 @@ CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
@@ -58,6 +59,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/miqi-rk3288_defconfig
|
||||
+++ b/configs/miqi-rk3288_defconfig
|
||||
@@ -52,6 +52,8 @@ CONFIG_SPL_CLK=y
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/rock64-rk3328_defconfig
|
||||
+++ b/configs/rock64-rk3328_defconfig
|
||||
@@ -59,6 +59,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/tinker-rk3288_defconfig
|
||||
+++ b/configs/tinker-rk3288_defconfig
|
||||
@@ -56,6 +56,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/configs/tinker-s-rk3288_defconfig
|
||||
+++ b/configs/tinker-s-rk3288_defconfig
|
||||
@@ -57,6 +57,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/misc/rockchip-efuse.c
|
||||
+++ b/drivers/misc/rockchip-efuse.c
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/delay.h>
|
||||
#include <misc.h>
|
||||
+#include <stdlib.h>
|
||||
|
||||
#define RK3399_A_SHIFT 16
|
||||
#define RK3399_A_MASK 0x3ff
|
||||
@@ -27,6 +28,24 @@
|
||||
#define RK3399_STROBE BIT(1)
|
||||
#define RK3399_CSB BIT(0)
|
||||
|
||||
+#define RK3288_A_SHIFT 6
|
||||
+#define RK3288_A_MASK 0x3ff
|
||||
+#define RK3288_NFUSES 32
|
||||
+#define RK3288_BYTES_PER_FUSE 1
|
||||
+#define RK3288_PGENB BIT(3)
|
||||
+#define RK3288_LOAD BIT(2)
|
||||
+#define RK3288_STROBE BIT(1)
|
||||
+#define RK3288_CSB BIT(0)
|
||||
+
|
||||
+#define RK3328_INT_STATUS 0x0018
|
||||
+#define RK3328_DOUT 0x0020
|
||||
+#define RK3328_AUTO_CTRL 0x0024
|
||||
+#define RK3328_INT_FINISH BIT(0)
|
||||
+#define RK3328_AUTO_ENB BIT(0)
|
||||
+#define RK3328_AUTO_RD BIT(1)
|
||||
+
|
||||
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
|
||||
+
|
||||
struct rockchip_efuse_regs {
|
||||
u32 ctrl; /* 0x00 efuse control register */
|
||||
u32 dout; /* 0x04 efuse data out register */
|
||||
@@ -35,6 +54,10 @@ struct rockchip_efuse_regs {
|
||||
u32 jtag_pass; /* 0x10 JTAG password */
|
||||
u32 strobe_finish_ctrl;
|
||||
/* 0x14 efuse strobe finish control register */
|
||||
+ u32 int_status;/* 0x18 */
|
||||
+ u32 reserved; /* 0x1c */
|
||||
+ u32 dout2; /* 0x20 */
|
||||
+ u32 auto_ctrl; /* 0x24 */
|
||||
};
|
||||
|
||||
struct rockchip_efuse_plat {
|
||||
@@ -53,7 +76,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
|
||||
*/
|
||||
|
||||
struct udevice *dev;
|
||||
- u8 fuses[128];
|
||||
+ u8 fuses[128] = {0};
|
||||
int ret;
|
||||
|
||||
/* retrieve the device */
|
||||
@@ -77,7 +100,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
- rk3399_dump_efuses, 1, 1, dump_efuses,
|
||||
+ rockchip_dump_efuses, 1, 1, dump_efuses,
|
||||
"Dump the content of the efuses",
|
||||
""
|
||||
);
|
||||
@@ -127,10 +150,110 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
|
||||
+ void *buf, int size)
|
||||
+{
|
||||
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
|
||||
+ struct rockchip_efuse_regs *efuse =
|
||||
+ (struct rockchip_efuse_regs *)plat->base;
|
||||
+ u8 *buffer = buf;
|
||||
+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
|
||||
+
|
||||
+ if (size > (max_size - offset))
|
||||
+ size = max_size - offset;
|
||||
+
|
||||
+ /* Switch to read mode */
|
||||
+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
|
||||
+ udelay(1);
|
||||
+
|
||||
+ while (size--) {
|
||||
+ writel(readl(&efuse->ctrl) &
|
||||
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
|
||||
+ &efuse->ctrl);
|
||||
+ /* set addr */
|
||||
+ writel(readl(&efuse->ctrl) |
|
||||
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
|
||||
+ &efuse->ctrl);
|
||||
+ udelay(1);
|
||||
+ /* strobe low to high */
|
||||
+ writel(readl(&efuse->ctrl) |
|
||||
+ RK3288_STROBE, &efuse->ctrl);
|
||||
+ ndelay(60);
|
||||
+ /* read data */
|
||||
+ *buffer++ = readl(&efuse->dout);
|
||||
+ /* reset strobe to low */
|
||||
+ writel(readl(&efuse->ctrl) &
|
||||
+ (~RK3288_STROBE), &efuse->ctrl);
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+
|
||||
+ /* Switch to standby mode */
|
||||
+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
|
||||
+ void *buf, int size)
|
||||
+{
|
||||
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
|
||||
+ struct rockchip_efuse_regs *efuse =
|
||||
+ (struct rockchip_efuse_regs *)plat->base;
|
||||
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
|
||||
+ u32 out_value, status;
|
||||
+ u8 *buffer;
|
||||
+ int ret = 0, i = 0, j = 0;
|
||||
+
|
||||
+ /* Max non-secure Byte */
|
||||
+ if (size > 32)
|
||||
+ size = 32;
|
||||
+
|
||||
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
|
||||
+ offset += 96;
|
||||
+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
|
||||
+ RK3399_BYTES_PER_FUSE;
|
||||
+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
|
||||
+ RK3399_BYTES_PER_FUSE;
|
||||
+ addr_offset = offset % RK3399_BYTES_PER_FUSE;
|
||||
+ addr_len = addr_end - addr_start;
|
||||
+
|
||||
+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
|
||||
+ if (!buffer)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ for (j = 0; j < addr_len; j++) {
|
||||
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
|
||||
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
|
||||
+ &efuse->auto_ctrl);
|
||||
+ udelay(5);
|
||||
+ status = readl(&efuse->int_status);
|
||||
+ if (!(status & RK3328_INT_FINISH)) {
|
||||
+ ret = -EIO;
|
||||
+ goto err;
|
||||
+ }
|
||||
+ out_value = readl(&efuse->dout2);
|
||||
+ writel(RK3328_INT_FINISH, &efuse->int_status);
|
||||
+
|
||||
+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
|
||||
+ i += RK3399_BYTES_PER_FUSE;
|
||||
+ }
|
||||
+ memcpy(buf, buffer + addr_offset, size);
|
||||
+err:
|
||||
+ free(buffer);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
static int rockchip_efuse_read(struct udevice *dev, int offset,
|
||||
void *buf, int size)
|
||||
{
|
||||
- return rockchip_rk3399_efuse_read(dev, offset, buf, size);
|
||||
+ EFUSE_READ efuse_read = NULL;
|
||||
+
|
||||
+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
|
||||
+ if (!efuse_read)
|
||||
+ return -ENOSYS;
|
||||
+
|
||||
+ return (*efuse_read)(dev, offset, buf, size);
|
||||
}
|
||||
|
||||
static const struct misc_ops rockchip_efuse_ops = {
|
||||
@@ -146,7 +269,18 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
|
||||
}
|
||||
|
||||
static const struct udevice_id rockchip_efuse_ids[] = {
|
||||
- { .compatible = "rockchip,rk3399-efuse" },
|
||||
+ {
|
||||
+ .compatible = "rockchip,rk3288-efuse",
|
||||
+ .data = (ulong)&rockchip_rk3288_efuse_read,
|
||||
+ },
|
||||
+ {
|
||||
+ .compatible = "rockchip,rk3328-efuse",
|
||||
+ .data = (ulong)&rockchip_rk3328_efuse_read,
|
||||
+ },
|
||||
+ {
|
||||
+ .compatible = "rockchip,rk3399-efuse",
|
||||
+ .data = (ulong)&rockchip_rk3399_efuse_read,
|
||||
+ },
|
||||
{}
|
||||
};
|
||||
|
||||
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/include/dt-bindings/clock/rk3228-cru.h
|
||||
+++ b/include/dt-bindings/clock/rk3228-cru.h
|
||||
@@ -67,6 +67,10 @@
|
||||
#define PCLK_GPIO1 321
|
||||
#define PCLK_GPIO2 322
|
||||
#define PCLK_GPIO3 323
|
||||
+#define PCLK_VIO_H2P 324
|
||||
+#define PCLK_HDCP 325
|
||||
+#define PCLK_EFUSE_1024 326
|
||||
+#define PCLK_EFUSE_256 327
|
||||
#define PCLK_GRF 329
|
||||
#define PCLK_I2C0 332
|
||||
#define PCLK_I2C1 333
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -1,249 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo <paolo.sabatino@gmail.com>
|
||||
Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
Subject: [ARCHEOLOGY] Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
|
||||
> X-Git-Archeology: > recovered message: > This merge request contains various files which add support for xt-q8l-v10 boards (TVBox) equipped with Rockchip RK3288 SoC, AP6330 WiSoC (BCM4330 WiFi + Bluetooth), 2 GB DRAM (LPDDR2 or DDR3), 8 Gb eMMC, Gigabit Ethernet, 3 USB (1 OTG), 1 microSD slot, SPDIF optical output, 1 HDMI.
|
||||
> X-Git-Archeology: > recovered message: > Kernel patches:
|
||||
> X-Git-Archeology: > recovered message: > This thouches all three linux-rockchip-* kernelconfigs, just adds brcmfmac and brcmutil modules and remote controller support. default flavor activates rockchip own remote controller driver, next and dev use the mainline GPIO CIR driver (dev has lirc userland support activated too).
|
||||
> X-Git-Archeology: > recovered message: > About the remote controller, an additional kernel module is added to the existing keymaps which is activated via device tree.
|
||||
> X-Git-Archeology: > recovered message: > About possibly clashing patches assert-phy-reset-when-waking-up-in-rk3288-platform.patch should be checked against other rk3288 boards because it addresses an errata in rk3288 which causes the USB Host ports to stop responding when exiting from autosleep. On my device if I connect the first USB device when the system is already running, the USB Host gets stuck without this patch. Probably to work correctly on other platforms the device tree should include the proper reset lines of the USB PHYs (for reference, check patch/kernel/rockchip-dev/xt-q8l-v10-add-device-tree.patch starting from line 869).
|
||||
> X-Git-Archeology: > recovered message: > Patch 1-2-regulator-act8865-add-restart-handler-for-act8846.patch adds a restart handler which allows reboot using SIPC bit on act8846 power regulator. Possibly MiQi board is affected (is reboot working there?), others (tinkerboard) should not care.
|
||||
> X-Git-Archeology: > recovered message: > Patch brcmfmac-add-ap6330-firmware.patch adds firmware file names for ap6330 , should be harmless in other cases.
|
||||
> X-Git-Archeology: > recovered message: > Patch 0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch is from Miouyouyou. It should be harmless, it was suggested by him to do some tests with devfreq
|
||||
> X-Git-Archeology: > recovered message: > Other patches just add the proper device trees, Kconfig and bits for supporting the board as a regular kernel supported board and should not interfere with anything else
|
||||
> X-Git-Archeology: > recovered message: > U-Boot patches:
|
||||
> X-Git-Archeology: > recovered message: > All the patches for u-boot are per-board, so nothing is added which may interfere with other existing boards here. They include the device tree and u-boot config and also a couple of patches to support the silergy power regulators driving current to CPU and GPU
|
||||
> X-Git-Archeology: > recovered message: > * Initial commit to provide kernel and u-boot configuration and device trees for xt-q8-v10 as patches
|
||||
> X-Git-Archeology: > recovered message: > Modification to rockchip config to add initialization bits for xt-q8-v10
|
||||
> X-Git-Archeology: > recovered message: > * Committing correct path for rk3288_ddr_400Mhz... rockchip blob, moved assembling into another section to produce
|
||||
> X-Git-Archeology: > recovered message: > immediately an u-boot working binary
|
||||
> X-Git-Archeology: > recovered message: > * Enabled broadcom fmac driver in rockchip-next config
|
||||
> X-Git-Archeology: > recovered message: > * Changed name definition of rk3288-xt-q8-v10 board to "TVBox"
|
||||
> X-Git-Archeology: > recovered message: > Added bits to include support AP6330 and binary firmwares into the final image
|
||||
> X-Git-Archeology: > recovered message: > * Fixed device tree file name in related patch, added patching of Makefile to produce the device tree binary accordingly
|
||||
> X-Git-Archeology: > recovered message: > * Fixed xt-q8-v10 device tree patch
|
||||
> X-Git-Archeology: > recovered message: > Added brcmfmac driver to rockchip dev and default kernel configs
|
||||
> X-Git-Archeology: > recovered message: > * Syncing with upstream
|
||||
> X-Git-Archeology: > recovered message: > * Splitted add-xt-q8... kernel patches into two separate patches
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bad extension while adding dtb in makefile for rockchip-default configuration
|
||||
> X-Git-Archeology: > recovered message: > Updated device tree patches for all rockchip confs
|
||||
> X-Git-Archeology: > recovered message: > * Enable mmc0 and usb in u-boot config
|
||||
> X-Git-Archeology: > recovered message: > Fixed again makefile patch for kernel next
|
||||
> X-Git-Archeology: > recovered message: > * Adding patches to reset the USB phy when kernel requires a reset, fixes autosuspend issue
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8-v10 to proper xt-q8l-v10 in every string and every filename
|
||||
> X-Git-Archeology: > recovered message: > Added power hold to u-boot, so now the device will boot and stay turned on without the need for the OTG cable anymore
|
||||
> X-Git-Archeology: > recovered message: > * Changed names from 'Q8' to proper 'XT-Q8L-V10' in device tree patch files
|
||||
> X-Git-Archeology: > recovered message: > * Legacy kernel device tree:
|
||||
> X-Git-Archeology: > recovered message: > Fixed bluetooth gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Fixed HDMI gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Added support for PWM-based IR-Receiver, added driver in kernel default config too
|
||||
> X-Git-Archeology: > recovered message: > Various other fixes to avoid some complaints from the kernel
|
||||
> X-Git-Archeology: > recovered message: > * Added booting bluetooth systemd service for AP6330 (xt-q8l-v10) that loads patchram and invokes hciattach
|
||||
> X-Git-Archeology: > recovered message: > Minor fixes to -next and -dev device trees for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > * Disabled OTG USB port in u-boot due to long timeout during initialization
|
||||
> X-Git-Archeology: > recovered message: > Fixed warning during u-boot dts compilation
|
||||
> X-Git-Archeology: > recovered message: > Added emmc as second boot device in dts
|
||||
> X-Git-Archeology: > recovered message: > * Adding myself to licensing
|
||||
> X-Git-Archeology: > recovered message: > * Committing modifications to device trees
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dmac_bus_s explicitly set to unused dmac, restored right dmac in xt-q8l-v10 dts only
|
||||
> X-Git-Archeology: > recovered message: > Change PLL_CPLL frequency in device tree to 408 Mhz to avoid fractional divisor warnings
|
||||
> X-Git-Archeology: > recovered message: > * Added proper xt-q8l-v10_rk3288 configuration to u-boot, now appearing in config menu and
|
||||
> X-Git-Archeology: > recovered message: > correctly selectable as a real target
|
||||
> X-Git-Archeology: > recovered message: > Fixed typo in device tree from rockchip
|
||||
> X-Git-Archeology: > recovered message: > * Fixed missing semicolon in device tree for default configuration
|
||||
> X-Git-Archeology: > recovered message: > Fixed patch files for u-boot appending themselves to files on each compilation
|
||||
> X-Git-Archeology: > recovered message: > * Added bits to enable power to USB ports in u-boot, thus enabling booting from USB devices (only USB host port for now)
|
||||
> X-Git-Archeology: > recovered message: > * Changed u-boot binary creation using the rockchip SPL properly
|
||||
> X-Git-Archeology: > recovered message: > * Added boot order for xt-q8l-v10: sdcard, usb0, eMMC, network
|
||||
> X-Git-Archeology: > recovered message: > * Added bionic:next in beta config for xt-q8l-v10 board
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor bits in xt-q8l-v10 device tree files, added missing bits to dev flavour
|
||||
> X-Git-Archeology: > recovered message: > Added patches to introduce fairchild fan53555/silergy82x regulators to u-boot and enabled in xt-q8l-v10 device tree
|
||||
> X-Git-Archeology: > recovered message: > * Updated u-boot to version v2018.03 for xt-q8l-v10. Other rk3288 boards will gain v2018.05 from main armbian fork
|
||||
> X-Git-Archeology: > recovered message: > Removed pre-reloc labels in u-boot device tree because they are not necessary since we don't use u-boot SPL for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply in u-boot device tree to avoid hang on boot
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up a bit device trees, in particular some modifications are made to power regulator properties comparing them against the original q8l device tree
|
||||
> X-Git-Archeology: > recovered message: > Removed unnecessary dummy regulator, removed unnecessary capacities to embedded eMMC
|
||||
> X-Git-Archeology: > recovered message: > Disabled unused USB host
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply from emmc section because it causes hang in u-boot v2018.03 and newer
|
||||
> X-Git-Archeology: > recovered message: > * Restored previous regulator in u-boot dts
|
||||
> X-Git-Archeology: > recovered message: > removed assert phy reset USB patch from rockchip-dev because of some upstream incompatible changes
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to enable IRQ for Midgard drivers which caused massive slowdown on dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Changed u-boot if-code for xt-q8l-v10 in rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > Removed references to rk3288-linux.dtsi in xt-q8l-v10 device tree for default kernel
|
||||
> X-Git-Archeology: > recovered message: > * Committing effective removal of USB reset assert for dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Committing changes to u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to disable USB power down for rockchip devices broken on latest kernel
|
||||
> X-Git-Archeology: > recovered message: > * Removed usb dwc2 patch to reinject it from specific branch
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 device in rockchip-dev
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 in u-boot section
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to make USB ports working again on rockchip devices with mainline
|
||||
> X-Git-Archeology: > recovered message: > kernel >= 4.18
|
||||
> X-Git-Archeology: > recovered message: > * Changed the 0 into false
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 u-boot patches into board_xt-q8l-v10 directory
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor things in rockchip-dev dts for xt-q8l-v10, added mali midgard driver to dev kernel config
|
||||
> X-Git-Archeology: > recovered message: > * Added devfreq support for Mali in rockchip-next flavour
|
||||
> X-Git-Archeology: > recovered message: > * Remove manually applied patch (0007-drivers-drm...) because it has been
|
||||
> X-Git-Archeology: > recovered message: > added to armbian main repo
|
||||
> X-Git-Archeology: > recovered message: > * Removed duplicate patch which has added to main armbian repository
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up regulators for default/next/dev rockchip flavours for xt-q8l-v10, disabling those regulators which are not tied to anything
|
||||
> X-Git-Archeology: > recovered message: > Enabled voltage regulator to make SPDIF connector work (thus not tested because I have no DAC)
|
||||
> X-Git-Archeology: > recovered message: > Changed rockchip-dev and rockchip-next config files to enable gpio-ir-receiver module to enable bundled remote IR controller, including kernel patch for keymap
|
||||
> X-Git-Archeology: > recovered message: > * Enabled back regulator REG7 to allow propert bluetooth functionaly
|
||||
> X-Git-Archeology: > recovered message: > * Minor changes to u-boot device tree for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Added patch to set act8846 SIPC to correctly reboot the device (thus require some power-hold at reboot to make reboot fully working)
|
||||
> X-Git-Archeology: > recovered message: > * Fixed u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added configuration bits to support TPL in u-boot for xt-q8l-v10 (TPL is thrown away though) to allow faster reboot times and achieve a working reset feature activating power hold gpio pin as soon as possible. gpio pin is hardwired into spl_board_init() u-boot code because it is not possible to let it work via device tree
|
||||
> X-Git-Archeology: > recovered message: > Fixed OTG USB port in u-boot, allowing devices detection and booting
|
||||
> X-Git-Archeology: > recovered message: > Added proper vbus-supply properties for USB controllers in u-boot dts, so u-boot activates USB vbus itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dts makefile patching for next and dev rockchip kernel
|
||||
> X-Git-Archeology: > recovered message: > * Fixed fdt_file renamed to fdtfile in armbianEnv.txt
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8l-v10 board config as per recomendations
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 configuration to CSC
|
||||
> X-Git-Archeology: > recovered message: > Restored linux-rockchip-* configurations, enabled brcmfmac driver, GPIO remote controller driver and lirc kernel compatibility interface
|
||||
> X-Git-Archeology: > recovered message: > Polished a bit rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > * Add patch to brcmfmac driver to search for ap6330 firmware
|
||||
> X-Git-Archeology: > recovered message: > Removed copy-work from rockchip.conf about ap6330 firmware for xt-q8l-v10 and tidied up
|
||||
> X-Git-Archeology: > recovered message: > Avoid using brcm_patchram_plus in ap6330-bluetooth-service putting proper firmware file in /etc/firmware for hciattach do firmware uploading itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bcm4330 bluetooth firmware linking for hciattach used by ap6330-bluetooth.service
|
||||
> X-Git-Archeology: > recovered message: > * Removed foreign test patches from xt-q8l-v10 u-boot directory
|
||||
> X-Git-Archeology: - Revision 60b4166a8a9efe74c76bf75246cd297ccf4cf7ca: https://github.com/armbian/build/commit/60b4166a8a9efe74c76bf75246cd297ccf4cf7ca
|
||||
> X-Git-Archeology: Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision f4cce9754879f1d8e956b5ee7dc05b6d049f0e94: https://github.com/armbian/build/commit/f4cce9754879f1d8e956b5ee7dc05b6d049f0e94
|
||||
> X-Git-Archeology: Date: Wed, 10 Jun 2020 20:35:52 +0200
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: [rk3288] Various fixes and enhancements for xt-q8l-v10 CSC board (#2013)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 2dbdae284585eae321cb307afb75a9b70ed660b8: https://github.com/armbian/build/commit/2dbdae284585eae321cb307afb75a9b70ed660b8
|
||||
> X-Git-Archeology: Date: Mon, 05 Apr 2021 13:53:08 +0000
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: xt-q8l-v10: bump to u-boot v2021.01
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision b87e8085fbbdccce462a9926bc29fe5e9db6f0db: https://github.com/armbian/build/commit/b87e8085fbbdccce462a9926bc29fe5e9db6f0db
|
||||
> X-Git-Archeology: Date: Sun, 10 Apr 2022 16:45:44 +0200
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: move u-boot to v2022.04 for tinkerboard and xt-q8l-v10
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision de26797423e22d58ec2882d7032c67f77196ecc5: https://github.com/armbian/build/commit/de26797423e22d58ec2882d7032c67f77196ecc5
|
||||
> X-Git-Archeology: Date: Sun, 06 Nov 2022 20:32:46 +0100
|
||||
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Move all legacy u-boot patches under one general legacy folder (#4386)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
|
||||
> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
|
||||
> X-Git-Archeology:
|
||||
---
|
||||
configs/xt-q8l-v10-rk3288_defconfig | 97 ++++++++++
|
||||
1 file changed, 97 insertions(+)
|
||||
|
||||
diff --git a/configs/xt-q8l-v10-rk3288_defconfig b/configs/xt-q8l-v10-rk3288_defconfig
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/configs/xt-q8l-v10-rk3288_defconfig
|
||||
@@ -0,0 +1,97 @@
|
||||
+CONFIG_ARM=y
|
||||
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
|
||||
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x10000000
|
||||
+CONFIG_SYS_ARCH_TIMER=y
|
||||
+CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-xt-q8l-v10"
|
||||
+CONFIG_ROCKCHIP_RK3288=y
|
||||
+CONFIG_TARGET_XT_Q8L_V10_RK3288=y
|
||||
+CONFIG_SPL_STACK_R_ADDR=0x80000
|
||||
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
|
||||
+CONFIG_DEBUG_UART_BASE=0xff690000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+# CONFIG_LOCALVERSION_AUTO is not set
|
||||
+CONFIG_SYS_LOAD_ADDR=0x03000000
|
||||
+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
||||
+CONFIG_BOOTDELAY=1
|
||||
+CONFIG_USE_PREBOOT=y
|
||||
+CONFIG_SILENT_CONSOLE=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
+CONFIG_SPL_STACK_R=y
|
||||
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x8000
|
||||
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_SPI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_CACHE=y
|
||||
+CONFIG_CMD_TIME=y
|
||||
+CONFIG_CMD_PMIC=y
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+# CONFIG_SPL_EFI_PARTITION is not set
|
||||
+CONFIG_SPL_PARTITION_UUIDS=y
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
+# CONFIG_TPL_OF_PLATDATA is not set
|
||||
+CONFIG_ENV_IS_IN_MMC=y
|
||||
+CONFIG_REGMAP=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_SYSCON=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+# CONFIG_SPL_SIMPLE_BUS is not set
|
||||
+CONFIG_CLK=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_LED=y
|
||||
+CONFIG_LED_GPIO=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_GMAC_ROCKCHIP=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+# CONFIG_SPL_PINCTRL_FULL is not set
|
||||
+CONFIG_DM_PMIC=y
|
||||
+# CONFIG_SPL_PMIC_CHILDREN is not set
|
||||
+CONFIG_PMIC_ACT8846=y
|
||||
+CONFIG_REGULATOR_ACT8846=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_PWM_ROCKCHIP=y
|
||||
+CONFIG_RAM=y
|
||||
+CONFIG_SPL_RAM=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYSRESET=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_DWC2=y
|
||||
+CONFIG_ROCKCHIP_USB2_PHY=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_USB_HOST_ETHER=y
|
||||
+CONFIG_USB_ETHER_ASIX=y
|
||||
+CONFIG_USB_ETHER_SMSC95XX=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+CONFIG_DISPLAY=y
|
||||
+CONFIG_VIDEO_ROCKCHIP=y
|
||||
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
||||
+CONFIG_CONSOLE_SCROLL_LINES=10
|
||||
+CONFIG_CMD_DHRYSTONE=y
|
||||
+CONFIG_SHA256=y
|
||||
+CONFIG_ERRNO_STR=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -1,289 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo <paolo.sabatino@gmail.com>
|
||||
Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
Subject: [ARCHEOLOGY] Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
|
||||
> X-Git-Archeology: > recovered message: > This merge request contains various files which add support for xt-q8l-v10 boards (TVBox) equipped with Rockchip RK3288 SoC, AP6330 WiSoC (BCM4330 WiFi + Bluetooth), 2 GB DRAM (LPDDR2 or DDR3), 8 Gb eMMC, Gigabit Ethernet, 3 USB (1 OTG), 1 microSD slot, SPDIF optical output, 1 HDMI.
|
||||
> X-Git-Archeology: > recovered message: > Kernel patches:
|
||||
> X-Git-Archeology: > recovered message: > This thouches all three linux-rockchip-* kernelconfigs, just adds brcmfmac and brcmutil modules and remote controller support. default flavor activates rockchip own remote controller driver, next and dev use the mainline GPIO CIR driver (dev has lirc userland support activated too).
|
||||
> X-Git-Archeology: > recovered message: > About the remote controller, an additional kernel module is added to the existing keymaps which is activated via device tree.
|
||||
> X-Git-Archeology: > recovered message: > About possibly clashing patches assert-phy-reset-when-waking-up-in-rk3288-platform.patch should be checked against other rk3288 boards because it addresses an errata in rk3288 which causes the USB Host ports to stop responding when exiting from autosleep. On my device if I connect the first USB device when the system is already running, the USB Host gets stuck without this patch. Probably to work correctly on other platforms the device tree should include the proper reset lines of the USB PHYs (for reference, check patch/kernel/rockchip-dev/xt-q8l-v10-add-device-tree.patch starting from line 869).
|
||||
> X-Git-Archeology: > recovered message: > Patch 1-2-regulator-act8865-add-restart-handler-for-act8846.patch adds a restart handler which allows reboot using SIPC bit on act8846 power regulator. Possibly MiQi board is affected (is reboot working there?), others (tinkerboard) should not care.
|
||||
> X-Git-Archeology: > recovered message: > Patch brcmfmac-add-ap6330-firmware.patch adds firmware file names for ap6330 , should be harmless in other cases.
|
||||
> X-Git-Archeology: > recovered message: > Patch 0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch is from Miouyouyou. It should be harmless, it was suggested by him to do some tests with devfreq
|
||||
> X-Git-Archeology: > recovered message: > Other patches just add the proper device trees, Kconfig and bits for supporting the board as a regular kernel supported board and should not interfere with anything else
|
||||
> X-Git-Archeology: > recovered message: > U-Boot patches:
|
||||
> X-Git-Archeology: > recovered message: > All the patches for u-boot are per-board, so nothing is added which may interfere with other existing boards here. They include the device tree and u-boot config and also a couple of patches to support the silergy power regulators driving current to CPU and GPU
|
||||
> X-Git-Archeology: > recovered message: > * Initial commit to provide kernel and u-boot configuration and device trees for xt-q8-v10 as patches
|
||||
> X-Git-Archeology: > recovered message: > Modification to rockchip config to add initialization bits for xt-q8-v10
|
||||
> X-Git-Archeology: > recovered message: > * Committing correct path for rk3288_ddr_400Mhz... rockchip blob, moved assembling into another section to produce
|
||||
> X-Git-Archeology: > recovered message: > immediately an u-boot working binary
|
||||
> X-Git-Archeology: > recovered message: > * Enabled broadcom fmac driver in rockchip-next config
|
||||
> X-Git-Archeology: > recovered message: > * Changed name definition of rk3288-xt-q8-v10 board to "TVBox"
|
||||
> X-Git-Archeology: > recovered message: > Added bits to include support AP6330 and binary firmwares into the final image
|
||||
> X-Git-Archeology: > recovered message: > * Fixed device tree file name in related patch, added patching of Makefile to produce the device tree binary accordingly
|
||||
> X-Git-Archeology: > recovered message: > * Fixed xt-q8-v10 device tree patch
|
||||
> X-Git-Archeology: > recovered message: > Added brcmfmac driver to rockchip dev and default kernel configs
|
||||
> X-Git-Archeology: > recovered message: > * Syncing with upstream
|
||||
> X-Git-Archeology: > recovered message: > * Splitted add-xt-q8... kernel patches into two separate patches
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bad extension while adding dtb in makefile for rockchip-default configuration
|
||||
> X-Git-Archeology: > recovered message: > Updated device tree patches for all rockchip confs
|
||||
> X-Git-Archeology: > recovered message: > * Enable mmc0 and usb in u-boot config
|
||||
> X-Git-Archeology: > recovered message: > Fixed again makefile patch for kernel next
|
||||
> X-Git-Archeology: > recovered message: > * Adding patches to reset the USB phy when kernel requires a reset, fixes autosuspend issue
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8-v10 to proper xt-q8l-v10 in every string and every filename
|
||||
> X-Git-Archeology: > recovered message: > Added power hold to u-boot, so now the device will boot and stay turned on without the need for the OTG cable anymore
|
||||
> X-Git-Archeology: > recovered message: > * Changed names from 'Q8' to proper 'XT-Q8L-V10' in device tree patch files
|
||||
> X-Git-Archeology: > recovered message: > * Legacy kernel device tree:
|
||||
> X-Git-Archeology: > recovered message: > Fixed bluetooth gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Fixed HDMI gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Added support for PWM-based IR-Receiver, added driver in kernel default config too
|
||||
> X-Git-Archeology: > recovered message: > Various other fixes to avoid some complaints from the kernel
|
||||
> X-Git-Archeology: > recovered message: > * Added booting bluetooth systemd service for AP6330 (xt-q8l-v10) that loads patchram and invokes hciattach
|
||||
> X-Git-Archeology: > recovered message: > Minor fixes to -next and -dev device trees for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > * Disabled OTG USB port in u-boot due to long timeout during initialization
|
||||
> X-Git-Archeology: > recovered message: > Fixed warning during u-boot dts compilation
|
||||
> X-Git-Archeology: > recovered message: > Added emmc as second boot device in dts
|
||||
> X-Git-Archeology: > recovered message: > * Adding myself to licensing
|
||||
> X-Git-Archeology: > recovered message: > * Committing modifications to device trees
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dmac_bus_s explicitly set to unused dmac, restored right dmac in xt-q8l-v10 dts only
|
||||
> X-Git-Archeology: > recovered message: > Change PLL_CPLL frequency in device tree to 408 Mhz to avoid fractional divisor warnings
|
||||
> X-Git-Archeology: > recovered message: > * Added proper xt-q8l-v10_rk3288 configuration to u-boot, now appearing in config menu and
|
||||
> X-Git-Archeology: > recovered message: > correctly selectable as a real target
|
||||
> X-Git-Archeology: > recovered message: > Fixed typo in device tree from rockchip
|
||||
> X-Git-Archeology: > recovered message: > * Fixed missing semicolon in device tree for default configuration
|
||||
> X-Git-Archeology: > recovered message: > Fixed patch files for u-boot appending themselves to files on each compilation
|
||||
> X-Git-Archeology: > recovered message: > * Added bits to enable power to USB ports in u-boot, thus enabling booting from USB devices (only USB host port for now)
|
||||
> X-Git-Archeology: > recovered message: > * Changed u-boot binary creation using the rockchip SPL properly
|
||||
> X-Git-Archeology: > recovered message: > * Added boot order for xt-q8l-v10: sdcard, usb0, eMMC, network
|
||||
> X-Git-Archeology: > recovered message: > * Added bionic:next in beta config for xt-q8l-v10 board
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor bits in xt-q8l-v10 device tree files, added missing bits to dev flavour
|
||||
> X-Git-Archeology: > recovered message: > Added patches to introduce fairchild fan53555/silergy82x regulators to u-boot and enabled in xt-q8l-v10 device tree
|
||||
> X-Git-Archeology: > recovered message: > * Updated u-boot to version v2018.03 for xt-q8l-v10. Other rk3288 boards will gain v2018.05 from main armbian fork
|
||||
> X-Git-Archeology: > recovered message: > Removed pre-reloc labels in u-boot device tree because they are not necessary since we don't use u-boot SPL for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply in u-boot device tree to avoid hang on boot
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up a bit device trees, in particular some modifications are made to power regulator properties comparing them against the original q8l device tree
|
||||
> X-Git-Archeology: > recovered message: > Removed unnecessary dummy regulator, removed unnecessary capacities to embedded eMMC
|
||||
> X-Git-Archeology: > recovered message: > Disabled unused USB host
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply from emmc section because it causes hang in u-boot v2018.03 and newer
|
||||
> X-Git-Archeology: > recovered message: > * Restored previous regulator in u-boot dts
|
||||
> X-Git-Archeology: > recovered message: > removed assert phy reset USB patch from rockchip-dev because of some upstream incompatible changes
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to enable IRQ for Midgard drivers which caused massive slowdown on dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Changed u-boot if-code for xt-q8l-v10 in rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > Removed references to rk3288-linux.dtsi in xt-q8l-v10 device tree for default kernel
|
||||
> X-Git-Archeology: > recovered message: > * Committing effective removal of USB reset assert for dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Committing changes to u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to disable USB power down for rockchip devices broken on latest kernel
|
||||
> X-Git-Archeology: > recovered message: > * Removed usb dwc2 patch to reinject it from specific branch
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 device in rockchip-dev
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 in u-boot section
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to make USB ports working again on rockchip devices with mainline
|
||||
> X-Git-Archeology: > recovered message: > kernel >= 4.18
|
||||
> X-Git-Archeology: > recovered message: > * Changed the 0 into false
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 u-boot patches into board_xt-q8l-v10 directory
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor things in rockchip-dev dts for xt-q8l-v10, added mali midgard driver to dev kernel config
|
||||
> X-Git-Archeology: > recovered message: > * Added devfreq support for Mali in rockchip-next flavour
|
||||
> X-Git-Archeology: > recovered message: > * Remove manually applied patch (0007-drivers-drm...) because it has been
|
||||
> X-Git-Archeology: > recovered message: > added to armbian main repo
|
||||
> X-Git-Archeology: > recovered message: > * Removed duplicate patch which has added to main armbian repository
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up regulators for default/next/dev rockchip flavours for xt-q8l-v10, disabling those regulators which are not tied to anything
|
||||
> X-Git-Archeology: > recovered message: > Enabled voltage regulator to make SPDIF connector work (thus not tested because I have no DAC)
|
||||
> X-Git-Archeology: > recovered message: > Changed rockchip-dev and rockchip-next config files to enable gpio-ir-receiver module to enable bundled remote IR controller, including kernel patch for keymap
|
||||
> X-Git-Archeology: > recovered message: > * Enabled back regulator REG7 to allow propert bluetooth functionaly
|
||||
> X-Git-Archeology: > recovered message: > * Minor changes to u-boot device tree for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Added patch to set act8846 SIPC to correctly reboot the device (thus require some power-hold at reboot to make reboot fully working)
|
||||
> X-Git-Archeology: > recovered message: > * Fixed u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added configuration bits to support TPL in u-boot for xt-q8l-v10 (TPL is thrown away though) to allow faster reboot times and achieve a working reset feature activating power hold gpio pin as soon as possible. gpio pin is hardwired into spl_board_init() u-boot code because it is not possible to let it work via device tree
|
||||
> X-Git-Archeology: > recovered message: > Fixed OTG USB port in u-boot, allowing devices detection and booting
|
||||
> X-Git-Archeology: > recovered message: > Added proper vbus-supply properties for USB controllers in u-boot dts, so u-boot activates USB vbus itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dts makefile patching for next and dev rockchip kernel
|
||||
> X-Git-Archeology: > recovered message: > * Fixed fdt_file renamed to fdtfile in armbianEnv.txt
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8l-v10 board config as per recomendations
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 configuration to CSC
|
||||
> X-Git-Archeology: > recovered message: > Restored linux-rockchip-* configurations, enabled brcmfmac driver, GPIO remote controller driver and lirc kernel compatibility interface
|
||||
> X-Git-Archeology: > recovered message: > Polished a bit rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > * Add patch to brcmfmac driver to search for ap6330 firmware
|
||||
> X-Git-Archeology: > recovered message: > Removed copy-work from rockchip.conf about ap6330 firmware for xt-q8l-v10 and tidied up
|
||||
> X-Git-Archeology: > recovered message: > Avoid using brcm_patchram_plus in ap6330-bluetooth-service putting proper firmware file in /etc/firmware for hciattach do firmware uploading itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bcm4330 bluetooth firmware linking for hciattach used by ap6330-bluetooth.service
|
||||
> X-Git-Archeology: > recovered message: > * Removed foreign test patches from xt-q8l-v10 u-boot directory
|
||||
> X-Git-Archeology: - Revision 60b4166a8a9efe74c76bf75246cd297ccf4cf7ca: https://github.com/armbian/build/commit/60b4166a8a9efe74c76bf75246cd297ccf4cf7ca
|
||||
> X-Git-Archeology: Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision f4cce9754879f1d8e956b5ee7dc05b6d049f0e94: https://github.com/armbian/build/commit/f4cce9754879f1d8e956b5ee7dc05b6d049f0e94
|
||||
> X-Git-Archeology: Date: Wed, 10 Jun 2020 20:35:52 +0200
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: [rk3288] Various fixes and enhancements for xt-q8l-v10 CSC board (#2013)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision de26797423e22d58ec2882d7032c67f77196ecc5: https://github.com/armbian/build/commit/de26797423e22d58ec2882d7032c67f77196ecc5
|
||||
> X-Git-Archeology: Date: Sun, 06 Nov 2022 20:32:46 +0100
|
||||
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Move all legacy u-boot patches under one general legacy folder (#4386)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
|
||||
> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
|
||||
> X-Git-Archeology:
|
||||
---
|
||||
arch/arm/dts/Makefile | 1 +
|
||||
arch/arm/mach-rockchip/rk3288/Kconfig | 12 ++++
|
||||
board/rockchip/xt-q8l-v10_rk3288/Kconfig | 15 +++++
|
||||
board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS | 6 ++
|
||||
board/rockchip/xt-q8l-v10_rk3288/Makefile | 7 +++
|
||||
board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c | 21 +++++++
|
||||
include/configs/xt-q8l-v10_rk3288.h | 28 ++++++++++
|
||||
7 files changed, 90 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
|
||||
rk3288-rock-pi-n8.dtb \
|
||||
rk3288-tinker.dtb \
|
||||
rk3288-tinker-s.dtb \
|
||||
+ rk3288-xt-q8l-v10.dtb \
|
||||
rk3288-veyron-jerry.dtb \
|
||||
rk3288-veyron-mickey.dtb \
|
||||
rk3288-veyron-minnie.dtb \
|
||||
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
@@ -134,6 +134,16 @@ config TARGET_TINKER_RK3288
|
||||
8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
|
||||
I2C, SPI, UART, GPIOs.
|
||||
|
||||
+config TARGET_XT_Q8L_V10_RK3288
|
||||
+ bool "xt-q8l-v10 tvbox board"
|
||||
+ select BOARD_LATE_INIT
|
||||
+ select TPL
|
||||
+ help
|
||||
+ xt-q8l-v10 is a RK3288 common tv box with 3 USB ports (1 OTG), HDMI,
|
||||
+ micro-SD card, Gigabit Ethernet and SPDIF output. It also includes on-board
|
||||
+ 8GB eMMC and 2GB of SDRAM, 802.11n Wifi and Bluetooth based upon AP6330
|
||||
+ WiSoC.
|
||||
+
|
||||
endchoice
|
||||
|
||||
config ROCKCHIP_FAST_SPL
|
||||
@@ -196,4 +206,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
|
||||
|
||||
source "board/rockchip/tinker_rk3288/Kconfig"
|
||||
|
||||
+source "board/rockchip/xt-q8l-v10_rk3288/Kconfig"
|
||||
+
|
||||
endif
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/Kconfig b/board/rockchip/xt-q8l-v10_rk3288/Kconfig
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/Kconfig
|
||||
@@ -0,0 +1,15 @@
|
||||
+if TARGET_XT_Q8L_V10_RK3288
|
||||
+
|
||||
+config SYS_BOARD
|
||||
+ default "xt-q8l-v10_rk3288"
|
||||
+
|
||||
+config SYS_VENDOR
|
||||
+ default "rockchip"
|
||||
+
|
||||
+config SYS_CONFIG_NAME
|
||||
+ default "xt-q8l-v10_rk3288"
|
||||
+
|
||||
+config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
+ def_bool y
|
||||
+
|
||||
+endif
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS b/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS
|
||||
@@ -0,0 +1,6 @@
|
||||
+XT-Q8L-V10-RK3288
|
||||
+M: Paolo Sabatino <a@b.c>
|
||||
+S: Not mainlined
|
||||
+F: board/rockchip/xt-q8l-v10_rk3288
|
||||
+F: include/configs/xt-q8l-v10_rk3288.h
|
||||
+F: configs/xt-q8l-v10-rk3288_defconfig
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/Makefile b/board/rockchip/xt-q8l-v10_rk3288/Makefile
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/Makefile
|
||||
@@ -0,0 +1,7 @@
|
||||
+#
|
||||
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
||||
+#
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+
|
||||
+obj-y += xt-q8l-v10-rk3288.o
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c b/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
@@ -0,0 +1,21 @@
|
||||
+/*
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <spl.h>
|
||||
+#include <asm/gpio.h>
|
||||
+
|
||||
+void spl_board_init(void)
|
||||
+{
|
||||
+
|
||||
+ /*
|
||||
+ * xt-q8l-v10 requires the power-hold gpio set (A11, or bank 0 pin 11
|
||||
+ * if you prefer) as soon as possible.
|
||||
+ * We hack it here :P
|
||||
+ */
|
||||
+ gpio_request(11, "power-hold");
|
||||
+ gpio_direction_output(11, 1);
|
||||
+
|
||||
+}
|
||||
+
|
||||
diff --git a/include/configs/xt-q8l-v10_rk3288.h b/include/configs/xt-q8l-v10_rk3288.h
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/include/configs/xt-q8l-v10_rk3288.h
|
||||
@@ -0,0 +1,28 @@
|
||||
+/*
|
||||
+ * (C) Copyright 2015 Google, Inc
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#ifndef __CONFIG_H
|
||||
+#define __CONFIG_H
|
||||
+
|
||||
+#define ROCKCHIP_DEVICE_SETTINGS \
|
||||
+ "stdin=serial,usbkbd\0" \
|
||||
+ "stdout=serial,vidconsole\0" \
|
||||
+ "stderr=serial,vidconsole\0"
|
||||
+
|
||||
+#include <configs/rk3288_common.h>
|
||||
+
|
||||
+#undef BOOT_TARGET_DEVICES
|
||||
+
|
||||
+#define BOOT_TARGET_DEVICES(func) \
|
||||
+ func(MMC, mmc, 1) \
|
||||
+ func(USB, usb, 0) \
|
||||
+ func(MMC, mmc, 0) \
|
||||
+ func(PXE, pxe, na) \
|
||||
+ func(DHCP, dchp, na)
|
||||
+
|
||||
+#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
+
|
||||
+#endif
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -1,926 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo <paolo.sabatino@gmail.com>
|
||||
Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
Subject: [ARCHEOLOGY] Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
|
||||
> X-Git-Archeology: > recovered message: > This merge request contains various files which add support for xt-q8l-v10 boards (TVBox) equipped with Rockchip RK3288 SoC, AP6330 WiSoC (BCM4330 WiFi + Bluetooth), 2 GB DRAM (LPDDR2 or DDR3), 8 Gb eMMC, Gigabit Ethernet, 3 USB (1 OTG), 1 microSD slot, SPDIF optical output, 1 HDMI.
|
||||
> X-Git-Archeology: > recovered message: > Kernel patches:
|
||||
> X-Git-Archeology: > recovered message: > This thouches all three linux-rockchip-* kernelconfigs, just adds brcmfmac and brcmutil modules and remote controller support. default flavor activates rockchip own remote controller driver, next and dev use the mainline GPIO CIR driver (dev has lirc userland support activated too).
|
||||
> X-Git-Archeology: > recovered message: > About the remote controller, an additional kernel module is added to the existing keymaps which is activated via device tree.
|
||||
> X-Git-Archeology: > recovered message: > About possibly clashing patches assert-phy-reset-when-waking-up-in-rk3288-platform.patch should be checked against other rk3288 boards because it addresses an errata in rk3288 which causes the USB Host ports to stop responding when exiting from autosleep. On my device if I connect the first USB device when the system is already running, the USB Host gets stuck without this patch. Probably to work correctly on other platforms the device tree should include the proper reset lines of the USB PHYs (for reference, check patch/kernel/rockchip-dev/xt-q8l-v10-add-device-tree.patch starting from line 869).
|
||||
> X-Git-Archeology: > recovered message: > Patch 1-2-regulator-act8865-add-restart-handler-for-act8846.patch adds a restart handler which allows reboot using SIPC bit on act8846 power regulator. Possibly MiQi board is affected (is reboot working there?), others (tinkerboard) should not care.
|
||||
> X-Git-Archeology: > recovered message: > Patch brcmfmac-add-ap6330-firmware.patch adds firmware file names for ap6330 , should be harmless in other cases.
|
||||
> X-Git-Archeology: > recovered message: > Patch 0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch is from Miouyouyou. It should be harmless, it was suggested by him to do some tests with devfreq
|
||||
> X-Git-Archeology: > recovered message: > Other patches just add the proper device trees, Kconfig and bits for supporting the board as a regular kernel supported board and should not interfere with anything else
|
||||
> X-Git-Archeology: > recovered message: > U-Boot patches:
|
||||
> X-Git-Archeology: > recovered message: > All the patches for u-boot are per-board, so nothing is added which may interfere with other existing boards here. They include the device tree and u-boot config and also a couple of patches to support the silergy power regulators driving current to CPU and GPU
|
||||
> X-Git-Archeology: > recovered message: > * Initial commit to provide kernel and u-boot configuration and device trees for xt-q8-v10 as patches
|
||||
> X-Git-Archeology: > recovered message: > Modification to rockchip config to add initialization bits for xt-q8-v10
|
||||
> X-Git-Archeology: > recovered message: > * Committing correct path for rk3288_ddr_400Mhz... rockchip blob, moved assembling into another section to produce
|
||||
> X-Git-Archeology: > recovered message: > immediately an u-boot working binary
|
||||
> X-Git-Archeology: > recovered message: > * Enabled broadcom fmac driver in rockchip-next config
|
||||
> X-Git-Archeology: > recovered message: > * Changed name definition of rk3288-xt-q8-v10 board to "TVBox"
|
||||
> X-Git-Archeology: > recovered message: > Added bits to include support AP6330 and binary firmwares into the final image
|
||||
> X-Git-Archeology: > recovered message: > * Fixed device tree file name in related patch, added patching of Makefile to produce the device tree binary accordingly
|
||||
> X-Git-Archeology: > recovered message: > * Fixed xt-q8-v10 device tree patch
|
||||
> X-Git-Archeology: > recovered message: > Added brcmfmac driver to rockchip dev and default kernel configs
|
||||
> X-Git-Archeology: > recovered message: > * Syncing with upstream
|
||||
> X-Git-Archeology: > recovered message: > * Splitted add-xt-q8... kernel patches into two separate patches
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bad extension while adding dtb in makefile for rockchip-default configuration
|
||||
> X-Git-Archeology: > recovered message: > Updated device tree patches for all rockchip confs
|
||||
> X-Git-Archeology: > recovered message: > * Enable mmc0 and usb in u-boot config
|
||||
> X-Git-Archeology: > recovered message: > Fixed again makefile patch for kernel next
|
||||
> X-Git-Archeology: > recovered message: > * Adding patches to reset the USB phy when kernel requires a reset, fixes autosuspend issue
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8-v10 to proper xt-q8l-v10 in every string and every filename
|
||||
> X-Git-Archeology: > recovered message: > Added power hold to u-boot, so now the device will boot and stay turned on without the need for the OTG cable anymore
|
||||
> X-Git-Archeology: > recovered message: > * Changed names from 'Q8' to proper 'XT-Q8L-V10' in device tree patch files
|
||||
> X-Git-Archeology: > recovered message: > * Legacy kernel device tree:
|
||||
> X-Git-Archeology: > recovered message: > Fixed bluetooth gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Fixed HDMI gpio pin clashing
|
||||
> X-Git-Archeology: > recovered message: > Added support for PWM-based IR-Receiver, added driver in kernel default config too
|
||||
> X-Git-Archeology: > recovered message: > Various other fixes to avoid some complaints from the kernel
|
||||
> X-Git-Archeology: > recovered message: > * Added booting bluetooth systemd service for AP6330 (xt-q8l-v10) that loads patchram and invokes hciattach
|
||||
> X-Git-Archeology: > recovered message: > Minor fixes to -next and -dev device trees for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > * Disabled OTG USB port in u-boot due to long timeout during initialization
|
||||
> X-Git-Archeology: > recovered message: > Fixed warning during u-boot dts compilation
|
||||
> X-Git-Archeology: > recovered message: > Added emmc as second boot device in dts
|
||||
> X-Git-Archeology: > recovered message: > * Adding myself to licensing
|
||||
> X-Git-Archeology: > recovered message: > * Committing modifications to device trees
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dmac_bus_s explicitly set to unused dmac, restored right dmac in xt-q8l-v10 dts only
|
||||
> X-Git-Archeology: > recovered message: > Change PLL_CPLL frequency in device tree to 408 Mhz to avoid fractional divisor warnings
|
||||
> X-Git-Archeology: > recovered message: > * Added proper xt-q8l-v10_rk3288 configuration to u-boot, now appearing in config menu and
|
||||
> X-Git-Archeology: > recovered message: > correctly selectable as a real target
|
||||
> X-Git-Archeology: > recovered message: > Fixed typo in device tree from rockchip
|
||||
> X-Git-Archeology: > recovered message: > * Fixed missing semicolon in device tree for default configuration
|
||||
> X-Git-Archeology: > recovered message: > Fixed patch files for u-boot appending themselves to files on each compilation
|
||||
> X-Git-Archeology: > recovered message: > * Added bits to enable power to USB ports in u-boot, thus enabling booting from USB devices (only USB host port for now)
|
||||
> X-Git-Archeology: > recovered message: > * Changed u-boot binary creation using the rockchip SPL properly
|
||||
> X-Git-Archeology: > recovered message: > * Added boot order for xt-q8l-v10: sdcard, usb0, eMMC, network
|
||||
> X-Git-Archeology: > recovered message: > * Added bionic:next in beta config for xt-q8l-v10 board
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor bits in xt-q8l-v10 device tree files, added missing bits to dev flavour
|
||||
> X-Git-Archeology: > recovered message: > Added patches to introduce fairchild fan53555/silergy82x regulators to u-boot and enabled in xt-q8l-v10 device tree
|
||||
> X-Git-Archeology: > recovered message: > * Updated u-boot to version v2018.03 for xt-q8l-v10. Other rk3288 boards will gain v2018.05 from main armbian fork
|
||||
> X-Git-Archeology: > recovered message: > Removed pre-reloc labels in u-boot device tree because they are not necessary since we don't use u-boot SPL for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply in u-boot device tree to avoid hang on boot
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up a bit device trees, in particular some modifications are made to power regulator properties comparing them against the original q8l device tree
|
||||
> X-Git-Archeology: > recovered message: > Removed unnecessary dummy regulator, removed unnecessary capacities to embedded eMMC
|
||||
> X-Git-Archeology: > recovered message: > Disabled unused USB host
|
||||
> X-Git-Archeology: > recovered message: > Removed vmmc-supply and vqmmc-supply from emmc section because it causes hang in u-boot v2018.03 and newer
|
||||
> X-Git-Archeology: > recovered message: > * Restored previous regulator in u-boot dts
|
||||
> X-Git-Archeology: > recovered message: > removed assert phy reset USB patch from rockchip-dev because of some upstream incompatible changes
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to enable IRQ for Midgard drivers which caused massive slowdown on dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Changed u-boot if-code for xt-q8l-v10 in rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > Removed references to rk3288-linux.dtsi in xt-q8l-v10 device tree for default kernel
|
||||
> X-Git-Archeology: > recovered message: > * Committing effective removal of USB reset assert for dev kernel
|
||||
> X-Git-Archeology: > recovered message: > Committing changes to u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to disable USB power down for rockchip devices broken on latest kernel
|
||||
> X-Git-Archeology: > recovered message: > * Removed usb dwc2 patch to reinject it from specific branch
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 device in rockchip-dev
|
||||
> X-Git-Archeology: > recovered message: > * Reverting some voltage changes for xt-q8l-v10 in u-boot section
|
||||
> X-Git-Archeology: > recovered message: > * Added patch to make USB ports working again on rockchip devices with mainline
|
||||
> X-Git-Archeology: > recovered message: > kernel >= 4.18
|
||||
> X-Git-Archeology: > recovered message: > * Changed the 0 into false
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 u-boot patches into board_xt-q8l-v10 directory
|
||||
> X-Git-Archeology: > recovered message: > * Changed some minor things in rockchip-dev dts for xt-q8l-v10, added mali midgard driver to dev kernel config
|
||||
> X-Git-Archeology: > recovered message: > * Added devfreq support for Mali in rockchip-next flavour
|
||||
> X-Git-Archeology: > recovered message: > * Remove manually applied patch (0007-drivers-drm...) because it has been
|
||||
> X-Git-Archeology: > recovered message: > added to armbian main repo
|
||||
> X-Git-Archeology: > recovered message: > * Removed duplicate patch which has added to main armbian repository
|
||||
> X-Git-Archeology: > recovered message: > * Tidied up regulators for default/next/dev rockchip flavours for xt-q8l-v10, disabling those regulators which are not tied to anything
|
||||
> X-Git-Archeology: > recovered message: > Enabled voltage regulator to make SPDIF connector work (thus not tested because I have no DAC)
|
||||
> X-Git-Archeology: > recovered message: > Changed rockchip-dev and rockchip-next config files to enable gpio-ir-receiver module to enable bundled remote IR controller, including kernel patch for keymap
|
||||
> X-Git-Archeology: > recovered message: > * Enabled back regulator REG7 to allow propert bluetooth functionaly
|
||||
> X-Git-Archeology: > recovered message: > * Minor changes to u-boot device tree for xt-q8l-v10
|
||||
> X-Git-Archeology: > recovered message: > Added patch to set act8846 SIPC to correctly reboot the device (thus require some power-hold at reboot to make reboot fully working)
|
||||
> X-Git-Archeology: > recovered message: > * Fixed u-boot device tree
|
||||
> X-Git-Archeology: > recovered message: > * Added configuration bits to support TPL in u-boot for xt-q8l-v10 (TPL is thrown away though) to allow faster reboot times and achieve a working reset feature activating power hold gpio pin as soon as possible. gpio pin is hardwired into spl_board_init() u-boot code because it is not possible to let it work via device tree
|
||||
> X-Git-Archeology: > recovered message: > Fixed OTG USB port in u-boot, allowing devices detection and booting
|
||||
> X-Git-Archeology: > recovered message: > Added proper vbus-supply properties for USB controllers in u-boot dts, so u-boot activates USB vbus itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed dts makefile patching for next and dev rockchip kernel
|
||||
> X-Git-Archeology: > recovered message: > * Fixed fdt_file renamed to fdtfile in armbianEnv.txt
|
||||
> X-Git-Archeology: > recovered message: > * Changed xt-q8l-v10 board config as per recomendations
|
||||
> X-Git-Archeology: > recovered message: > * Moved xt-q8l-v10 configuration to CSC
|
||||
> X-Git-Archeology: > recovered message: > Restored linux-rockchip-* configurations, enabled brcmfmac driver, GPIO remote controller driver and lirc kernel compatibility interface
|
||||
> X-Git-Archeology: > recovered message: > Polished a bit rockchip.conf
|
||||
> X-Git-Archeology: > recovered message: > * Add patch to brcmfmac driver to search for ap6330 firmware
|
||||
> X-Git-Archeology: > recovered message: > Removed copy-work from rockchip.conf about ap6330 firmware for xt-q8l-v10 and tidied up
|
||||
> X-Git-Archeology: > recovered message: > Avoid using brcm_patchram_plus in ap6330-bluetooth-service putting proper firmware file in /etc/firmware for hciattach do firmware uploading itself
|
||||
> X-Git-Archeology: > recovered message: > * Fixed bcm4330 bluetooth firmware linking for hciattach used by ap6330-bluetooth.service
|
||||
> X-Git-Archeology: > recovered message: > * Removed foreign test patches from xt-q8l-v10 u-boot directory
|
||||
> X-Git-Archeology: - Revision 60b4166a8a9efe74c76bf75246cd297ccf4cf7ca: https://github.com/armbian/build/commit/60b4166a8a9efe74c76bf75246cd297ccf4cf7ca
|
||||
> X-Git-Archeology: Date: Thu, 22 Nov 2018 07:04:19 +0100
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Add rk3288 xt-q8l-v10 CSC board (#1158)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 88467bad9d53a0cca1e0a6c0d19f8113df5841aa: https://github.com/armbian/build/commit/88467bad9d53a0cca1e0a6c0d19f8113df5841aa
|
||||
> X-Git-Archeology: Date: Fri, 30 Nov 2018 11:16:50 +0000
|
||||
> X-Git-Archeology: From: paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Modified xt-q8l-v10 device tree patches to properly source from /dev/null
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 43383c4e2455e51985a89b61230f722c7ba351ec: https://github.com/armbian/build/commit/43383c4e2455e51985a89b61230f722c7ba351ec
|
||||
> X-Git-Archeology: Date: Thu, 06 Dec 2018 21:58:33 +0000
|
||||
> X-Git-Archeology: From: paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Changed minor bits in xt-q8l-v10 device tree patch for dev flavour
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 76de54fb38cecb25a7c44f1d544573ed62e01cf8: https://github.com/armbian/build/commit/76de54fb38cecb25a7c44f1d544573ed62e01cf8
|
||||
> X-Git-Archeology: Date: Fri, 14 Dec 2018 12:16:26 +0000
|
||||
> X-Git-Archeology: From: paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Changed minor bits in xt-q8l-v10 device tree patch for dev flavour
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision a818f64885b33e68b732465d774547e94cc4a904: https://github.com/armbian/build/commit/a818f64885b33e68b732465d774547e94cc4a904
|
||||
> X-Git-Archeology: Date: Sat, 15 Dec 2018 10:43:59 +0000
|
||||
> X-Git-Archeology: From: paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Changed minor bits in xt-q8l-v10 device tree patch for dev flavour
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 868d7390fcf66a7883e0ff4fdea6310ca3b282af: https://github.com/armbian/build/commit/868d7390fcf66a7883e0ff4fdea6310ca3b282af
|
||||
> X-Git-Archeology: Date: Sat, 15 Dec 2018 10:44:00 +0000
|
||||
> X-Git-Archeology: From: paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Disabled dma for serial ports in xt-q8l-v10 dev kernel device tree due to changes in kernel 4.19
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision f82001666bef3a4fa3da78b7527d726c9b9b13d7: https://github.com/armbian/build/commit/f82001666bef3a4fa3da78b7527d726c9b9b13d7
|
||||
> X-Git-Archeology: Date: Sat, 31 Aug 2019 22:02:25 +0200
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: [xt-q8l-v10] Updates for CSC board (#1539)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision f4cce9754879f1d8e956b5ee7dc05b6d049f0e94: https://github.com/armbian/build/commit/f4cce9754879f1d8e956b5ee7dc05b6d049f0e94
|
||||
> X-Git-Archeology: Date: Wed, 10 Jun 2020 20:35:52 +0200
|
||||
> X-Git-Archeology: From: Paolo <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: [rk3288] Various fixes and enhancements for xt-q8l-v10 CSC board (#2013)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 2dbdae284585eae321cb307afb75a9b70ed660b8: https://github.com/armbian/build/commit/2dbdae284585eae321cb307afb75a9b70ed660b8
|
||||
> X-Git-Archeology: Date: Mon, 05 Apr 2021 13:53:08 +0000
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: xt-q8l-v10: bump to u-boot v2021.01
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision de26797423e22d58ec2882d7032c67f77196ecc5: https://github.com/armbian/build/commit/de26797423e22d58ec2882d7032c67f77196ecc5
|
||||
> X-Git-Archeology: Date: Sun, 06 Nov 2022 20:32:46 +0100
|
||||
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
|
||||
> X-Git-Archeology: Subject: Move all legacy u-boot patches under one general legacy folder (#4386)
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
|
||||
> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
|
||||
> X-Git-Archeology:
|
||||
---
|
||||
arch/arm/dts/rk3288-xt-q8l-v10.dts | 749 ++++++++++
|
||||
1 file changed, 749 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3288-xt-q8l-v10.dts b/arch/arm/dts/rk3288-xt-q8l-v10.dts
|
||||
new file mode 100755
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3288-xt-q8l-v10.dts
|
||||
@@ -0,0 +1,749 @@
|
||||
+/*
|
||||
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
|
||||
+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
|
||||
+ *
|
||||
+ * This file is dual-licensed: you can use it either under the terms
|
||||
+ * of the GPL or the X11 license, at your option. Note that this dual
|
||||
+ * licensing only applies to this file, and not this project as a
|
||||
+ * whole.
|
||||
+ *
|
||||
+ * a) This file is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of the
|
||||
+ * License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This file is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * Or, alternatively,
|
||||
+ *
|
||||
+ * b) Permission is hereby granted, free of charge, to any person
|
||||
+ * obtaining a copy of this software and associated documentation
|
||||
+ * files (the "Software"), to deal in the Software without
|
||||
+ * restriction, including without limitation the rights to use,
|
||||
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
+ * sell copies of the Software, and to permit persons to whom the
|
||||
+ * Software is furnished to do so, subject to the following
|
||||
+ * conditions:
|
||||
+ *
|
||||
+ * The above copyright notice and this permission notice shall be
|
||||
+ * included in all copies or substantial portions of the Software.
|
||||
+ *
|
||||
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
+ * OTHER DEALINGS IN THE SOFTWARE.
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3288.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "XT-Q8L-V10-RK3288";
|
||||
+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ /*
|
||||
+ * We leave this here for future reference, but at the moment
|
||||
+ * rk3288 does not support "same-as-spl", instead as a workaround
|
||||
+ * we define the boot order statically in:
|
||||
+ * board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
+ *
|
||||
+ */
|
||||
+ u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc;
|
||||
+ };
|
||||
+
|
||||
+ config {
|
||||
+ u-boot,dm-spl;
|
||||
+ u-boot,boot-led = "power";
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ cpu0_opp_table: opp_table {
|
||||
+ compatible = "operating-points-v2";
|
||||
+ opp-shared;
|
||||
+
|
||||
+ opp@600000000 {
|
||||
+ opp-hz = /bits/ 64 <600000000>;
|
||||
+ opp-microvolt = <900000>;
|
||||
+ };
|
||||
+ opp@816000000 {
|
||||
+ opp-hz = /bits/ 64 <816000000>;
|
||||
+ opp-microvolt = <1000000>;
|
||||
+ };
|
||||
+ opp@1008000000 {
|
||||
+ opp-hz = /bits/ 64 <1008000000>;
|
||||
+ opp-microvolt = <1050000>;
|
||||
+ };
|
||||
+ opp@1200000000 {
|
||||
+ opp-hz = /bits/ 64 <1200000000>;
|
||||
+ opp-microvolt = <1100000>;
|
||||
+ };
|
||||
+ opp@1416000000 {
|
||||
+ opp-hz = /bits/ 64 <1416000000>;
|
||||
+ opp-microvolt = <1200000>;
|
||||
+ };
|
||||
+ opp@1512000000 {
|
||||
+ opp-hz = /bits/ 64 <1512000000>;
|
||||
+ opp-microvolt = <1250000>;
|
||||
+ };
|
||||
+ opp@1608000000 {
|
||||
+ opp-hz = /bits/ 64 <1608000000>;
|
||||
+ opp-microvolt = <1300000>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ ext_gmac: external-gmac-clock {
|
||||
+ compatible = "fixed-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <125000000>;
|
||||
+ clock-output-names = "ext_gmac";
|
||||
+ };
|
||||
+
|
||||
+ keys: gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwr_key>;
|
||||
+
|
||||
+ button@0 {
|
||||
+ gpio-key,wakeup;
|
||||
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "GPIO Power";
|
||||
+ linux,code = <116>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ u-boot,dm-spl;
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ power {
|
||||
+ gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
|
||||
+ u-boot,dm-spl;
|
||||
+ label = "power";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: vsys-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: sdmmc-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc_pwr>;
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ startup-delay-us = <100000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_flash: flash-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_flash";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_host_5v: usb-host-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
|
||||
+ regulator-name = "vcc_host_5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
+ vcc_otg_5v: usb-otg-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
|
||||
+ regulator-name = "vcc_otg_5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ io_domains {
|
||||
+ compatible = "rockchip,rk3288-io-voltage-domain";
|
||||
+ audio-supply = <&vcca_33>;
|
||||
+ bb-supply = <&vcc_io>;
|
||||
+ dvp-supply = <&vcc_18>;
|
||||
+ flash0-supply = <&vcc_flash>;
|
||||
+ flash1-supply = <&vcc_lan>;
|
||||
+ gpio30-supply = <&vcc_io>;
|
||||
+ gpio1830-supply = <&vcc_io>;
|
||||
+ lcdc-supply = <&vcc_io>;
|
||||
+ sdcard-supply = <&vccio_sd>;
|
||||
+ wifi-supply = <&vcc_18>;
|
||||
+ };
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu0-supply = <&vdd_cpu>;
|
||||
+ operating-points-v2 = <&cpu0_opp_table>;
|
||||
+ /delete-node/operating-points;
|
||||
+ /*
|
||||
+ // Rewrite the operating points table
|
||||
+ operating-points = <
|
||||
+ 1608000 1350000
|
||||
+ 1512000 1300000
|
||||
+ 1416000 1200000
|
||||
+ 1200000 1100000
|
||||
+ 1008000 1050000
|
||||
+ 816000 1000000
|
||||
+ 696000 950000
|
||||
+ 600000 900000
|
||||
+ >;
|
||||
+ */
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&gmac {
|
||||
+ assigned-clocks = <&cru SCLK_MAC>;
|
||||
+ assigned-clock-parents = <&ext_gmac>;
|
||||
+ clock_in_out = "input";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
|
||||
+ phy-supply = <&vcc_lan>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 1000000>;
|
||||
+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
|
||||
+ tx_delay = <0x30>;
|
||||
+ rx_delay = <0x10>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_cpu: syr827@40 {
|
||||
+ compatible = "silergy,syr827";
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ reg = <0x40>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <8000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: syr828@41 {
|
||||
+ compatible = "silergy,syr828";
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ reg = <0x41>;
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <8000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ hym8563: hym8563@51 {
|
||||
+ compatible = "haoyu,hym8563";
|
||||
+ reg = <0x51>;
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "xin32k";
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rtc_int>;
|
||||
+ };
|
||||
+
|
||||
+ act8846: act8846@5a {
|
||||
+ compatible = "active-semi,act8846";
|
||||
+ reg = <0x5a>;
|
||||
+ system-power-controller;
|
||||
+
|
||||
+ vp1-supply = <&vcc_sys>;
|
||||
+ vp2-supply = <&vcc_sys>;
|
||||
+ vp3-supply = <&vcc_sys>;
|
||||
+ vp4-supply = <&vcc_sys>;
|
||||
+ inl1-supply = <&vcc_sys>;
|
||||
+ inl2-supply = <&vcc_sys>;
|
||||
+ inl3-supply = <&vcc_20>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vcc_ddr: REG1 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: vcc33_lcd: REG2 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vdd_log: REG3 {
|
||||
+ regulator-name = "vdd_log";
|
||||
+ regulator-min-microvolt = <700000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_20: REG4 {
|
||||
+ regulator-name = "vcc_20";
|
||||
+ regulator-min-microvolt = <2000000>;
|
||||
+ regulator-max-microvolt = <2000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vdd10_lcd: REG6 {
|
||||
+ regulator-name = "vdd10_lcd";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcca_18: REG7 {
|
||||
+ regulator-name = "vcca_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vcca_33: REG8 {
|
||||
+ regulator-name = "vcca_33";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_lan: REG9 {
|
||||
+ regulator-name = "vcc_lan";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_10: REG10 {
|
||||
+ regulator-name = "vdd_10";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vccio_wl: vcc_18: REG11 {
|
||||
+ regulator-name = "vcc_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc18_lcd: REG12 {
|
||||
+ regulator-name = "vcc18_lcd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+
|
||||
+ u-boot,dm-pre-reloc;
|
||||
+
|
||||
+ /*
|
||||
+ This pin configuration enables the power led and, most important,
|
||||
+ the power hold pin of the act8846 pmic. Without the power hold
|
||||
+ bit set, the pmic will shut itself down after a few milliseconds,
|
||||
+ turning off the whole device. Be aware that in u-boot configuration
|
||||
+ "pinctrl-names" and "pinctrl-0" properties MUST NOT be stripped
|
||||
+ away from SPL.
|
||||
+ Note also that we set the pwr_hold GPIO in board_init_f()
|
||||
+ function directly in SPL u-boot code which gets executed very soon.
|
||||
+ The definition here is just a way to be sure that the bit is set
|
||||
+ again later.
|
||||
+ */
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led>, <&pwr_hold>;
|
||||
+
|
||||
+ pcfg_output_high: pcfg-output-high {
|
||||
+ u-boot,dm-spl;
|
||||
+ output-high;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_output_low: pcfg-output-low {
|
||||
+ output-low;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl: pcfg-wl {
|
||||
+ bias-pull-up;
|
||||
+ drive-strength = <8>;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl_clk: pcfg-wl-clk {
|
||||
+ bias-disable;
|
||||
+ drive-strength = <12>;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl_int: pcfg-wl-int {
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
+ act8846 {
|
||||
+
|
||||
+ /*
|
||||
+ * Original q8 device tree says:
|
||||
+ * - gpio0 11 HIGH -> power hold
|
||||
+ * - gpio7 1 LOW -> possibly pmic-vsel, we omit it here
|
||||
+ */
|
||||
+ /*pmic_vsel: pmic-vsel {
|
||||
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
+ };*/
|
||||
+
|
||||
+ pwr_hold: pwr-hold {
|
||||
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ gmac {
|
||||
+ phy_int: phy-int {
|
||||
+ rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ phy_pmeb: phy-pmeb {
|
||||
+ rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ phy_rst: phy-rst {
|
||||
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hym8563 {
|
||||
+ rtc_int: rtc-int {
|
||||
+ rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ keys {
|
||||
+ pwr_key: pwr-key {
|
||||
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+
|
||||
+ power_led: power-led {
|
||||
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ ir {
|
||||
+ ir_int: ir-int {
|
||||
+ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdmmc {
|
||||
+ sdmmc_pwr: sdmmc-pwr {
|
||||
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb_host1 {
|
||||
+
|
||||
+ host_vbus_drv: host-vbus-drv {
|
||||
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ usb_otg {
|
||||
+
|
||||
+ otg_vbus_drv: otg-vbus-drv {
|
||||
+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcc_18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ /*
|
||||
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
|
||||
+ * vmmc-supply and vqmmc-supply are removed because they hang
|
||||
+ * u-boot >= v2018.03
|
||||
+ * From the original q8l firmware and eMMC datasheet it also should
|
||||
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
|
||||
+ * properties are not working
|
||||
+ */
|
||||
+ clock-frequency = <50000000>;
|
||||
+
|
||||
+ broken-cd;
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ disable-wp;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+ u-boot,dm-spl;
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ supports-sd;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ card-detect-delay = <200>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
|
||||
+ //vmmc-supply = <&vcc_sd>;
|
||||
+ //vqmmc-supply = <&vccio_sd>;
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+ sd-uhs-ddr50;
|
||||
+ status = "okay";
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Accessible serial port for logging
|
||||
+ */
|
||||
+&uart2 {
|
||||
+ dmas = <&dmac_bus_s 4 &dmac_bus_s 5>;
|
||||
+ dma-names = "tx", "rx";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Describing resets for usb phy is important because otherwise the USB
|
||||
+ * port gets stuck in case it goes into autosuspend: plugging any device
|
||||
+ * when the port is autosuspended will actually kill the port itself and
|
||||
+ * require a power cycle.
|
||||
+ * This is required for the usbphy1 phy, nonetheless it is a good idea to
|
||||
+ * specify the proper resources for all the phys though.
|
||||
+ * The reference patch which works in conjuction with the reset lines:
|
||||
+ * https://patchwork.kernel.org/patch/9469811/
|
||||
+ */
|
||||
+&usbphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbphy0 {
|
||||
+ resets = <&cru SRST_USBOTG_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+ vbus-supply = <&vcc_otg_5v>;
|
||||
+};
|
||||
+
|
||||
+&usbphy1 {
|
||||
+ resets = <&cru SRST_USBHOST0_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+};
|
||||
+
|
||||
+&usbphy2 {
|
||||
+ resets = <&cru SRST_USBHOST1_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+ vbus-supply = <&vcc_host_5v>;
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ dr_mode = "host";
|
||||
+ reg = <0x0 0xff500000 0x0 0x20000>;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Enable the host only USB controller. vbus-supply property allows u-boot
|
||||
+ * to turn power on for the vbus and allow booting from USB devices
|
||||
+ */
|
||||
+&usb_host1 {
|
||||
+ dr_mode = "host";
|
||||
+ vbus-supply = <&vcc_host_5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Enable the OTG USB controller. hnp-srp-disable is necessary to allow
|
||||
+ * it work while in u-boot. Also we attach it to the proper regulator
|
||||
+ * to enable power during boot phase and allow booting from USB devices
|
||||
+ */
|
||||
+&usb_otg {
|
||||
+ hnp-srp-disable;
|
||||
+ vbus-supply = <&vcc_otg_5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Disabling vop big because somewhere in some documentation it is stated
|
||||
+ * that only one vop should be enabled to get video console
|
||||
+ */
|
||||
+&vopb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopb_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdt {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * xt-q8l-v10 timing registers, dumped directly from a live instance
|
||||
+ * initialized by the binary rockchip blob.
|
||||
+ *
|
||||
+ * pctl-timing are dumped from address 0xff6100c0 to 0xff610144
|
||||
+ * phy-timing are dumped from address 0xff620030 to 0xff620050
|
||||
+ * sdram-params are extracted from interconnect, in particular the
|
||||
+ * service_bus/msch0 part starting at address 0xffac0000 (see section 6.4.2
|
||||
+ * of the TRM V1.0 manual)
|
||||
+ */
|
||||
+&dmc {
|
||||
+ rockchip,pctl-timing = <0x00000190 0x000000c8 0x00000000 0x00000028
|
||||
+ 0x00000026 0x00000005 0x00000054 0x0002000a
|
||||
+ 0x00000005 0x00000000 0x00000006 0x00000003
|
||||
+ 0x00000011 0x0000001b 0x0000000a 0x00000004
|
||||
+ 0x00000003 0x00000006 0x00000003 0x00000058
|
||||
+ 0x00000003 0x00000000 0x00000024 0x00000000
|
||||
+ 0x00000001 0x00000001 0x00000002 0x00000003
|
||||
+ 0x00000000 0x00000000 0x00000090 0x00000002
|
||||
+ 0x00000006 0x000001f4>;
|
||||
+ rockchip,phy-timing = <0x3691aa6f 0x185408a0 0x00118c58
|
||||
+ 0x00000000 0x00000083 0x00000004 0x00000001>;
|
||||
+ /*
|
||||
+ * rockchip,sdram-params structure:
|
||||
+ *
|
||||
+ u32 noc_timing;
|
||||
+ u32 noc_activate;
|
||||
+ u32 ddrconfig;
|
||||
+ u32 ddr_freq;
|
||||
+ u32 dramtype;
|
||||
+ * DDR Stride is address mapping for DRAM space
|
||||
+ * Stride Ch 0 range Ch1 range Total
|
||||
+ * 0x00 0-256MB 256MB-512MB 512MB
|
||||
+ * 0x05 0-1GB 0-1GB 1GB
|
||||
+ * 0x09 0-2GB 0-2GB 2GB
|
||||
+ * 0x0d 0-4GB 0-4GB 4GB
|
||||
+ * 0x17 N/A 0-4GB 4GB
|
||||
+ * 0x1a 0-4GB 4GB-8GB 8GB
|
||||
+ u32 stride;
|
||||
+ u32 odt;
|
||||
+
|
||||
+ */
|
||||
+ rockchip,sdram-params = <0x18b1d4db 0x544 0x2 400000000 5 0x9 0>;
|
||||
+};
|
||||
+
|
||||
+&gpio0 {
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
+&gpio7 {
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
+&i2c5 {
|
||||
+ status="okay";
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
+&pcfg_pull_up {
|
||||
+ u-boot,dm-spl;
|
||||
+};
|
||||
+
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -1,41 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Fri, 12 Mar 2021 20:20:12 +0000
|
||||
Subject: [ARCHEOLOGY] Changes and fixes to rk322x uboot and kernel config
|
||||
|
||||
> X-Git-Archeology: > recovered message: > - Enabled nfc on rk322x-dev and disable on rk322x-current (need further development)
|
||||
> X-Git-Archeology: > recovered message: > - Tidied up rk322x-current device tree
|
||||
> X-Git-Archeology: > recovered message: > - enabled nfc rockchip driver enabled in rk322x-dev kernel config
|
||||
> X-Git-Archeology: > recovered message: > - Enabled EHCI controller in u-boot (added patch for inno-phy, device tree and config bits), better device detection for dwc2 usb otg port
|
||||
> X-Git-Archeology: > recovered message: > - Removed SPL_FIT_GENERATOR from u-boot configuration, fixed .its file to use binman
|
||||
> X-Git-Archeology: > recovered message: > - fixed rk322x its file (now includes dtb), reverted u-boot to v2020.10 and changed dev_* into log_debug() calls
|
||||
> X-Git-Archeology: - Revision 95425c27b9d3bbb96e7936cc531638c9150538f9: https://github.com/armbian/build/commit/95425c27b9d3bbb96e7936cc531638c9150538f9
|
||||
> X-Git-Archeology: Date: Fri, 12 Mar 2021 20:20:12 +0000
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: Changes and fixes to rk322x uboot and kernel config
|
||||
> X-Git-Archeology:
|
||||
> X-Git-Archeology: - Revision 97c34489831f2146940f52915428263b7edfcbe1: https://github.com/armbian/build/commit/97c34489831f2146940f52915428263b7edfcbe1
|
||||
> X-Git-Archeology: Date: Fri, 24 Mar 2023 23:13:42 +0100
|
||||
> X-Git-Archeology: From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
> X-Git-Archeology: Subject: rockchip: put all rockchip 32 bit into uboot/v2022.04 directory
|
||||
> X-Git-Archeology:
|
||||
---
|
||||
drivers/usb/host/dwc2.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/usb/host/dwc2.c
|
||||
+++ b/drivers/usb/host/dwc2.c
|
||||
@@ -445,6 +445,8 @@ static void dwc_otg_core_init(struct udevice *dev)
|
||||
|
||||
writel(usbcfg, ®s->gusbcfg);
|
||||
|
||||
+ mdelay(10);
|
||||
+
|
||||
/* Program the GAHBCFG Register. */
|
||||
switch (readl(®s->ghwcfg2) & DWC2_HWCFG2_ARCHITECTURE_MASK) {
|
||||
case DWC2_HWCFG2_ARCHITECTURE_SLAVE_ONLY:
|
||||
--
|
||||
Armbian
|
||||
|
||||
@ -0,0 +1,42 @@
|
||||
From 3a5581574d3574ac24f26becfe96100353637b7f Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Thu, 4 Jul 2024 21:28:24 +0200
|
||||
Subject: [PATCH] accomodations for asus tinkerboard/s
|
||||
|
||||
---
|
||||
configs/tinker-s-rk3288_defconfig | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
|
||||
index 2a2e1226eb..79a89542a3 100644
|
||||
--- a/configs/tinker-s-rk3288_defconfig
|
||||
+++ b/configs/tinker-s-rk3288_defconfig
|
||||
@@ -11,6 +11,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
|
||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s"
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SYS_MONITOR_LEN=614400
|
||||
CONFIG_ROCKCHIP_RK3288=y
|
||||
@@ -33,6 +34,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_SPL_PAD_TO=0x7f8000
|
||||
CONFIG_SPL_NO_BSS_LIMIT=y
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_POWER=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
@@ -94,6 +96,9 @@ CONFIG_USB_HOST_ETHER=y
|
||||
CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_ETHER_SMSC95XX=y
|
||||
CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_MANUFACTURER="ASUS"
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x0b05
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0x7820
|
||||
CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
CONFIG_VIDEO=y
|
||||
# CONFIG_VIDEO_BPP8 is not set
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -1,24 +1,23 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From a3e842c436f1749b9ca774f159ffba52cd96dbfd Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Sat, 19 Mar 2022 21:41:38 +0000
|
||||
Subject: rk3288: tinkerboard: add UMS mode when USB host is connected to OTG
|
||||
port during boot
|
||||
Date: Thu, 4 Jul 2024 21:49:20 +0200
|
||||
Subject: [PATCH] UMS mode for Asus Tinkerboard
|
||||
|
||||
---
|
||||
arch/arm/include/asm/arch-rockchip/gpio.h | 22 ++
|
||||
arch/arm/mach-rockchip/board.c | 115 ++++++++++
|
||||
arch/arm/mach-rockchip/spl.c | 23 +-
|
||||
arch/arm/include/asm/arch-rockchip/gpio.h | 22 ++++
|
||||
arch/arm/mach-rockchip/board.c | 114 +++++++++++++++++++++
|
||||
arch/arm/mach-rockchip/spl.c | 22 ++++
|
||||
cmd/usb_mass_storage.c | 9 +-
|
||||
common/autoboot.c | 22 ++
|
||||
common/autoboot.c | 22 ++++
|
||||
common/board_r.c | 1 +
|
||||
drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 1 +
|
||||
drivers/usb/gadget/f_mass_storage.c | 10 +-
|
||||
include/init.h | 1 +
|
||||
include/linux/usb/gadget.h | 3 +
|
||||
10 files changed, 203 insertions(+), 4 deletions(-)
|
||||
10 files changed, 202 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h b/arch/arm/include/asm/arch-rockchip/gpio.h
|
||||
index 111111111111..222222222222 100644
|
||||
index 1aaec5faec..135688d3b8 100644
|
||||
--- a/arch/arm/include/asm/arch-rockchip/gpio.h
|
||||
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
|
||||
@@ -24,6 +24,28 @@ struct rockchip_gpio_regs {
|
||||
@ -51,18 +50,28 @@ index 111111111111..222222222222 100644
|
||||
GPIO_PULL_NORMAL = 0,
|
||||
GPIO_PULL_UP,
|
||||
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
|
||||
index 111111111111..222222222222 100644
|
||||
index cd226844b6..6f13afd14d 100644
|
||||
--- a/arch/arm/mach-rockchip/board.c
|
||||
+++ b/arch/arm/mach-rockchip/board.c
|
||||
@@ -18,10 +18,26 @@
|
||||
@@ -19,6 +19,7 @@
|
||||
#include <hash.h>
|
||||
#include <init.h>
|
||||
#include <log.h>
|
||||
+#include <linux/delay.h>
|
||||
#include <mmc.h>
|
||||
#include <dm/uclass-internal.h>
|
||||
#include <misc.h>
|
||||
@@ -30,6 +31,7 @@
|
||||
#include <u-boot/sha256.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/io.h>
|
||||
+#include <asm/arch-rockchip/gpio.h>
|
||||
#include <asm/arch-rockchip/boot_mode.h>
|
||||
#include <asm/arch-rockchip/clock.h>
|
||||
#include <asm/arch-rockchip/periph.h>
|
||||
#include <asm/arch-rockchip/misc.h>
|
||||
+#include <asm/arch-rockchip/gpio.h>
|
||||
+#include <linux/delay.h>
|
||||
#include <power/regulator.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
@@ -184,6 +186,19 @@ static void gpt_capsule_update_setup(void)
|
||||
}
|
||||
#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */
|
||||
|
||||
+enum project_id {
|
||||
+ TinkerBoardS = 0,
|
||||
@ -76,12 +85,11 @@ index 111111111111..222222222222 100644
|
||||
+};
|
||||
+
|
||||
+extern bool force_ums;
|
||||
+
|
||||
+
|
||||
__weak int rk_board_late_init(void)
|
||||
{
|
||||
return 0;
|
||||
@@ -34,6 +50,105 @@ int board_late_init(void)
|
||||
@@ -200,6 +215,105 @@ int board_late_init(void)
|
||||
return rk_board_late_init();
|
||||
}
|
||||
|
||||
@ -188,10 +196,10 @@ index 111111111111..222222222222 100644
|
||||
{
|
||||
int ret;
|
||||
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
|
||||
index 111111111111..222222222222 100644
|
||||
index 3ce7e792b5..323b297aca 100644
|
||||
--- a/arch/arm/mach-rockchip/spl.c
|
||||
+++ b/arch/arm/mach-rockchip/spl.c
|
||||
@@ -108,6 +108,27 @@ __weak int arch_cpu_init(void)
|
||||
@@ -116,10 +116,32 @@ __weak int arch_cpu_init(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -219,20 +227,16 @@ index 111111111111..222222222222 100644
|
||||
void board_init_f(ulong dummy)
|
||||
{
|
||||
int ret;
|
||||
@@ -124,7 +145,7 @@ void board_init_f(ulong dummy)
|
||||
debug_uart_init();
|
||||
debug("\nspl:debug uart enabled in %s\n", __func__);
|
||||
#endif
|
||||
-
|
||||
|
||||
+ usb_current_limit_ctrl(true);
|
||||
board_early_init_f();
|
||||
|
||||
ret = spl_early_init();
|
||||
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
|
||||
index 111111111111..222222222222 100644
|
||||
index 751701fe73..c4488b3c16 100644
|
||||
--- a/cmd/usb_mass_storage.c
|
||||
+++ b/cmd/usb_mass_storage.c
|
||||
@@ -111,7 +111,7 @@ static int ums_init(const char *devtype, const char *devnums_part_str)
|
||||
@@ -108,7 +108,7 @@ static int ums_init(const char *devtype, const char *devnums_part_str)
|
||||
name = malloc(UMS_NAME_LEN);
|
||||
if (!name)
|
||||
goto cleanup;
|
||||
@ -241,7 +245,7 @@ index 111111111111..222222222222 100644
|
||||
ums[ums_count].name = name;
|
||||
ums[ums_count].block_dev = *block_dev;
|
||||
|
||||
@@ -136,7 +136,7 @@ cleanup:
|
||||
@@ -133,7 +133,7 @@ cleanup:
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -250,8 +254,8 @@ index 111111111111..222222222222 100644
|
||||
int argc, char *const argv[])
|
||||
{
|
||||
const char *usb_controller;
|
||||
@@ -218,6 +218,11 @@ static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int flag,
|
||||
usb_gadget_handle_interrupts(controller_index);
|
||||
@@ -217,6 +217,11 @@ static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int flag,
|
||||
dm_usb_gadget_handle_interrupts(udc);
|
||||
|
||||
rc = fsg_main_thread(NULL);
|
||||
+
|
||||
@ -263,7 +267,7 @@ index 111111111111..222222222222 100644
|
||||
/* Check I/O error */
|
||||
if (rc == -EIO)
|
||||
diff --git a/common/autoboot.c b/common/autoboot.c
|
||||
index 111111111111..222222222222 100644
|
||||
index 6f0aeae6bf..03ba8b2cb6 100644
|
||||
--- a/common/autoboot.c
|
||||
+++ b/common/autoboot.c
|
||||
@@ -40,6 +40,9 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
@ -273,10 +277,10 @@ index 111111111111..222222222222 100644
|
||||
+bool force_ums = false;
|
||||
+bool getdescriptor = false;
|
||||
+
|
||||
#if !defined(CONFIG_AUTOBOOT_STOP_STR_CRYPT)
|
||||
#define CONFIG_AUTOBOOT_STOP_STR_CRYPT ""
|
||||
#endif
|
||||
@@ -120,6 +123,10 @@ static int passwd_abort_crypt(uint64_t etime)
|
||||
#if defined(CONFIG_AUTOBOOT_STOP_STR_CRYPT)
|
||||
#define AUTOBOOT_STOP_STR_CRYPT CONFIG_AUTOBOOT_STOP_STR_CRYPT
|
||||
#else
|
||||
@@ -125,6 +128,10 @@ static int passwd_abort_crypt(uint64_t etime)
|
||||
return abort;
|
||||
}
|
||||
|
||||
@ -287,7 +291,7 @@ index 111111111111..222222222222 100644
|
||||
/*
|
||||
* Use a "constant-length" time compare function for this
|
||||
* hash compare:
|
||||
@@ -476,6 +483,21 @@ void autoboot_command(const char *s)
|
||||
@@ -491,6 +498,21 @@ void autoboot_command(const char *s)
|
||||
{
|
||||
debug("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
|
||||
|
||||
@ -310,10 +314,10 @@ index 111111111111..222222222222 100644
|
||||
(stored_bootdelay != -1 && !abortboot(stored_bootdelay)))) {
|
||||
bool lock;
|
||||
diff --git a/common/board_r.c b/common/board_r.c
|
||||
index 111111111111..222222222222 100644
|
||||
index da0b80f24f..3d8e338544 100644
|
||||
--- a/common/board_r.c
|
||||
+++ b/common/board_r.c
|
||||
@@ -697,6 +697,7 @@ static init_fnc_t init_sequence_r[] = {
|
||||
@@ -667,6 +667,7 @@ static init_fnc_t init_sequence_r[] = {
|
||||
#ifdef CONFIG_MMC
|
||||
initr_mmc,
|
||||
#endif
|
||||
@ -322,7 +326,7 @@ index 111111111111..222222222222 100644
|
||||
xen_init,
|
||||
#endif
|
||||
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
|
||||
index 111111111111..222222222222 100644
|
||||
index 1c34b75351..2f017f835a 100644
|
||||
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
|
||||
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
|
||||
@@ -1393,6 +1393,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
|
||||
@ -334,10 +338,10 @@ index 111111111111..222222222222 100644
|
||||
|
||||
case USB_REQ_SET_INTERFACE:
|
||||
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
|
||||
index 111111111111..222222222222 100644
|
||||
index ef90c7ec7f..de054eba6a 100644
|
||||
--- a/drivers/usb/gadget/f_mass_storage.c
|
||||
+++ b/drivers/usb/gadget/f_mass_storage.c
|
||||
@@ -655,7 +655,7 @@ static void busy_indicator(void)
|
||||
@@ -657,7 +657,7 @@ static void busy_indicator(void)
|
||||
static int sleep_thread(struct fsg_common *common)
|
||||
{
|
||||
int rc = 0;
|
||||
@ -346,7 +350,7 @@ index 111111111111..222222222222 100644
|
||||
|
||||
/* Wait until a signal arrives or we are woken up */
|
||||
for (;;) {
|
||||
@@ -666,6 +666,7 @@ static int sleep_thread(struct fsg_common *common)
|
||||
@@ -668,6 +668,7 @@ static int sleep_thread(struct fsg_common *common)
|
||||
busy_indicator();
|
||||
i = 0;
|
||||
k++;
|
||||
@ -354,7 +358,7 @@ index 111111111111..222222222222 100644
|
||||
}
|
||||
|
||||
if (k == 10) {
|
||||
@@ -680,6 +681,13 @@ static int sleep_thread(struct fsg_common *common)
|
||||
@@ -686,6 +687,13 @@ static int sleep_thread(struct fsg_common *common)
|
||||
k = 0;
|
||||
}
|
||||
|
||||
@ -365,14 +369,14 @@ index 111111111111..222222222222 100644
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
usb_gadget_handle_interrupts(controller_index);
|
||||
dm_usb_gadget_handle_interrupts(udcdev);
|
||||
}
|
||||
common->thread_wakeup_needed = 0;
|
||||
diff --git a/include/init.h b/include/init.h
|
||||
index 111111111111..222222222222 100644
|
||||
index 630d86729c..eeb9526efe 100644
|
||||
--- a/include/init.h
|
||||
+++ b/include/init.h
|
||||
@@ -297,6 +297,7 @@ int board_early_init_f(void);
|
||||
@@ -337,6 +337,7 @@ int board_early_init_f(void);
|
||||
/* manipulate the U-Boot fdt before its relocation */
|
||||
int board_fix_fdt(void *rw_fdt_blob);
|
||||
int board_late_init(void);
|
||||
@ -381,7 +385,7 @@ index 111111111111..222222222222 100644
|
||||
int board_early_init_r(void);
|
||||
|
||||
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
|
||||
index 111111111111..222222222222 100644
|
||||
index 36572be89e..eaf1078ba7 100644
|
||||
--- a/include/linux/usb/gadget.h
|
||||
+++ b/include/linux/usb/gadget.h
|
||||
@@ -25,6 +25,9 @@
|
||||
@ -395,5 +399,5 @@ index 111111111111..222222222222 100644
|
||||
* struct usb_request - describes one i/o request
|
||||
* @buf: Buffer used for data. Always provide this; some controllers
|
||||
--
|
||||
Armbian
|
||||
2.34.1
|
||||
|
||||
@ -0,0 +1,140 @@
|
||||
From e198e6879beace64347179b2a155f1e76ed06a50 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Sat, 6 Jul 2024 20:21:59 +0200
|
||||
Subject: [PATCH 2/3] add xt-q8l-v10 defconfig
|
||||
|
||||
---
|
||||
configs/xt-q8l-v10-rk3288_defconfig | 121 ++++++++++++++++++++++++++++
|
||||
1 file changed, 121 insertions(+)
|
||||
create mode 100644 configs/xt-q8l-v10-rk3288_defconfig
|
||||
|
||||
diff --git a/configs/xt-q8l-v10-rk3288_defconfig b/configs/xt-q8l-v10-rk3288_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..dba1f143ef
|
||||
--- /dev/null
|
||||
+++ b/configs/xt-q8l-v10-rk3288_defconfig
|
||||
@@ -0,0 +1,121 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
|
||||
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
|
||||
+CONFIG_SYS_ARCH_TIMER=y
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_TEXT_BASE=0x01000000
|
||||
+CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
+CONFIG_SPL_GPIO=y
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
|
||||
+CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-xt-q8l-v10"
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_SYS_MONITOR_LEN=614400
|
||||
+CONFIG_ROCKCHIP_RK3288=y
|
||||
+CONFIG_ROCKCHIP_EXTERNAL_TPL=y
|
||||
+CONFIG_TARGET_XT_Q8L_V10_RK3288=y
|
||||
+CONFIG_SPL_STACK_R_ADDR=0x800000
|
||||
+CONFIG_SPL_STACK=0xff718000
|
||||
+CONFIG_SPL_STACK_R=y
|
||||
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000
|
||||
+CONFIG_SPL_SIZE_LIMIT=0x4b000
|
||||
+CONFIG_DEBUG_UART_BASE=0xff690000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_CMD_HDMIDETECT=y
|
||||
+CONFIG_SYS_LOAD_ADDR=0x800800
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
||||
+CONFIG_SYS_BOOTM_LEN=0x4000000
|
||||
+CONFIG_USE_PREBOOT=y
|
||||
+CONFIG_DEFAULT_FDT_FILE="rk3288-xt-q8l-v10.dtb"
|
||||
+CONFIG_SILENT_CONSOLE=y
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+CONFIG_SPL_PAD_TO=0x7f8000
|
||||
+CONFIG_SPL_NO_BSS_LIMIT=y
|
||||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
|
||||
+CONFIG_SPL_I2C=y
|
||||
+CONFIG_SPL_POWER=y
|
||||
+# CONFIG_TPL_DRIVERS_MISC is not set
|
||||
+# CONFIG_CMD_BOOTEFI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_SPI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_BMP=y
|
||||
+CONFIG_CMD_CACHE=y
|
||||
+CONFIG_CMD_TIME=y
|
||||
+CONFIG_CMD_PMIC=y
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_CMD_EROFS=y
|
||||
+CONFIG_CMD_SQUASHFS=y
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+# CONFIG_SPL_EFI_PARTITION is not set
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
+CONFIG_ENV_IS_IN_MMC=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_SYS_MMC_ENV_DEV=1
|
||||
+CONFIG_REGMAP=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_SYSCON=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+# CONFIG_SPL_SIMPLE_BUS is not set
|
||||
+CONFIG_CLK=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_LED=y
|
||||
+CONFIG_LED_BLINK=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_GATEWORKS_SC=y
|
||||
+CONFIG_ROCKCHIP_EFUSE=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_GMAC_ROCKCHIP=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_PMIC_ACT8846=y
|
||||
+CONFIG_DM_PMIC_FAN53555=y
|
||||
+CONFIG_SPL_DM_REGULATOR=y
|
||||
+CONFIG_REGULATOR_ACT8846=y
|
||||
+CONFIG_REGULATOR_PWM=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_PWM_ROCKCHIP=y
|
||||
+CONFIG_RAM=y
|
||||
+# CONFIG_RAM_ROCKCHIP_DEBUG is not set
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYS_NS16550_MEM32=y
|
||||
+CONFIG_SYSRESET=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_DWC2=y
|
||||
+CONFIG_ROCKCHIP_USB2_PHY=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_USB_HOST_ETHER=y
|
||||
+CONFIG_USB_ETHER_ASIX=y
|
||||
+CONFIG_USB_ETHER_SMSC95XX=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+CONFIG_DISPLAY=y
|
||||
+CONFIG_VIDEO_ROCKCHIP=y
|
||||
+CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1920
|
||||
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1080
|
||||
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
||||
+CONFIG_CONSOLE_SCROLL_LINES=10
|
||||
+CONFIG_CMD_DHRYSTONE=y
|
||||
+CONFIG_SHA256=y
|
||||
+# CONFIG_SPL_SHA256 is not set
|
||||
+CONFIG_ERRNO_STR=y
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -0,0 +1,163 @@
|
||||
From ff847d695a81eb724b4a288a60b1ec5a85d8b1d5 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Sat, 6 Jul 2024 20:22:22 +0200
|
||||
Subject: [PATCH 3/3] add xt-q8l-v10 ancillary makefile and sources
|
||||
|
||||
---
|
||||
arch/arm/dts/Makefile | 1 +
|
||||
arch/arm/mach-rockchip/rk3288/Kconfig | 12 +++++++++++
|
||||
board/rockchip/xt-q8l-v10_rk3288/Kconfig | 15 +++++++++++++
|
||||
board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS | 6 ++++++
|
||||
board/rockchip/xt-q8l-v10_rk3288/Makefile | 7 +++++++
|
||||
.../xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c | 21 +++++++++++++++++++
|
||||
include/configs/xt-q8l-v10_rk3288.h | 21 +++++++++++++++++++
|
||||
7 files changed, 83 insertions(+)
|
||||
create mode 100644 board/rockchip/xt-q8l-v10_rk3288/Kconfig
|
||||
create mode 100644 board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS
|
||||
create mode 100644 board/rockchip/xt-q8l-v10_rk3288/Makefile
|
||||
create mode 100644 board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
create mode 100644 include/configs/xt-q8l-v10_rk3288.h
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 8fb6a8a1f1..9a799aad71 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -84,6 +84,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
|
||||
rk3288-rock-pi-n8.dtb \
|
||||
rk3288-tinker.dtb \
|
||||
rk3288-tinker-s.dtb \
|
||||
+ rk3288-xt-q8l-v10.dtb \
|
||||
rk3288-veyron-jerry.dtb \
|
||||
rk3288-veyron-mickey.dtb \
|
||||
rk3288-veyron-minnie.dtb \
|
||||
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
index 69a5614b44..2ef13e2e8e 100644
|
||||
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
|
||||
@@ -139,6 +139,16 @@ config TARGET_TINKER_RK3288
|
||||
8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
|
||||
I2C, SPI, UART, GPIOs.
|
||||
|
||||
+config TARGET_XT_Q8L_V10_RK3288
|
||||
+ bool "xt-q8l-v10 tvbox board"
|
||||
+ select BOARD_LATE_INIT
|
||||
+ select TPL
|
||||
+ help
|
||||
+ xt-q8l-v10 is a RK3288 common tv box with 3 USB ports (1 OTG), HDMI,
|
||||
+ micro-SD card, Gigabit Ethernet and SPDIF output. It also includes on-board
|
||||
+ 8GB eMMC and 2GB of SDRAM, 802.11n Wifi and Bluetooth based upon AP6330
|
||||
+ WiSoC.
|
||||
+
|
||||
endchoice
|
||||
|
||||
config ROCKCHIP_FAST_SPL
|
||||
@@ -198,4 +208,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
|
||||
|
||||
source "board/rockchip/tinker_rk3288/Kconfig"
|
||||
|
||||
+source "board/rockchip/xt-q8l-v10_rk3288/Kconfig"
|
||||
+
|
||||
endif
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/Kconfig b/board/rockchip/xt-q8l-v10_rk3288/Kconfig
|
||||
new file mode 100644
|
||||
index 0000000000..176abf00b8
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/Kconfig
|
||||
@@ -0,0 +1,15 @@
|
||||
+if TARGET_XT_Q8L_V10_RK3288
|
||||
+
|
||||
+config SYS_BOARD
|
||||
+ default "xt-q8l-v10_rk3288"
|
||||
+
|
||||
+config SYS_VENDOR
|
||||
+ default "rockchip"
|
||||
+
|
||||
+config SYS_CONFIG_NAME
|
||||
+ default "xt-q8l-v10_rk3288"
|
||||
+
|
||||
+config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
+ def_bool y
|
||||
+
|
||||
+endif
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS b/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS
|
||||
new file mode 100644
|
||||
index 0000000000..9a3ad97c14
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/MAINTAINERS
|
||||
@@ -0,0 +1,6 @@
|
||||
+XT-Q8L-V10-RK3288
|
||||
+M: Paolo Sabatino <a@b.c>
|
||||
+S: Not mainlined
|
||||
+F: board/rockchip/xt-q8l-v10_rk3288
|
||||
+F: include/configs/xt-q8l-v10_rk3288.h
|
||||
+F: configs/xt-q8l-v10-rk3288_defconfig
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/Makefile b/board/rockchip/xt-q8l-v10_rk3288/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..852c9100a7
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/Makefile
|
||||
@@ -0,0 +1,7 @@
|
||||
+#
|
||||
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
||||
+#
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+
|
||||
+obj-y += xt-q8l-v10-rk3288.o
|
||||
diff --git a/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c b/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
new file mode 100644
|
||||
index 0000000000..f0f618a5ab
|
||||
--- /dev/null
|
||||
+++ b/board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
@@ -0,0 +1,21 @@
|
||||
+/*
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <spl.h>
|
||||
+#include <asm/gpio.h>
|
||||
+
|
||||
+void spl_board_init(void)
|
||||
+{
|
||||
+
|
||||
+ /*
|
||||
+ * xt-q8l-v10 requires the power-hold gpio set (A11, or bank 0 pin 11
|
||||
+ * if you prefer) as soon as possible.
|
||||
+ * We hack it here :P
|
||||
+ */
|
||||
+ gpio_request(11, "power-hold");
|
||||
+ gpio_direction_output(11, 1);
|
||||
+
|
||||
+}
|
||||
+
|
||||
diff --git a/include/configs/xt-q8l-v10_rk3288.h b/include/configs/xt-q8l-v10_rk3288.h
|
||||
new file mode 100644
|
||||
index 0000000000..a3275262c3
|
||||
--- /dev/null
|
||||
+++ b/include/configs/xt-q8l-v10_rk3288.h
|
||||
@@ -0,0 +1,21 @@
|
||||
+/*
|
||||
+ * (C) Copyright 2015 Google, Inc
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#ifndef __CONFIG_H
|
||||
+#define __CONFIG_H
|
||||
+
|
||||
+#define ROCKCHIP_DEVICE_SETTINGS \
|
||||
+ "stdin=serial,usbkbd\0" \
|
||||
+ "stdout=serial,vidconsole\0" \
|
||||
+ "stderr=serial,vidconsole\0"
|
||||
+
|
||||
+#include <configs/rk3288_common.h>
|
||||
+
|
||||
+#undef BOOT_TARGETS
|
||||
+
|
||||
+#define BOOT_TARGETS "mmc1 usb mmc0 pxe dhcp"
|
||||
+
|
||||
+#endif
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -0,0 +1,800 @@
|
||||
From c039d9c32bccfe9c079972bae9feaca34ba95233 Mon Sep 17 00:00:00 2001
|
||||
From: Paolo Sabatino <paolo.sabatino@gmail.com>
|
||||
Date: Sat, 6 Jul 2024 20:21:32 +0200
|
||||
Subject: [PATCH 1/3] add xt-q8lv-10 device tree
|
||||
|
||||
---
|
||||
arch/arm/dts/rk3288-xt-q8l-v10-u-boot.dtsi | 70 ++
|
||||
arch/arm/dts/rk3288-xt-q8l-v10.dts | 703 +++++++++++++++++++++
|
||||
2 files changed, 773 insertions(+)
|
||||
create mode 100644 arch/arm/dts/rk3288-xt-q8l-v10-u-boot.dtsi
|
||||
create mode 100755 arch/arm/dts/rk3288-xt-q8l-v10.dts
|
||||
|
||||
diff --git a/arch/arm/dts/rk3288-xt-q8l-v10-u-boot.dtsi b/arch/arm/dts/rk3288-xt-q8l-v10-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..120f60998b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3288-xt-q8l-v10-u-boot.dtsi
|
||||
@@ -0,0 +1,70 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
|
||||
+ */
|
||||
+
|
||||
+#include "rk3288-u-boot.dtsi"
|
||||
+
|
||||
+&dmc {
|
||||
+ bootph-all;
|
||||
+ rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
|
||||
+ 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
|
||||
+ 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
|
||||
+ 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
|
||||
+ 0x8 0x1f4>;
|
||||
+ rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
|
||||
+ 0x0 0xc3 0x6 0x2>;
|
||||
+ rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&uart2_xfer {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&gpio7 {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&vcc_sd {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&pcfg_pull_none {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&pcfg_pull_up {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&sdmmc_bus4 {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&sdmmc_cd {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&sdmmc_clk {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&sdmmc_cmd {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&sdmmc_pwr {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
diff --git a/arch/arm/dts/rk3288-xt-q8l-v10.dts b/arch/arm/dts/rk3288-xt-q8l-v10.dts
|
||||
new file mode 100755
|
||||
index 0000000000..f2bd8fd039
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3288-xt-q8l-v10.dts
|
||||
@@ -0,0 +1,703 @@
|
||||
+/*
|
||||
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
|
||||
+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
|
||||
+ *
|
||||
+ * This file is dual-licensed: you can use it either under the terms
|
||||
+ * of the GPL or the X11 license, at your option. Note that this dual
|
||||
+ * licensing only applies to this file, and not this project as a
|
||||
+ * whole.
|
||||
+ *
|
||||
+ * a) This file is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of the
|
||||
+ * License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This file is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * Or, alternatively,
|
||||
+ *
|
||||
+ * b) Permission is hereby granted, free of charge, to any person
|
||||
+ * obtaining a copy of this software and associated documentation
|
||||
+ * files (the "Software"), to deal in the Software without
|
||||
+ * restriction, including without limitation the rights to use,
|
||||
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
+ * sell copies of the Software, and to permit persons to whom the
|
||||
+ * Software is furnished to do so, subject to the following
|
||||
+ * conditions:
|
||||
+ *
|
||||
+ * The above copyright notice and this permission notice shall be
|
||||
+ * included in all copies or substantial portions of the Software.
|
||||
+ *
|
||||
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
+ * OTHER DEALINGS IN THE SOFTWARE.
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3288.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "XT-Q8L-V10-RK3288";
|
||||
+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = &uart2;
|
||||
+ /*
|
||||
+ * We leave this here for future reference, but at the moment
|
||||
+ * rk3288 does not support "same-as-spl", instead as a workaround
|
||||
+ * we define the boot order statically in:
|
||||
+ * board/rockchip/xt-q8l-v10_rk3288/xt-q8l-v10-rk3288.c
|
||||
+ *
|
||||
+ */
|
||||
+ u-boot,spl-boot-order = &sdmmc, &emmc;
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ cpu0_opp_table: opp_table {
|
||||
+ compatible = "operating-points-v2";
|
||||
+ opp-shared;
|
||||
+
|
||||
+ opp@600000000 {
|
||||
+ opp-hz = /bits/ 64 <600000000>;
|
||||
+ opp-microvolt = <900000>;
|
||||
+ };
|
||||
+ opp@816000000 {
|
||||
+ opp-hz = /bits/ 64 <816000000>;
|
||||
+ opp-microvolt = <1000000>;
|
||||
+ };
|
||||
+ opp@1008000000 {
|
||||
+ opp-hz = /bits/ 64 <1008000000>;
|
||||
+ opp-microvolt = <1050000>;
|
||||
+ };
|
||||
+ opp@1200000000 {
|
||||
+ opp-hz = /bits/ 64 <1200000000>;
|
||||
+ opp-microvolt = <1100000>;
|
||||
+ };
|
||||
+ opp@1416000000 {
|
||||
+ opp-hz = /bits/ 64 <1416000000>;
|
||||
+ opp-microvolt = <1200000>;
|
||||
+ };
|
||||
+ opp@1512000000 {
|
||||
+ opp-hz = /bits/ 64 <1512000000>;
|
||||
+ opp-microvolt = <1250000>;
|
||||
+ };
|
||||
+ opp@1608000000 {
|
||||
+ opp-hz = /bits/ 64 <1608000000>;
|
||||
+ opp-microvolt = <1300000>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ ext_gmac: external-gmac-clock {
|
||||
+ compatible = "fixed-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <125000000>;
|
||||
+ clock-output-names = "ext_gmac";
|
||||
+ };
|
||||
+
|
||||
+ keys: gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwr_key>;
|
||||
+
|
||||
+ button@0 {
|
||||
+ gpio-key,wakeup;
|
||||
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "GPIO Power";
|
||||
+ linux,code = <116>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ bootph-all;
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ power {
|
||||
+ gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
|
||||
+ bootph-all;
|
||||
+ label = "power";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: vsys-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: sdmmc-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc_pwr>;
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ startup-delay-us = <100000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_flash: flash-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_flash";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_host_5v: usb-host-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
|
||||
+ regulator-name = "vcc_host_5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
+ vcc_otg_5v: usb-otg-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
|
||||
+ regulator-name = "vcc_otg_5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ io_domains {
|
||||
+ compatible = "rockchip,rk3288-io-voltage-domain";
|
||||
+ audio-supply = <&vcca_33>;
|
||||
+ bb-supply = <&vcc_io>;
|
||||
+ dvp-supply = <&vcc_18>;
|
||||
+ flash0-supply = <&vcc_flash>;
|
||||
+ flash1-supply = <&vcc_lan>;
|
||||
+ gpio30-supply = <&vcc_io>;
|
||||
+ gpio1830-supply = <&vcc_io>;
|
||||
+ lcdc-supply = <&vcc_io>;
|
||||
+ sdcard-supply = <&vccio_sd>;
|
||||
+ wifi-supply = <&vcc_18>;
|
||||
+ };
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu0-supply = <&vdd_cpu>;
|
||||
+ operating-points-v2 = <&cpu0_opp_table>;
|
||||
+ /delete-node/operating-points;
|
||||
+ /*
|
||||
+ // Rewrite the operating points table
|
||||
+ operating-points = <
|
||||
+ 1608000 1350000
|
||||
+ 1512000 1300000
|
||||
+ 1416000 1200000
|
||||
+ 1200000 1100000
|
||||
+ 1008000 1050000
|
||||
+ 816000 1000000
|
||||
+ 696000 950000
|
||||
+ 600000 900000
|
||||
+ >;
|
||||
+ */
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&gmac {
|
||||
+ assigned-clocks = <&cru SCLK_MAC>;
|
||||
+ assigned-clock-parents = <&ext_gmac>;
|
||||
+ clock_in_out = "input";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
|
||||
+ phy-supply = <&vcc_lan>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 1000000>;
|
||||
+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
|
||||
+ tx_delay = <0x30>;
|
||||
+ rx_delay = <0x10>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ ddc-i2c-bus = <&i2c5>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_cpu: syr827@40 {
|
||||
+ compatible = "silergy,syr827";
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ reg = <0x40>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <8000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: syr828@41 {
|
||||
+ compatible = "silergy,syr828";
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ reg = <0x41>;
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <8000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+ };
|
||||
+
|
||||
+ hym8563: hym8563@51 {
|
||||
+ compatible = "haoyu,hym8563";
|
||||
+ reg = <0x51>;
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "xin32k";
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rtc_int>;
|
||||
+ };
|
||||
+
|
||||
+ act8846: act8846@5a {
|
||||
+ compatible = "active-semi,act8846";
|
||||
+ reg = <0x5a>;
|
||||
+ system-power-controller;
|
||||
+
|
||||
+ vp1-supply = <&vcc_sys>;
|
||||
+ vp2-supply = <&vcc_sys>;
|
||||
+ vp3-supply = <&vcc_sys>;
|
||||
+ vp4-supply = <&vcc_sys>;
|
||||
+ inl1-supply = <&vcc_sys>;
|
||||
+ inl2-supply = <&vcc_sys>;
|
||||
+ inl3-supply = <&vcc_20>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+
|
||||
+ regulators {
|
||||
+ vcc_ddr: REG1 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: vcc33_lcd: REG2 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vdd_log: REG3 {
|
||||
+ regulator-name = "vdd_log";
|
||||
+ regulator-min-microvolt = <700000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_20: REG4 {
|
||||
+ regulator-name = "vcc_20";
|
||||
+ regulator-min-microvolt = <2000000>;
|
||||
+ regulator-max-microvolt = <2000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vdd10_lcd: REG6 {
|
||||
+ regulator-name = "vdd10_lcd";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcca_18: REG7 {
|
||||
+ regulator-name = "vcca_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vcca_33: REG8 {
|
||||
+ regulator-name = "vcca_33";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_lan: REG9 {
|
||||
+ regulator-name = "vcc_lan";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_10: REG10 {
|
||||
+ regulator-name = "vdd_10";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vccio_wl: vcc_18: REG11 {
|
||||
+ regulator-name = "vcc_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc18_lcd: REG12 {
|
||||
+ regulator-name = "vcc18_lcd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+
|
||||
+ bootph-pre-ram;
|
||||
+
|
||||
+ /*
|
||||
+ This pin configuration enables the power led and, most important,
|
||||
+ the power hold pin of the act8846 pmic. Without the power hold
|
||||
+ bit set, the pmic will shut itself down after a few milliseconds,
|
||||
+ turning off the whole device. Be aware that in u-boot configuration
|
||||
+ "pinctrl-names" and "pinctrl-0" properties MUST NOT be stripped
|
||||
+ away from SPL.
|
||||
+ Note also that we set the pwr_hold GPIO in board_init_f()
|
||||
+ function directly in SPL u-boot code which gets executed very soon.
|
||||
+ The definition here is just a way to be sure that the bit is set
|
||||
+ again later.
|
||||
+ */
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led>, <&pwr_hold>;
|
||||
+
|
||||
+ pcfg_output_high: pcfg-output-high {
|
||||
+ bootph-all;
|
||||
+ output-high;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_output_low: pcfg-output-low {
|
||||
+ output-low;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl: pcfg-wl {
|
||||
+ bias-pull-up;
|
||||
+ drive-strength = <8>;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl_clk: pcfg-wl-clk {
|
||||
+ bias-disable;
|
||||
+ drive-strength = <12>;
|
||||
+ };
|
||||
+
|
||||
+ pcfg_wl_int: pcfg-wl-int {
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
+ act8846 {
|
||||
+
|
||||
+ /*
|
||||
+ * Original q8 device tree says:
|
||||
+ * - gpio0 11 HIGH -> power hold
|
||||
+ * - gpio7 1 LOW -> possibly pmic-vsel, we omit it here
|
||||
+ */
|
||||
+ /*pmic_vsel: pmic-vsel {
|
||||
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
+ };*/
|
||||
+
|
||||
+ pwr_hold: pwr-hold {
|
||||
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ gmac {
|
||||
+ phy_int: phy-int {
|
||||
+ rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ phy_pmeb: phy-pmeb {
|
||||
+ rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ phy_rst: phy-rst {
|
||||
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hym8563 {
|
||||
+ rtc_int: rtc-int {
|
||||
+ rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ keys {
|
||||
+ pwr_key: pwr-key {
|
||||
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+
|
||||
+ power_led: power-led {
|
||||
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ ir {
|
||||
+ ir_int: ir-int {
|
||||
+ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdmmc {
|
||||
+ sdmmc_pwr: sdmmc-pwr {
|
||||
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb_host1 {
|
||||
+
|
||||
+ host_vbus_drv: host-vbus-drv {
|
||||
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ usb_otg {
|
||||
+
|
||||
+ otg_vbus_drv: otg-vbus-drv {
|
||||
+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcc_18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ /*
|
||||
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
|
||||
+ * vmmc-supply and vqmmc-supply are removed because they hang
|
||||
+ * u-boot >= v2018.03
|
||||
+ * From the original q8l firmware and eMMC datasheet it also should
|
||||
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
|
||||
+ * properties are not working
|
||||
+ */
|
||||
+ clock-frequency = <50000000>;
|
||||
+
|
||||
+ broken-cd;
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ disable-wp;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+ bootph-all;
|
||||
+
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ supports-sd;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ card-detect-delay = <200>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
|
||||
+ //vmmc-supply = <&vcc_sd>;
|
||||
+ //vqmmc-supply = <&vccio_sd>;
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+ sd-uhs-ddr50;
|
||||
+ status = "okay";
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Accessible serial port for logging
|
||||
+ */
|
||||
+&uart2 {
|
||||
+ dmas = <&dmac_bus_s 4 &dmac_bus_s 5>;
|
||||
+ dma-names = "tx", "rx";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Describing resets for usb phy is important because otherwise the USB
|
||||
+ * port gets stuck in case it goes into autosuspend: plugging any device
|
||||
+ * when the port is autosuspended will actually kill the port itself and
|
||||
+ * require a power cycle.
|
||||
+ * This is required for the usbphy1 phy, nonetheless it is a good idea to
|
||||
+ * specify the proper resources for all the phys though.
|
||||
+ * The reference patch which works in conjuction with the reset lines:
|
||||
+ * https://patchwork.kernel.org/patch/9469811/
|
||||
+ */
|
||||
+&usbphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbphy0 {
|
||||
+ resets = <&cru SRST_USBOTG_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+ vbus-supply = <&vcc_otg_5v>;
|
||||
+};
|
||||
+
|
||||
+&usbphy1 {
|
||||
+ resets = <&cru SRST_USBHOST0_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+};
|
||||
+
|
||||
+&usbphy2 {
|
||||
+ resets = <&cru SRST_USBHOST1_PHY>;
|
||||
+ reset-names = "phy-reset";
|
||||
+ vbus-supply = <&vcc_host_5v>;
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ dr_mode = "host";
|
||||
+ reg = <0x0 0xff500000 0x0 0x20000>;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Enable the host only USB controller. vbus-supply property allows u-boot
|
||||
+ * to turn power on for the vbus and allow booting from USB devices
|
||||
+ */
|
||||
+&usb_host1 {
|
||||
+ dr_mode = "host";
|
||||
+ vbus-supply = <&vcc_host_5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Enable the OTG USB controller. hnp-srp-disable is necessary to allow
|
||||
+ * it work while in u-boot. Also we attach it to the proper regulator
|
||||
+ * to enable power during boot phase and allow booting from USB devices
|
||||
+ */
|
||||
+&usb_otg {
|
||||
+ hnp-srp-disable;
|
||||
+ vbus-supply = <&vcc_otg_5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * Disabling vop big because somewhere in some documentation it is stated
|
||||
+ * that only one vop should be enabled to get video console
|
||||
+ */
|
||||
+&vopb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopb_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wdt {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&gpio0 {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&gpio7 {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&i2c5 {
|
||||
+ status="okay";
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&efuse {
|
||||
+ status="okay";
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
+&pcfg_pull_up {
|
||||
+ bootph-all;
|
||||
+};
|
||||
+
|
||||
--
|
||||
2.34.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user